diff options
author | Ben Gass <bgass@us.ibm.com> | 2018-09-13 15:34:01 -0500 |
---|---|---|
committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2018-11-20 17:48:04 -0600 |
commit | 3f1f2186bb80322594a3cc81241c390119d69552 (patch) | |
tree | 7ab9514c3431a99f846658376b438523a0573a71 /src/import/chips/ocmb | |
parent | 499916e4586920a5342a64646f3f2ec4bbe4e19d (diff) | |
download | talos-hostboot-3f1f2186bb80322594a3cc81241c390119d69552.tar.gz talos-hostboot-3f1f2186bb80322594a3cc81241c390119d69552.zip |
Adding omi_init procedures.
Change-Id: I176be8901393d62cee0173568e538565444eac01
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66094
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67326
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/ocmb')
6 files changed, 1797 insertions, 0 deletions
diff --git a/src/import/chips/ocmb/explorer/common/include/exp_oc_regs.H b/src/import/chips/ocmb/explorer/common/include/exp_oc_regs.H index b93f1d4f1..6cf8ac834 100644 --- a/src/import/chips/ocmb/explorer/common/include/exp_oc_regs.H +++ b/src/import/chips/ocmb/explorer/common/include/exp_oc_regs.H @@ -31,3 +31,850 @@ // *HWP Team: // *HWP Level: 2 // *HWP Consumed by: HB + + +#ifndef __EXP_OC_REGS_H_ +#define __EXP_OC_REGS_H_ + +static const uint32_t EXPLR_OC_O0MBIT_O0DID_LSB = 0x00000000; +static const uint32_t EXPLR_OC_O0MBIT_O0DID_LSB_DEVICE_ID = 0; +static const uint32_t EXPLR_OC_O0MBIT_O0DID_LSB_DEVICE_ID_LEN = 16; +static const uint32_t EXPLR_OC_O0MBIT_O0DID_LSB_VENDOR_ID = 16; +static const uint32_t EXPLR_OC_O0MBIT_O0DID_LSB_VENDOR_ID_LEN = 16; +static const uint32_t EXPLR_OC_O0MBIT_O0DID_MSB = 0x00000004; +static const uint32_t EXPLR_OC_O0MBIT_O0DID_MSB_CAPABILITIES_LIST = 11; +static const uint32_t EXPLR_OC_O0MBIT_O0DID_MSB_CAPABILITIES_LIST_LEN = 1; +static const uint32_t EXPLR_OC_O0MBIT_O0DID_MSB_MEMORY_SPACE = 30; +static const uint32_t EXPLR_OC_O0MBIT_O0DID_MSB_MEMORY_SPACE_LEN = 1; +static const uint32_t EXPLR_OC_O0CCD_LSB = 0x00000008; +static const uint32_t EXPLR_OC_O0CCD_LSB_CLASS_CODE = 0; +static const uint32_t EXPLR_OC_O0CCD_LSB_CLASS_CODE_LEN = 24; +static const uint32_t EXPLR_OC_O0CCD_LSB_REVISION_ID = 24; +static const uint32_t EXPLR_OC_O0CCD_LSB_REVISION_ID_LEN = 8; +static const uint32_t EXPLR_OC_O0CCD_MSB = 0x0000000C; +static const uint32_t EXPLR_OC_O0CCD_MSB_MULTI_FUNCTION = 8; +static const uint32_t EXPLR_OC_O0CCD_MSB_MULTI_FUNCTION_LEN = 1; +static const uint32_t EXPLR_OC_O0BAR0_LSB = 0x00000010; +static const uint32_t EXPLR_OC_O0BAR0_LSB_BAR_ADDRESS = 0; +static const uint32_t EXPLR_OC_O0BAR0_LSB_BAR_ADDRESS_LEN = 28; +static const uint32_t EXPLR_OC_O0BAR0_LSB_PREFETCHABLE = 28; +static const uint32_t EXPLR_OC_O0BAR0_LSB_PREFETCHABLE_LEN = 1; +static const uint32_t EXPLR_OC_O0BAR0_LSB_TYPE = 29; +static const uint32_t EXPLR_OC_O0BAR0_LSB_TYPE_LEN = 2; +static const uint32_t EXPLR_OC_O0BAR0_LSB_ADDRESS_SPACE = 31; +static const uint32_t EXPLR_OC_O0BAR0_LSB_ADDRESS_SPACE_LEN = 1; +static const uint32_t EXPLR_OC_O0BAR0_MSB = 0x00000014; +static const uint32_t EXPLR_OC_O0BAR0_MSB_BAR_ADDRESS = 0; +static const uint32_t EXPLR_OC_O0BAR0_MSB_BAR_ADDRESS_LEN = 32; +static const uint32_t EXPLR_OC_O0BAR1_LSB = 0x00000018; +static const uint32_t EXPLR_OC_O0BAR1_LSB_BAR_ADDRESS = 0; +static const uint32_t EXPLR_OC_O0BAR1_LSB_BAR_ADDRESS_LEN = 28; +static const uint32_t EXPLR_OC_O0BAR1_LSB_PREFETCHABLE = 28; +static const uint32_t EXPLR_OC_O0BAR1_LSB_PREFETCHABLE_LEN = 1; +static const uint32_t EXPLR_OC_O0BAR1_LSB_TYPE = 29; +static const uint32_t EXPLR_OC_O0BAR1_LSB_TYPE_LEN = 2; +static const uint32_t EXPLR_OC_O0BAR1_LSB_ADDRESS_SPACE = 31; +static const uint32_t EXPLR_OC_O0BAR1_LSB_ADDRESS_SPACE_LEN = 1; +static const uint32_t EXPLR_OC_O0BAR1_MSB = 0x0000001C; +static const uint32_t EXPLR_OC_O0BAR1_MSB_BAR_ADDRESS = 0; +static const uint32_t EXPLR_OC_O0BAR1_MSB_BAR_ADDRESS_LEN = 32; +static const uint32_t EXPLR_OC_O0BAR2_LSB = 0x00000020; +static const uint32_t EXPLR_OC_O0BAR2_LSB_BAR_ADDRESS = 0; +static const uint32_t EXPLR_OC_O0BAR2_LSB_BAR_ADDRESS_LEN = 28; +static const uint32_t EXPLR_OC_O0BAR2_LSB_PREFETCHABLE = 28; +static const uint32_t EXPLR_OC_O0BAR2_LSB_PREFETCHABLE_LEN = 1; +static const uint32_t EXPLR_OC_O0BAR2_LSB_TYPE = 29; +static const uint32_t EXPLR_OC_O0BAR2_LSB_TYPE_LEN = 2; +static const uint32_t EXPLR_OC_O0BAR2_LSB_ADDRESS_SPACE = 31; +static const uint32_t EXPLR_OC_O0BAR2_LSB_ADDRESS_SPACE_LEN = 1; +static const uint32_t EXPLR_OC_O0BAR2_MSB = 0x00000024; +static const uint32_t EXPLR_OC_O0BAR2_MSB_BAR_ADDRESS = 0; +static const uint32_t EXPLR_OC_O0BAR2_MSB_BAR_ADDRESS_LEN = 32; +static const uint32_t EXPLR_OC_O0SSYSID_LSB = 0x00000028; +static const uint32_t EXPLR_OC_O0SSYSID_MSB = 0x0000002C; +static const uint32_t EXPLR_OC_O0SSYSID_MSB_SUBSYSTEM_ID = 0; +static const uint32_t EXPLR_OC_O0SSYSID_MSB_SUBSYSTEM_ID_LEN = 16; +static const uint32_t EXPLR_OC_O0SSYSID_MSB_SUBSYSTEM_VENDOR_ID = 16; +static const uint32_t EXPLR_OC_O0SSYSID_MSB_SUBSYSTEM_VENDOR_ID_LEN = 16; +static const uint32_t EXPLR_OC_O0CAPPTR_O0ROMBAR_LSB = 0x00000030; +static const uint32_t EXPLR_OC_O0CAPPTR_O0ROMBAR_LSB_ROM_BASE = 0; +static const uint32_t EXPLR_OC_O0CAPPTR_O0ROMBAR_LSB_ROM_BASE_LEN = 21; +static const uint32_t EXPLR_OC_O0CAPPTR_O0ROMBAR_LSB_ROM_ENABLE = 31; +static const uint32_t EXPLR_OC_O0CAPPTR_O0ROMBAR_LSB_ROM_ENABLE_LEN = 1; +static const uint32_t EXPLR_OC_O0CAPPTR_O0ROMBAR_MSB = 0x00000034; +static const uint32_t EXPLR_OC_OVPD_LSB = 0x00000040; +static const uint32_t EXPLR_OC_OVPD_LSB_FLAG = 0; +static const uint32_t EXPLR_OC_OVPD_LSB_FLAG_LEN = 1; +static const uint32_t EXPLR_OC_OVPD_LSB_ADDRESS = 1; +static const uint32_t EXPLR_OC_OVPD_LSB_ADDRESS_LEN = 15; +static const uint32_t EXPLR_OC_OVPD_LSB_NEXT_POINTER = 16; +static const uint32_t EXPLR_OC_OVPD_LSB_NEXT_POINTER_LEN = 8; +static const uint32_t EXPLR_OC_OVPD_LSB_CAPABILITY_ID = 24; +static const uint32_t EXPLR_OC_OVPD_LSB_CAPABILITY_ID_LEN = 8; +static const uint32_t EXPLR_OC_OVPD_MSB = 0x00000044; +static const uint32_t EXPLR_OC_OVPD_MSB_DATA = 0; +static const uint32_t EXPLR_OC_OVPD_MSB_DATA_LEN = 32; +static const uint32_t EXPLR_OC_ODSNLO_ODSNCAP_LSB = 0x00000100; +static const uint32_t EXPLR_OC_ODSNLO_ODSNCAP_MSB = 0x00000104; +static const uint32_t EXPLR_OC_ODSNLO_ODSNCAP_MSB_DSN_LOW = 0; +static const uint32_t EXPLR_OC_ODSNLO_ODSNCAP_MSB_DSN_LOW_LEN = 32; +static const uint32_t EXPLR_OC_ODSNHI_LSB = 0x00000108; +static const uint32_t EXPLR_OC_ODSNHI_LSB_DSN_HIGH = 0; +static const uint32_t EXPLR_OC_ODSNHI_LSB_DSN_HIGH_LEN = 32; +static const uint32_t EXPLR_OC_ODSNHI_MSB = 0x0000010C; +static const uint32_t EXPLR_OC_OTLVID_OTLCAP_LSB = 0x00000200; +static const uint32_t EXPLR_OC_OTLVID_OTLCAP_MSB = 0x00000204; +static const uint32_t EXPLR_OC_OVERCAP_OTLID_LSB = 0x00000208; +static const uint32_t EXPLR_OC_OVERCAP_OTLID_MSB = 0x0000020C; +static const uint32_t EXPLR_OC_OVERCAP_OTLID_MSB_TL_MAJOR_VERSION_CAPABILITY = 0; +static const uint32_t EXPLR_OC_OVERCAP_OTLID_MSB_TL_MAJOR_VERSION_CAPABILITY_LEN = 8; +static const uint32_t EXPLR_OC_OVERCAP_OTLID_MSB_TL_MINOR_VERSION_CAPABILITY = 8; +static const uint32_t EXPLR_OC_OVERCAP_OTLID_MSB_TL_MINOR_VERSION_CAPABILITY_LEN = 8; +static const uint32_t EXPLR_OC_OVERCFG_LSB = 0x00000210; +static const uint32_t EXPLR_OC_OVERCFG_LSB_TL_MAJOR_VERSION_CONFIGURATION = 0; +static const uint32_t EXPLR_OC_OVERCFG_LSB_TL_MAJOR_VERSION_CONFIGURATION_LEN = 8; +static const uint32_t EXPLR_OC_OVERCFG_LSB_TL_MINOR_VERSION_CONFIGURATION = 8; +static const uint32_t EXPLR_OC_OVERCFG_LSB_TL_MINOR_VERSION_CONFIGURATION_LEN = 8; +static const uint32_t EXPLR_OC_OVERCFG_LSB_LONG_BACK_OFF_TIMER = 24; +static const uint32_t EXPLR_OC_OVERCFG_LSB_LONG_BACK_OFF_TIMER_LEN = 4; +static const uint32_t EXPLR_OC_OVERCFG_LSB_SHORT_BACK_OFF_TIMER = 28; +static const uint32_t EXPLR_OC_OVERCFG_LSB_SHORT_BACK_OFF_TIMER_LEN = 4; +static const uint32_t EXPLR_OC_OVERCFG_MSB = 0x00000214; +static const uint32_t EXPLR_OC_ORTCAP_LSB = 0x00000218; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_63 = 0; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_63_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_62 = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_62_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_61 = 2; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_61_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_60 = 3; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_60_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_59 = 4; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_59_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_58 = 5; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_58_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_57 = 6; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_57_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_56 = 7; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_56_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_55 = 8; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_55_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_54 = 9; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_54_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_53 = 10; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_53_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_52 = 11; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_52_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_51 = 12; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_51_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_50 = 13; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_50_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_49 = 14; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_49_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_48 = 15; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_48_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_47 = 16; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_47_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_46 = 17; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_46_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_45 = 18; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_45_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_44 = 19; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_44_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_43 = 20; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_43_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_42 = 21; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_42_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_41 = 22; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_41_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_40 = 23; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_40_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_39 = 24; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_39_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_38 = 25; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_38_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_37 = 26; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_37_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_36 = 27; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_36_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_35 = 28; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_35_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_34 = 29; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_34_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_33 = 30; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_33_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_32 = 31; +static const uint32_t EXPLR_OC_ORTCAP_LSB_TEMPLATE_32_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB = 0x0000021C; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_31 = 0; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_31_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_30 = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_30_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_29 = 2; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_29_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_28 = 3; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_28_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_27 = 4; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_27_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_26 = 5; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_26_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_25 = 6; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_25_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_24 = 7; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_24_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_23 = 8; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_23_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_22 = 9; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_22_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_21 = 10; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_21_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_20 = 11; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_20_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_19 = 12; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_19_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_18 = 13; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_18_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_17 = 14; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_17_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_16 = 15; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_16_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_15 = 16; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_15_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_14 = 17; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_14_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_13 = 18; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_13_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_12 = 19; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_12_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_11 = 20; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_11_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_10 = 21; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_10_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_9 = 22; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_9_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_8 = 23; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_8_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_7 = 24; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_7_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_6 = 25; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_6_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_5 = 26; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_5_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_4 = 27; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_4_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_3 = 28; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_3_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_2 = 29; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_2_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_1 = 30; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_1_LEN = 1; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_0 = 31; +static const uint32_t EXPLR_OC_ORTCAP_MSB_TEMPLATE_0_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB = 0x00000220; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_63 = 0; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_63_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_62 = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_62_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_61 = 2; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_61_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_60 = 3; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_60_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_59 = 4; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_59_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_58 = 5; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_58_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_57 = 6; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_57_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_56 = 7; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_56_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_55 = 8; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_55_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_54 = 9; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_54_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_53 = 10; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_53_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_52 = 11; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_52_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_51 = 12; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_51_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_50 = 13; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_50_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_49 = 14; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_49_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_48 = 15; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_48_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_47 = 16; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_47_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_46 = 17; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_46_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_45 = 18; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_45_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_44 = 19; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_44_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_43 = 20; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_43_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_42 = 21; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_42_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_41 = 22; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_41_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_40 = 23; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_40_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_39 = 24; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_39_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_38 = 25; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_38_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_37 = 26; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_37_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_36 = 27; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_36_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_35 = 28; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_35_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_34 = 29; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_34_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_33 = 30; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_33_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_32 = 31; +static const uint32_t EXPLR_OC_OTTCFG_LSB_TEMPLATE_32_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB = 0x00000224; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_31 = 0; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_31_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_30 = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_30_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_29 = 2; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_29_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_28 = 3; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_28_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_27 = 4; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_27_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_26 = 5; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_26_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_25 = 6; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_25_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_24 = 7; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_24_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_23 = 8; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_23_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_22 = 9; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_22_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_21 = 10; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_21_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_20 = 11; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_20_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_19 = 12; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_19_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_18 = 13; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_18_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_17 = 14; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_17_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_16 = 15; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_16_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_15 = 16; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_15_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_14 = 17; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_14_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_13 = 18; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_13_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_12 = 19; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_12_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_11 = 20; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_11_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_10 = 21; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_10_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_9 = 22; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_9_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_8 = 23; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_8_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_7 = 24; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_7_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_6 = 25; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_6_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_5 = 26; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_5_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_4 = 27; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_4_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_3 = 28; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_3_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_2 = 29; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_2_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_1 = 30; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_1_LEN = 1; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_0 = 31; +static const uint32_t EXPLR_OC_OTTCFG_MSB_TEMPLATE_0_LEN = 1; +static const uint32_t EXPLR_OC_ORRCAP10_LSB = 0x00000230; +static const uint32_t EXPLR_OC_ORRCAP10_LSB_TEMPLATE_63 = 0; +static const uint32_t EXPLR_OC_ORRCAP10_LSB_TEMPLATE_63_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP10_LSB_TEMPLATE_62 = 4; +static const uint32_t EXPLR_OC_ORRCAP10_LSB_TEMPLATE_62_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP10_LSB_TEMPLATE_61 = 8; +static const uint32_t EXPLR_OC_ORRCAP10_LSB_TEMPLATE_61_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP10_LSB_TEMPLATE_60 = 12; +static const uint32_t EXPLR_OC_ORRCAP10_LSB_TEMPLATE_60_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP10_LSB_TEMPLATE_59 = 16; +static const uint32_t EXPLR_OC_ORRCAP10_LSB_TEMPLATE_59_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP10_LSB_TEMPLATE_58 = 20; +static const uint32_t EXPLR_OC_ORRCAP10_LSB_TEMPLATE_58_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP10_LSB_TEMPLATE_57 = 24; +static const uint32_t EXPLR_OC_ORRCAP10_LSB_TEMPLATE_57_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP10_LSB_TEMPLATE_56 = 28; +static const uint32_t EXPLR_OC_ORRCAP10_LSB_TEMPLATE_56_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP10_MSB = 0x00000234; +static const uint32_t EXPLR_OC_ORRCAP10_MSB_TEMPLATE_55 = 0; +static const uint32_t EXPLR_OC_ORRCAP10_MSB_TEMPLATE_55_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP10_MSB_TEMPLATE_54 = 4; +static const uint32_t EXPLR_OC_ORRCAP10_MSB_TEMPLATE_54_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP10_MSB_TEMPLATE_53 = 8; +static const uint32_t EXPLR_OC_ORRCAP10_MSB_TEMPLATE_53_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP10_MSB_TEMPLATE_52 = 12; +static const uint32_t EXPLR_OC_ORRCAP10_MSB_TEMPLATE_52_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP10_MSB_TEMPLATE_51 = 16; +static const uint32_t EXPLR_OC_ORRCAP10_MSB_TEMPLATE_51_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP10_MSB_TEMPLATE_50 = 20; +static const uint32_t EXPLR_OC_ORRCAP10_MSB_TEMPLATE_50_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP10_MSB_TEMPLATE_49 = 24; +static const uint32_t EXPLR_OC_ORRCAP10_MSB_TEMPLATE_49_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP10_MSB_TEMPLATE_48 = 28; +static const uint32_t EXPLR_OC_ORRCAP10_MSB_TEMPLATE_48_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP32_LSB = 0x00000238; +static const uint32_t EXPLR_OC_ORRCAP32_LSB_TEMPLATE_47 = 0; +static const uint32_t EXPLR_OC_ORRCAP32_LSB_TEMPLATE_47_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP32_LSB_TEMPLATE_46 = 4; +static const uint32_t EXPLR_OC_ORRCAP32_LSB_TEMPLATE_46_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP32_LSB_TEMPLATE_45 = 8; +static const uint32_t EXPLR_OC_ORRCAP32_LSB_TEMPLATE_45_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP32_LSB_TEMPLATE_44 = 12; +static const uint32_t EXPLR_OC_ORRCAP32_LSB_TEMPLATE_44_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP32_LSB_TEMPLATE_43 = 16; +static const uint32_t EXPLR_OC_ORRCAP32_LSB_TEMPLATE_43_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP32_LSB_TEMPLATE_42 = 20; +static const uint32_t EXPLR_OC_ORRCAP32_LSB_TEMPLATE_42_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP32_LSB_TEMPLATE_41 = 24; +static const uint32_t EXPLR_OC_ORRCAP32_LSB_TEMPLATE_41_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP32_LSB_TEMPLATE_40 = 28; +static const uint32_t EXPLR_OC_ORRCAP32_LSB_TEMPLATE_40_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP32_MSB = 0x0000023C; +static const uint32_t EXPLR_OC_ORRCAP32_MSB_TEMPLATE_39 = 0; +static const uint32_t EXPLR_OC_ORRCAP32_MSB_TEMPLATE_39_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP32_MSB_TEMPLATE_38 = 4; +static const uint32_t EXPLR_OC_ORRCAP32_MSB_TEMPLATE_38_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP32_MSB_TEMPLATE_37 = 8; +static const uint32_t EXPLR_OC_ORRCAP32_MSB_TEMPLATE_37_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP32_MSB_TEMPLATE_36 = 12; +static const uint32_t EXPLR_OC_ORRCAP32_MSB_TEMPLATE_36_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP32_MSB_TEMPLATE_35 = 16; +static const uint32_t EXPLR_OC_ORRCAP32_MSB_TEMPLATE_35_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP32_MSB_TEMPLATE_34 = 20; +static const uint32_t EXPLR_OC_ORRCAP32_MSB_TEMPLATE_34_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP32_MSB_TEMPLATE_33 = 24; +static const uint32_t EXPLR_OC_ORRCAP32_MSB_TEMPLATE_33_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP32_MSB_TEMPLATE_32 = 28; +static const uint32_t EXPLR_OC_ORRCAP32_MSB_TEMPLATE_32_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP54_LSB = 0x00000240; +static const uint32_t EXPLR_OC_ORRCAP54_LSB_TEMPLATE_31 = 0; +static const uint32_t EXPLR_OC_ORRCAP54_LSB_TEMPLATE_31_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP54_LSB_TEMPLATE_30 = 4; +static const uint32_t EXPLR_OC_ORRCAP54_LSB_TEMPLATE_30_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP54_LSB_TEMPLATE_29 = 8; +static const uint32_t EXPLR_OC_ORRCAP54_LSB_TEMPLATE_29_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP54_LSB_TEMPLATE_28 = 12; +static const uint32_t EXPLR_OC_ORRCAP54_LSB_TEMPLATE_28_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP54_LSB_TEMPLATE_27 = 16; +static const uint32_t EXPLR_OC_ORRCAP54_LSB_TEMPLATE_27_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP54_LSB_TEMPLATE_26 = 20; +static const uint32_t EXPLR_OC_ORRCAP54_LSB_TEMPLATE_26_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP54_LSB_TEMPLATE_25 = 24; +static const uint32_t EXPLR_OC_ORRCAP54_LSB_TEMPLATE_25_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP54_LSB_TEMPLATE_24 = 28; +static const uint32_t EXPLR_OC_ORRCAP54_LSB_TEMPLATE_24_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP54_MSB = 0x00000244; +static const uint32_t EXPLR_OC_ORRCAP54_MSB_TEMPLATE_23 = 0; +static const uint32_t EXPLR_OC_ORRCAP54_MSB_TEMPLATE_23_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP54_MSB_TEMPLATE_22 = 4; +static const uint32_t EXPLR_OC_ORRCAP54_MSB_TEMPLATE_22_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP54_MSB_TEMPLATE_21 = 8; +static const uint32_t EXPLR_OC_ORRCAP54_MSB_TEMPLATE_21_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP54_MSB_TEMPLATE_20 = 12; +static const uint32_t EXPLR_OC_ORRCAP54_MSB_TEMPLATE_20_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP54_MSB_TEMPLATE_19 = 16; +static const uint32_t EXPLR_OC_ORRCAP54_MSB_TEMPLATE_19_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP54_MSB_TEMPLATE_18 = 20; +static const uint32_t EXPLR_OC_ORRCAP54_MSB_TEMPLATE_18_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP54_MSB_TEMPLATE_17 = 24; +static const uint32_t EXPLR_OC_ORRCAP54_MSB_TEMPLATE_17_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP54_MSB_TEMPLATE_16 = 28; +static const uint32_t EXPLR_OC_ORRCAP54_MSB_TEMPLATE_16_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP76_LSB = 0x00000248; +static const uint32_t EXPLR_OC_ORRCAP76_LSB_TEMPLATE_15 = 0; +static const uint32_t EXPLR_OC_ORRCAP76_LSB_TEMPLATE_15_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP76_LSB_TEMPLATE_14 = 4; +static const uint32_t EXPLR_OC_ORRCAP76_LSB_TEMPLATE_14_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP76_LSB_TEMPLATE_13 = 8; +static const uint32_t EXPLR_OC_ORRCAP76_LSB_TEMPLATE_13_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP76_LSB_TEMPLATE_12 = 12; +static const uint32_t EXPLR_OC_ORRCAP76_LSB_TEMPLATE_12_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP76_LSB_TEMPLATE_11 = 16; +static const uint32_t EXPLR_OC_ORRCAP76_LSB_TEMPLATE_11_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP76_LSB_TEMPLATE_10 = 20; +static const uint32_t EXPLR_OC_ORRCAP76_LSB_TEMPLATE_10_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP76_LSB_TEMPLATE_9 = 24; +static const uint32_t EXPLR_OC_ORRCAP76_LSB_TEMPLATE_9_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP76_LSB_TEMPLATE_8 = 28; +static const uint32_t EXPLR_OC_ORRCAP76_LSB_TEMPLATE_8_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP76_MSB = 0x0000024C; +static const uint32_t EXPLR_OC_ORRCAP76_MSB_TEMPLATE_7 = 0; +static const uint32_t EXPLR_OC_ORRCAP76_MSB_TEMPLATE_7_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP76_MSB_TEMPLATE_6 = 4; +static const uint32_t EXPLR_OC_ORRCAP76_MSB_TEMPLATE_6_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP76_MSB_TEMPLATE_5 = 8; +static const uint32_t EXPLR_OC_ORRCAP76_MSB_TEMPLATE_5_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP76_MSB_TEMPLATE_4 = 12; +static const uint32_t EXPLR_OC_ORRCAP76_MSB_TEMPLATE_4_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP76_MSB_TEMPLATE_3 = 16; +static const uint32_t EXPLR_OC_ORRCAP76_MSB_TEMPLATE_3_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP76_MSB_TEMPLATE_2 = 20; +static const uint32_t EXPLR_OC_ORRCAP76_MSB_TEMPLATE_2_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP76_MSB_TEMPLATE_1 = 24; +static const uint32_t EXPLR_OC_ORRCAP76_MSB_TEMPLATE_1_LEN = 4; +static const uint32_t EXPLR_OC_ORRCAP76_MSB_TEMPLATE_0 = 28; +static const uint32_t EXPLR_OC_ORRCAP76_MSB_TEMPLATE_0_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG10_LSB = 0x00000250; +static const uint32_t EXPLR_OC_OTRCFG10_LSB_TEMPLATE_63 = 0; +static const uint32_t EXPLR_OC_OTRCFG10_LSB_TEMPLATE_63_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG10_LSB_TEMPLATE_62 = 4; +static const uint32_t EXPLR_OC_OTRCFG10_LSB_TEMPLATE_62_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG10_LSB_TEMPLATE_61 = 8; +static const uint32_t EXPLR_OC_OTRCFG10_LSB_TEMPLATE_61_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG10_LSB_TEMPLATE_60 = 12; +static const uint32_t EXPLR_OC_OTRCFG10_LSB_TEMPLATE_60_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG10_LSB_TEMPLATE_59 = 16; +static const uint32_t EXPLR_OC_OTRCFG10_LSB_TEMPLATE_59_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG10_LSB_TEMPLATE_58 = 20; +static const uint32_t EXPLR_OC_OTRCFG10_LSB_TEMPLATE_58_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG10_LSB_TEMPLATE_57 = 24; +static const uint32_t EXPLR_OC_OTRCFG10_LSB_TEMPLATE_57_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG10_LSB_TEMPLATE_56 = 28; +static const uint32_t EXPLR_OC_OTRCFG10_LSB_TEMPLATE_56_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG10_MSB = 0x00000254; +static const uint32_t EXPLR_OC_OTRCFG10_MSB_TEMPLATE_55 = 0; +static const uint32_t EXPLR_OC_OTRCFG10_MSB_TEMPLATE_55_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG10_MSB_TEMPLATE_54 = 4; +static const uint32_t EXPLR_OC_OTRCFG10_MSB_TEMPLATE_54_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG10_MSB_TEMPLATE_53 = 8; +static const uint32_t EXPLR_OC_OTRCFG10_MSB_TEMPLATE_53_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG10_MSB_TEMPLATE_52 = 12; +static const uint32_t EXPLR_OC_OTRCFG10_MSB_TEMPLATE_52_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG10_MSB_TEMPLATE_51 = 16; +static const uint32_t EXPLR_OC_OTRCFG10_MSB_TEMPLATE_51_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG10_MSB_TEMPLATE_50 = 20; +static const uint32_t EXPLR_OC_OTRCFG10_MSB_TEMPLATE_50_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG10_MSB_TEMPLATE_49 = 24; +static const uint32_t EXPLR_OC_OTRCFG10_MSB_TEMPLATE_49_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG10_MSB_TEMPLATE_48 = 28; +static const uint32_t EXPLR_OC_OTRCFG10_MSB_TEMPLATE_48_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG32_LSB = 0x00000258; +static const uint32_t EXPLR_OC_OTRCFG32_LSB_TEMPLATE_47 = 0; +static const uint32_t EXPLR_OC_OTRCFG32_LSB_TEMPLATE_47_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG32_LSB_TEMPLATE_46 = 4; +static const uint32_t EXPLR_OC_OTRCFG32_LSB_TEMPLATE_46_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG32_LSB_TEMPLATE_45 = 8; +static const uint32_t EXPLR_OC_OTRCFG32_LSB_TEMPLATE_45_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG32_LSB_TEMPLATE_44 = 12; +static const uint32_t EXPLR_OC_OTRCFG32_LSB_TEMPLATE_44_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG32_LSB_TEMPLATE_43 = 16; +static const uint32_t EXPLR_OC_OTRCFG32_LSB_TEMPLATE_43_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG32_LSB_TEMPLATE_42 = 20; +static const uint32_t EXPLR_OC_OTRCFG32_LSB_TEMPLATE_42_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG32_LSB_TEMPLATE_41 = 24; +static const uint32_t EXPLR_OC_OTRCFG32_LSB_TEMPLATE_41_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG32_LSB_TEMPLATE_40 = 28; +static const uint32_t EXPLR_OC_OTRCFG32_LSB_TEMPLATE_40_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG32_MSB = 0x0000025C; +static const uint32_t EXPLR_OC_OTRCFG32_MSB_TEMPLATE_39 = 0; +static const uint32_t EXPLR_OC_OTRCFG32_MSB_TEMPLATE_39_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG32_MSB_TEMPLATE_38 = 4; +static const uint32_t EXPLR_OC_OTRCFG32_MSB_TEMPLATE_38_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG32_MSB_TEMPLATE_37 = 8; +static const uint32_t EXPLR_OC_OTRCFG32_MSB_TEMPLATE_37_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG32_MSB_TEMPLATE_36 = 12; +static const uint32_t EXPLR_OC_OTRCFG32_MSB_TEMPLATE_36_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG32_MSB_TEMPLATE_35 = 16; +static const uint32_t EXPLR_OC_OTRCFG32_MSB_TEMPLATE_35_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG32_MSB_TEMPLATE_34 = 20; +static const uint32_t EXPLR_OC_OTRCFG32_MSB_TEMPLATE_34_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG32_MSB_TEMPLATE_33 = 24; +static const uint32_t EXPLR_OC_OTRCFG32_MSB_TEMPLATE_33_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG32_MSB_TEMPLATE_32 = 28; +static const uint32_t EXPLR_OC_OTRCFG32_MSB_TEMPLATE_32_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG54_LSB = 0x00000260; +static const uint32_t EXPLR_OC_OTRCFG54_LSB_TEMPLATE_31 = 0; +static const uint32_t EXPLR_OC_OTRCFG54_LSB_TEMPLATE_31_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG54_LSB_TEMPLATE_30 = 4; +static const uint32_t EXPLR_OC_OTRCFG54_LSB_TEMPLATE_30_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG54_LSB_TEMPLATE_29 = 8; +static const uint32_t EXPLR_OC_OTRCFG54_LSB_TEMPLATE_29_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG54_LSB_TEMPLATE_28 = 12; +static const uint32_t EXPLR_OC_OTRCFG54_LSB_TEMPLATE_28_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG54_LSB_TEMPLATE_27 = 16; +static const uint32_t EXPLR_OC_OTRCFG54_LSB_TEMPLATE_27_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG54_LSB_TEMPLATE_26 = 20; +static const uint32_t EXPLR_OC_OTRCFG54_LSB_TEMPLATE_26_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG54_LSB_TEMPLATE_25 = 24; +static const uint32_t EXPLR_OC_OTRCFG54_LSB_TEMPLATE_25_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG54_LSB_TEMPLATE_24 = 28; +static const uint32_t EXPLR_OC_OTRCFG54_LSB_TEMPLATE_24_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG54_MSB = 0x00000264; +static const uint32_t EXPLR_OC_OTRCFG54_MSB_TEMPLATE_23 = 0; +static const uint32_t EXPLR_OC_OTRCFG54_MSB_TEMPLATE_23_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG54_MSB_TEMPLATE_22 = 4; +static const uint32_t EXPLR_OC_OTRCFG54_MSB_TEMPLATE_22_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG54_MSB_TEMPLATE_21 = 8; +static const uint32_t EXPLR_OC_OTRCFG54_MSB_TEMPLATE_21_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG54_MSB_TEMPLATE_20 = 12; +static const uint32_t EXPLR_OC_OTRCFG54_MSB_TEMPLATE_20_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG54_MSB_TEMPLATE_19 = 16; +static const uint32_t EXPLR_OC_OTRCFG54_MSB_TEMPLATE_19_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG54_MSB_TEMPLATE_18 = 20; +static const uint32_t EXPLR_OC_OTRCFG54_MSB_TEMPLATE_18_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG54_MSB_TEMPLATE_17 = 24; +static const uint32_t EXPLR_OC_OTRCFG54_MSB_TEMPLATE_17_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG54_MSB_TEMPLATE_16 = 28; +static const uint32_t EXPLR_OC_OTRCFG54_MSB_TEMPLATE_16_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG76_LSB = 0x00000268; +static const uint32_t EXPLR_OC_OTRCFG76_LSB_TEMPLATE_15 = 0; +static const uint32_t EXPLR_OC_OTRCFG76_LSB_TEMPLATE_15_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG76_LSB_TEMPLATE_14 = 4; +static const uint32_t EXPLR_OC_OTRCFG76_LSB_TEMPLATE_14_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG76_LSB_TEMPLATE_13 = 8; +static const uint32_t EXPLR_OC_OTRCFG76_LSB_TEMPLATE_13_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG76_LSB_TEMPLATE_12 = 12; +static const uint32_t EXPLR_OC_OTRCFG76_LSB_TEMPLATE_12_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG76_LSB_TEMPLATE_11 = 16; +static const uint32_t EXPLR_OC_OTRCFG76_LSB_TEMPLATE_11_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG76_LSB_TEMPLATE_10 = 20; +static const uint32_t EXPLR_OC_OTRCFG76_LSB_TEMPLATE_10_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG76_LSB_TEMPLATE_9 = 24; +static const uint32_t EXPLR_OC_OTRCFG76_LSB_TEMPLATE_9_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG76_LSB_TEMPLATE_8 = 28; +static const uint32_t EXPLR_OC_OTRCFG76_LSB_TEMPLATE_8_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG76_MSB = 0x0000026C; +static const uint32_t EXPLR_OC_OTRCFG76_MSB_TEMPLATE_7 = 0; +static const uint32_t EXPLR_OC_OTRCFG76_MSB_TEMPLATE_7_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG76_MSB_TEMPLATE_6 = 4; +static const uint32_t EXPLR_OC_OTRCFG76_MSB_TEMPLATE_6_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG76_MSB_TEMPLATE_5 = 8; +static const uint32_t EXPLR_OC_OTRCFG76_MSB_TEMPLATE_5_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG76_MSB_TEMPLATE_4 = 12; +static const uint32_t EXPLR_OC_OTRCFG76_MSB_TEMPLATE_4_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG76_MSB_TEMPLATE_3 = 16; +static const uint32_t EXPLR_OC_OTRCFG76_MSB_TEMPLATE_3_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG76_MSB_TEMPLATE_2 = 20; +static const uint32_t EXPLR_OC_OTRCFG76_MSB_TEMPLATE_2_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG76_MSB_TEMPLATE_1 = 24; +static const uint32_t EXPLR_OC_OTRCFG76_MSB_TEMPLATE_1_LEN = 4; +static const uint32_t EXPLR_OC_OTRCFG76_MSB_TEMPLATE_0 = 28; +static const uint32_t EXPLR_OC_OTRCFG76_MSB_TEMPLATE_0_LEN = 4; +static const uint32_t EXPLR_OC_O0FNVID_O0FNCAP_LSB = 0x00000300; +static const uint32_t EXPLR_OC_O0FNVID_O0FNCAP_MSB = 0x00000304; +static const uint32_t EXPLR_OC_O0ACTAG_O0FNID_LSB = 0x00000308; +static const uint32_t EXPLR_OC_O0ACTAG_O0FNID_LSB_AFU_PRESENT = 0; +static const uint32_t EXPLR_OC_O0ACTAG_O0FNID_LSB_AFU_PRESENT_LEN = 1; +static const uint32_t EXPLR_OC_O0ACTAG_O0FNID_LSB_MAX_AFU_INDEX = 2; +static const uint32_t EXPLR_OC_O0ACTAG_O0FNID_LSB_MAX_AFU_INDEX_LEN = 6; +static const uint32_t EXPLR_OC_O0ACTAG_O0FNID_LSB_FUNCTION_RESET = 8; +static const uint32_t EXPLR_OC_O0ACTAG_O0FNID_LSB_FUNCTION_RESET_LEN = 1; +static const uint32_t EXPLR_OC_O0ACTAG_O0FNID_LSB_DVSEC_ID = 16; +static const uint32_t EXPLR_OC_O0ACTAG_O0FNID_LSB_DVSEC_ID_LEN = 16; +static const uint32_t EXPLR_OC_O0ACTAG_O0FNID_MSB = 0x0000030C; +static const uint32_t EXPLR_OC_O0ACTAG_O0FNID_MSB_ACTAG_BASE = 4; +static const uint32_t EXPLR_OC_O0ACTAG_O0FNID_MSB_ACTAG_BASE_LEN = 12; +static const uint32_t EXPLR_OC_O0ACTAG_O0FNID_MSB_ACTAG_LENGTH = 20; +static const uint32_t EXPLR_OC_O0ACTAG_O0FNID_MSB_ACTAG_LENGTH_LEN = 12; +static const uint32_t EXPLR_OC_O0VSVID_O0VSCAP_LSB = 0x00000600; +static const uint32_t EXPLR_OC_O0VSVID_O0VSCAP_MSB = 0x00000604; +static const uint32_t EXPLR_OC_O0VSID_LSB = 0x00000608; +static const uint32_t EXPLR_OC_O0VSID_LSB_VENDOR_UNIQUE = 0; +static const uint32_t EXPLR_OC_O0VSID_LSB_VENDOR_UNIQUE_LEN = 16; +static const uint32_t EXPLR_OC_O0VSID_LSB_DVSEC_ID = 16; +static const uint32_t EXPLR_OC_O0VSID_LSB_DVSEC_ID_LEN = 16; +static const uint32_t EXPLR_OC_O0VSID_MSB = 0x0000060C; +static const uint32_t EXPLR_OC_O0VSTLXA_LSB = 0x00000610; +static const uint32_t EXPLR_OC_O0VSTLXA_LSB_TLX_PORT0 = 0; +static const uint32_t EXPLR_OC_O0VSTLXA_LSB_TLX_PORT0_LEN = 32; +static const uint32_t EXPLR_OC_O0VSTLXA_MSB = 0x00000614; +static const uint32_t EXPLR_OC_O0VSTLXA_MSB_TLX_PORT1 = 0; +static const uint32_t EXPLR_OC_O0VSTLXA_MSB_TLX_PORT1_LEN = 32; +static const uint32_t EXPLR_OC_O0VSTLXB_LSB = 0x00000618; +static const uint32_t EXPLR_OC_O0VSTLXB_LSB_TLX_PORT2 = 0; +static const uint32_t EXPLR_OC_O0VSTLXB_LSB_TLX_PORT2_LEN = 32; +static const uint32_t EXPLR_OC_O0VSTLXB_MSB = 0x0000061C; +static const uint32_t EXPLR_OC_O0VSTLXB_MSB_TLX_PORT3 = 0; +static const uint32_t EXPLR_OC_O0VSTLXB_MSB_TLX_PORT3_LEN = 32; +static const uint32_t EXPLR_OC_O0VSDLXA_LSB = 0x00000620; +static const uint32_t EXPLR_OC_O0VSDLXA_LSB_DLX_PORT0 = 0; +static const uint32_t EXPLR_OC_O0VSDLXA_LSB_DLX_PORT0_LEN = 32; +static const uint32_t EXPLR_OC_O0VSDLXA_MSB = 0x00000624; +static const uint32_t EXPLR_OC_O0VSDLXA_MSB_DLX_PORT1 = 0; +static const uint32_t EXPLR_OC_O0VSDLXA_MSB_DLX_PORT1_LEN = 32; +static const uint32_t EXPLR_OC_O0VSDLXB_LSB = 0x00000628; +static const uint32_t EXPLR_OC_O0VSDLXB_LSB_DLX_PORT2 = 0; +static const uint32_t EXPLR_OC_O0VSDLXB_LSB_DLX_PORT2_LEN = 32; +static const uint32_t EXPLR_OC_O0VSDLXB_MSB = 0x0000062C; +static const uint32_t EXPLR_OC_O0VSDLXB_MSB_DLX_PORT3 = 0; +static const uint32_t EXPLR_OC_O0VSDLXB_MSB_DLX_PORT3_LEN = 32; +static const uint32_t EXPLR_OC_O0VSFLSH_LSB = 0x00000630; +static const uint32_t EXPLR_OC_O0VSFLSH_LSB_CONTROL = 12; +static const uint32_t EXPLR_OC_O0VSFLSH_LSB_CONTROL_LEN = 20; +static const uint32_t EXPLR_OC_O0VSFLSH_MSB = 0x00000634; +static const uint32_t EXPLR_OC_O0VSFLSH_MSB_DATA = 0; +static const uint32_t EXPLR_OC_O0VSFLSH_MSB_DATA_LEN = 32; +static const uint32_t EXPLR_OC_O1MBIT_O1DID_LSB = 0x00010000; +static const uint32_t EXPLR_OC_O1MBIT_O1DID_LSB_DEVICE_ID = 0; +static const uint32_t EXPLR_OC_O1MBIT_O1DID_LSB_DEVICE_ID_LEN = 16; +static const uint32_t EXPLR_OC_O1MBIT_O1DID_LSB_VENDOR_ID = 16; +static const uint32_t EXPLR_OC_O1MBIT_O1DID_LSB_VENDOR_ID_LEN = 16; +static const uint32_t EXPLR_OC_O1MBIT_O1DID_MSB = 0x00010004; +static const uint32_t EXPLR_OC_O1MBIT_O1DID_MSB_CAPABILITIES_LIST = 11; +static const uint32_t EXPLR_OC_O1MBIT_O1DID_MSB_CAPABILITIES_LIST_LEN = 1; +static const uint32_t EXPLR_OC_O1MBIT_O1DID_MSB_MEMORY_SPACE = 30; +static const uint32_t EXPLR_OC_O1MBIT_O1DID_MSB_MEMORY_SPACE_LEN = 1; +static const uint32_t EXPLR_OC_O1CCD_LSB = 0x00010008; +static const uint32_t EXPLR_OC_O1CCD_LSB_CLASS_CODE = 0; +static const uint32_t EXPLR_OC_O1CCD_LSB_CLASS_CODE_LEN = 24; +static const uint32_t EXPLR_OC_O1CCD_LSB_REVISION_ID = 24; +static const uint32_t EXPLR_OC_O1CCD_LSB_REVISION_ID_LEN = 8; +static const uint32_t EXPLR_OC_O1CCD_MSB = 0x0001000C; +static const uint32_t EXPLR_OC_O1CCD_MSB_MULTI_FUNCTION = 8; +static const uint32_t EXPLR_OC_O1CCD_MSB_MULTI_FUNCTION_LEN = 1; +static const uint32_t EXPLR_OC_O1BAR0_LSB = 0x00010010; +static const uint32_t EXPLR_OC_O1BAR0_LSB_PREFETCHABLE = 28; +static const uint32_t EXPLR_OC_O1BAR0_LSB_PREFETCHABLE_LEN = 1; +static const uint32_t EXPLR_OC_O1BAR0_LSB_TYPE = 29; +static const uint32_t EXPLR_OC_O1BAR0_LSB_TYPE_LEN = 2; +static const uint32_t EXPLR_OC_O1BAR0_LSB_ADDRESS_SPACE = 31; +static const uint32_t EXPLR_OC_O1BAR0_LSB_ADDRESS_SPACE_LEN = 1; +static const uint32_t EXPLR_OC_O1BAR0_MSB = 0x00010014; +static const uint32_t EXPLR_OC_O1BAR0_MSB_BAR_ADDRESS = 0; +static const uint32_t EXPLR_OC_O1BAR0_MSB_BAR_ADDRESS_LEN = 29; +static const uint32_t EXPLR_OC_O1BAR1_LSB = 0x00010018; +static const uint32_t EXPLR_OC_O1BAR1_LSB_BAR_ADDRESS = 0; +static const uint32_t EXPLR_OC_O1BAR1_LSB_BAR_ADDRESS_LEN = 28; +static const uint32_t EXPLR_OC_O1BAR1_LSB_PREFETCHABLE = 28; +static const uint32_t EXPLR_OC_O1BAR1_LSB_PREFETCHABLE_LEN = 1; +static const uint32_t EXPLR_OC_O1BAR1_LSB_TYPE = 29; +static const uint32_t EXPLR_OC_O1BAR1_LSB_TYPE_LEN = 2; +static const uint32_t EXPLR_OC_O1BAR1_LSB_ADDRESS_SPACE = 31; +static const uint32_t EXPLR_OC_O1BAR1_LSB_ADDRESS_SPACE_LEN = 1; +static const uint32_t EXPLR_OC_O1BAR1_MSB = 0x0001001C; +static const uint32_t EXPLR_OC_O1BAR1_MSB_BAR_ADDRESS = 0; +static const uint32_t EXPLR_OC_O1BAR1_MSB_BAR_ADDRESS_LEN = 32; +static const uint32_t EXPLR_OC_O1BAR2_LSB = 0x00010020; +static const uint32_t EXPLR_OC_O1BAR2_LSB_BAR_ADDRESS = 0; +static const uint32_t EXPLR_OC_O1BAR2_LSB_BAR_ADDRESS_LEN = 28; +static const uint32_t EXPLR_OC_O1BAR2_LSB_PREFETCHABLE = 28; +static const uint32_t EXPLR_OC_O1BAR2_LSB_PREFETCHABLE_LEN = 1; +static const uint32_t EXPLR_OC_O1BAR2_LSB_TYPE = 29; +static const uint32_t EXPLR_OC_O1BAR2_LSB_TYPE_LEN = 2; +static const uint32_t EXPLR_OC_O1BAR2_LSB_ADDRESS_SPACE = 31; +static const uint32_t EXPLR_OC_O1BAR2_LSB_ADDRESS_SPACE_LEN = 1; +static const uint32_t EXPLR_OC_O1BAR2_MSB = 0x00010024; +static const uint32_t EXPLR_OC_O1BAR2_MSB_BAR_ADDRESS = 0; +static const uint32_t EXPLR_OC_O1BAR2_MSB_BAR_ADDRESS_LEN = 32; +static const uint32_t EXPLR_OC_O1SSYSID_LSB = 0x00010028; +static const uint32_t EXPLR_OC_O1SSYSID_MSB = 0x0001002C; +static const uint32_t EXPLR_OC_O1SSYSID_MSB_SUBSYSTEM_ID = 0; +static const uint32_t EXPLR_OC_O1SSYSID_MSB_SUBSYSTEM_ID_LEN = 16; +static const uint32_t EXPLR_OC_O1SSYSID_MSB_SUBSYSTEM_VENDOR_ID = 16; +static const uint32_t EXPLR_OC_O1SSYSID_MSB_SUBSYSTEM_VENDOR_ID_LEN = 16; +static const uint32_t EXPLR_OC_O1CAPPTR_O1ROMBAR_LSB = 0x00010030; +static const uint32_t EXPLR_OC_O1CAPPTR_O1ROMBAR_LSB_ROM_BASE = 0; +static const uint32_t EXPLR_OC_O1CAPPTR_O1ROMBAR_LSB_ROM_BASE_LEN = 21; +static const uint32_t EXPLR_OC_O1CAPPTR_O1ROMBAR_LSB_ROM_ENABLE = 31; +static const uint32_t EXPLR_OC_O1CAPPTR_O1ROMBAR_LSB_ROM_ENABLE_LEN = 1; +static const uint32_t EXPLR_OC_O1CAPPTR_O1ROMBAR_MSB = 0x00010034; +static const uint32_t EXPLR_OC_OPASID_LSB = 0x00010100; +static const uint32_t EXPLR_OC_OPASID_MSB = 0x00010104; +static const uint32_t EXPLR_OC_OPASID_MSB_MAX_PASID_WIDTH = 19; +static const uint32_t EXPLR_OC_OPASID_MSB_MAX_PASID_WIDTH_LEN = 5; +static const uint32_t EXPLR_OC_O1FNVID_O1FNCAP_LSB = 0x00010300; +static const uint32_t EXPLR_OC_O1FNVID_O1FNCAP_MSB = 0x00010304; +static const uint32_t EXPLR_OC_O1ACTAG_O1FNID_LSB = 0x00010308; +static const uint32_t EXPLR_OC_O1ACTAG_O1FNID_LSB_AFU_PRESENT = 0; +static const uint32_t EXPLR_OC_O1ACTAG_O1FNID_LSB_AFU_PRESENT_LEN = 1; +static const uint32_t EXPLR_OC_O1ACTAG_O1FNID_LSB_MAX_AFU_INDEX = 2; +static const uint32_t EXPLR_OC_O1ACTAG_O1FNID_LSB_MAX_AFU_INDEX_LEN = 6; +static const uint32_t EXPLR_OC_O1ACTAG_O1FNID_LSB_FUNCTION_RESET = 8; +static const uint32_t EXPLR_OC_O1ACTAG_O1FNID_LSB_FUNCTION_RESET_LEN = 1; +static const uint32_t EXPLR_OC_O1ACTAG_O1FNID_LSB_DVSEC_ID = 16; +static const uint32_t EXPLR_OC_O1ACTAG_O1FNID_LSB_DVSEC_ID_LEN = 16; +static const uint32_t EXPLR_OC_O1ACTAG_O1FNID_MSB = 0x0001030C; +static const uint32_t EXPLR_OC_O1ACTAG_O1FNID_MSB_ACTAG_BASE = 4; +static const uint32_t EXPLR_OC_O1ACTAG_O1FNID_MSB_ACTAG_BASE_LEN = 12; +static const uint32_t EXPLR_OC_O1ACTAG_O1FNID_MSB_ACTAG_LENGTH = 20; +static const uint32_t EXPLR_OC_O1ACTAG_O1FNID_MSB_ACTAG_LENGTH_LEN = 12; +static const uint32_t EXPLR_OC_O1INFVID_O1INFCAP_LSB = 0x00010400; +static const uint32_t EXPLR_OC_O1INFVID_O1INFCAP_MSB = 0x00010404; +static const uint32_t EXPLR_OC_O1INFOFF_O1INFID_LSB = 0x00010408; +static const uint32_t EXPLR_OC_O1INFOFF_O1INFID_LSB_AFU_INFO_INDEX = 10; +static const uint32_t EXPLR_OC_O1INFOFF_O1INFID_LSB_AFU_INFO_INDEX_LEN = 6; +static const uint32_t EXPLR_OC_O1INFOFF_O1INFID_LSB_DVSEC_ID = 16; +static const uint32_t EXPLR_OC_O1INFOFF_O1INFID_LSB_DVSEC_ID_LEN = 16; +static const uint32_t EXPLR_OC_O1INFOFF_O1INFID_MSB = 0x0001040C; +static const uint32_t EXPLR_OC_O1INFOFF_O1INFID_MSB_DATA_VALID = 0; +static const uint32_t EXPLR_OC_O1INFOFF_O1INFID_MSB_DATA_VALID_LEN = 1; +static const uint32_t EXPLR_OC_O1INFOFF_O1INFID_MSB_AFU_DESCRIPTOR_OFFSET = 1; +static const uint32_t EXPLR_OC_O1INFOFF_O1INFID_MSB_AFU_DESCRIPTOR_OFFSET_LEN = 31; +static const uint32_t EXPLR_OC_O1INFDAT_LSB = 0x00010410; +static const uint32_t EXPLR_OC_O1INFDAT_LSB_AFU_DESCRIPTOR_DATA = 0; +static const uint32_t EXPLR_OC_O1INFDAT_LSB_AFU_DESCRIPTOR_DATA_LEN = 32; +static const uint32_t EXPLR_OC_O1INFDAT_MSB = 0x00010414; +static const uint32_t EXPLR_OC_OCTRLVID_OCTRLCAP_LSB = 0x00010500; +static const uint32_t EXPLR_OC_OCTRLVID_OCTRLCAP_MSB = 0x00010504; +static const uint32_t EXPLR_OC_OCTRLENB_OCTRLID_LSB = 0x00010508; +static const uint32_t EXPLR_OC_OCTRLENB_OCTRLID_LSB_AFU_CONTROL_INDEX = 10; +static const uint32_t EXPLR_OC_OCTRLENB_OCTRLID_LSB_AFU_CONTROL_INDEX_LEN = 6; +static const uint32_t EXPLR_OC_OCTRLENB_OCTRLID_LSB_DVSEC_ID = 16; +static const uint32_t EXPLR_OC_OCTRLENB_OCTRLID_LSB_DVSEC_ID_LEN = 16; +static const uint32_t EXPLR_OC_OCTRLENB_OCTRLID_MSB = 0x0001050C; +static const uint32_t EXPLR_OC_OCTRLENB_OCTRLID_MSB_AFU_UNIQUE = 0; +static const uint32_t EXPLR_OC_OCTRLENB_OCTRLID_MSB_AFU_UNIQUE_LEN = 4; +static const uint32_t EXPLR_OC_OCTRLENB_OCTRLID_MSB_FENCE_AFU = 6; +static const uint32_t EXPLR_OC_OCTRLENB_OCTRLID_MSB_FENCE_AFU_LEN = 1; +static const uint32_t EXPLR_OC_OCTRLENB_OCTRLID_MSB_ENABLE_AFU = 7; +static const uint32_t EXPLR_OC_OCTRLENB_OCTRLID_MSB_ENABLE_AFU_LEN = 1; +static const uint32_t EXPLR_OC_OCTRLENB_OCTRLID_MSB_RESET_AFU = 8; +static const uint32_t EXPLR_OC_OCTRLENB_OCTRLID_MSB_RESET_AFU_LEN = 1; +static const uint32_t EXPLR_OC_OCTRLENB_OCTRLID_MSB_TERMINATE_VALID = 11; +static const uint32_t EXPLR_OC_OCTRLENB_OCTRLID_MSB_TERMINATE_VALID_LEN = 1; +static const uint32_t EXPLR_OC_OCTRLENB_OCTRLID_MSB_PASID_TERMINATION_VALUE = 12; +static const uint32_t EXPLR_OC_OCTRLENB_OCTRLID_MSB_PASID_TERMINATION_VALUE_LEN = 20; +static const uint32_t EXPLR_OC_OCTRLPID_LSB = 0x00010510; +static const uint32_t EXPLR_OC_OCTRLPID_LSB_PASID_LENGTH_ENABLED = 19; +static const uint32_t EXPLR_OC_OCTRLPID_LSB_PASID_LENGTH_ENABLED_LEN = 5; +static const uint32_t EXPLR_OC_OCTRLPID_LSB_PASID_LENGTH_SUPPORTED = 27; +static const uint32_t EXPLR_OC_OCTRLPID_LSB_PASID_LENGTH_SUPPORTED_LEN = 5; +static const uint32_t EXPLR_OC_OCTRLPID_MSB = 0x00010514; +static const uint32_t EXPLR_OC_OCTRLPID_MSB_METADATA_SUPPORTED = 0; +static const uint32_t EXPLR_OC_OCTRLPID_MSB_METADATA_SUPPORTED_LEN = 1; +static const uint32_t EXPLR_OC_OCTRLPID_MSB_METADATA_ENABLED = 1; +static const uint32_t EXPLR_OC_OCTRLPID_MSB_METADATA_ENABLED_LEN = 1; +static const uint32_t EXPLR_OC_OCTRLPID_MSB_HTRL = 2; +static const uint32_t EXPLR_OC_OCTRLPID_MSB_HTRL_LEN = 3; +static const uint32_t EXPLR_OC_OCTRLPID_MSB_PASID_BASE = 12; +static const uint32_t EXPLR_OC_OCTRLPID_MSB_PASID_BASE_LEN = 20; +static const uint32_t EXPLR_OC_OCTRLTAG_LSB = 0x00010518; +static const uint32_t EXPLR_OC_OCTRLTAG_LSB_AFU_ACTAG_LENGTH_ENABLED = 4; +static const uint32_t EXPLR_OC_OCTRLTAG_LSB_AFU_ACTAG_LENGTH_ENABLED_LEN = 12; +static const uint32_t EXPLR_OC_OCTRLTAG_LSB_AFU_ACTAG_LENGTH_SUPPORTED = 20; +static const uint32_t EXPLR_OC_OCTRLTAG_LSB_AFU_ACTAG_LENGTH_SUPPORTED_LEN = 12; +static const uint32_t EXPLR_OC_OCTRLTAG_MSB = 0x0001051C; +static const uint32_t EXPLR_OC_OCTRLTAG_MSB_AFU_ACTAG_BASE = 20; +static const uint32_t EXPLR_OC_OCTRLTAG_MSB_AFU_ACTAG_BASE_LEN = 12; +static const uint32_t EXPLR_OC_O1VSVID_O1VSCAP_LSB = 0x00010600; +static const uint32_t EXPLR_OC_O1VSVID_O1VSCAP_MSB = 0x00010604; +static const uint32_t EXPLR_OC_O1VSID_LSB = 0x00010608; +static const uint32_t EXPLR_OC_O1VSID_LSB_VENDOR_UNIQUE = 0; +static const uint32_t EXPLR_OC_O1VSID_LSB_VENDOR_UNIQUE_LEN = 16; +static const uint32_t EXPLR_OC_O1VSID_LSB_DVSEC_ID = 16; +static const uint32_t EXPLR_OC_O1VSID_LSB_DVSEC_ID_LEN = 16; +static const uint32_t EXPLR_OC_O1VSID_MSB = 0x0001060C; + +#endif diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_omi_init.C b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_omi_init.C index 2dabce66b..0620d2ba5 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_omi_init.C +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_omi_init.C @@ -31,3 +31,653 @@ // *HWP Team: // *HWP Level: 2 // *HWP Consumed by: HB + +#include <exp_omi_init.H> +#include <exp_oc_regs.H> +#include <exp_inband.H> +#include <chips/common/utils/chipids.H> + +/// +/// @brief Verify we know how to talk to the connected device +/// +/// @param[in] i_target Explorer to initialize +/// +/// @return fapi2:ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +/// +fapi2::ReturnCode omiDeviceVerify(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target) +{ + FAPI_DBG("Start"); + fapi2::buffer<uint32_t> l_data; + + FAPI_TRY(mss::exp::ib::getOCCfg(i_target, EXPLR_OC_O0MBIT_O0DID_LSB, l_data)); + + FAPI_ASSERT(l_data == ((POWER_OCID::EXPLORER << 16) | (POWER_OCID::VENDOR_IBM)), + fapi2::OCMB_IS_NOT_EXPLORER() + .set_TARGET(i_target) + .set_ID(l_data), + "Explorer ID was not found"); + +fapi_try_exit: + + FAPI_DBG("Exiting with return code : 0x%08X...", (uint64_t) fapi2::current_err); + return fapi2::current_err; +} + + +/// +/// @brief Set the upstream templates and pacing +/// +/// @param[in] i_target Explorer to initialize +/// +/// @return fapi2:ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +/// +fapi2::ReturnCode omiSetUpstreamTemplates(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target) +{ + //Expected dnstream 0,1,4 to OCMB + //Expected upstream 0,5,9 to Axone + fapi2::buffer<uint32_t> l_data; + fapi2::ATTR_EXPLR_ENABLE_US_TMPL_1_Type l_enable_tmpl_1; + fapi2::ATTR_EXPLR_ENABLE_US_TMPL_5_Type l_enable_tmpl_5; + fapi2::ATTR_EXPLR_ENABLE_US_TMPL_9_Type l_enable_tmpl_9; + fapi2::ATTR_EXPLR_ENABLE_US_TMPL_B_Type l_enable_tmpl_B; + fapi2::ATTR_EXPLR_TMPL_0_PACING_Type l_tmpl_0_pacing; + fapi2::ATTR_EXPLR_TMPL_1_PACING_Type l_tmpl_1_pacing; + fapi2::ATTR_EXPLR_TMPL_5_PACING_Type l_tmpl_5_pacing; + fapi2::ATTR_EXPLR_TMPL_9_PACING_Type l_tmpl_9_pacing; + fapi2::ATTR_EXPLR_TMPL_B_PACING_Type l_tmpl_B_pacing; + + fapi2::ATTR_CHIP_EC_FEATURE_US_TEMPLATES_0159_Type l_us_only_0159; + + auto const& l_proc = i_target.getParent<fapi2::TARGET_TYPE_OMI>() + .getParent<fapi2::TARGET_TYPE_PROC_CHIP>(); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_US_TEMPLATES_0159, + l_proc, + l_us_only_0159), + "Error from FAPI_ATTR_GET (ATTR_CHIP_EC_FEATURE_US_TEMPLATES_0159)"); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_EXPLR_ENABLE_US_TMPL_1, + i_target, + l_enable_tmpl_1), + "Error from FAPI_ATTR_GET (ATTR_EXPLR_ENABLE_US_TMPL_1)"); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_EXPLR_ENABLE_US_TMPL_5, + i_target, + l_enable_tmpl_5), + "Error from FAPI_ATTR_GET (ATTR_EXPLR_ENABLE_US_TMPL_5)"); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_EXPLR_ENABLE_US_TMPL_9, + i_target, + l_enable_tmpl_9), + "Error from FAPI_ATTR_GET (ATTR_EXPLR_ENABLE_US_TMPL_9)"); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_EXPLR_ENABLE_US_TMPL_B, + i_target, + l_enable_tmpl_B), + "Error from FAPI_ATTR_GET (ATTR_EXPLR_ENABLE_US_TMPL_B)"); + + FAPI_ASSERT(!l_us_only_0159 || !l_enable_tmpl_B, + fapi2::PROC_DOES_NOT_SUPPORT_US_B() + .set_TARGET(l_proc) + .set_B(l_enable_tmpl_B), + "Upstream template B requested, but not supported by proc"); + + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_EXPLR_TMPL_0_PACING, + i_target, + l_tmpl_0_pacing), + "Error from FAPI_ATTR_GET (ATTR_EXPLR_TMPL_0_PACING)"); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_EXPLR_TMPL_1_PACING, + i_target, + l_tmpl_1_pacing), + "Error from FAPI_ATTR_GET (ATTR_EXPLR_TMPL_1_PACING)"); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_EXPLR_TMPL_5_PACING, + i_target, + l_tmpl_5_pacing), + "Error from FAPI_ATTR_GET (ATTR_EXPLR_TMPL_5_PACING)"); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_EXPLR_TMPL_9_PACING, + i_target, + l_tmpl_9_pacing), + "Error from FAPI_ATTR_GET (ATTR_EXPLR_TMPL_9_PACING)"); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_EXPLR_TMPL_B_PACING, + i_target, + l_tmpl_B_pacing), + "Error from FAPI_ATTR_GET (ATTR_EXPLR_TMPL_B_PACING)"); + + + l_data.setBit<EXPLR_OC_OTTCFG_MSB_TEMPLATE_0>(); //Template 0 + + l_data.writeBit<EXPLR_OC_OTTCFG_MSB_TEMPLATE_1> + (l_enable_tmpl_1 == fapi2::ENUM_ATTR_EXPLR_ENABLE_US_TMPL_1_ENABLED); //Template 1 + l_data.writeBit<EXPLR_OC_OTTCFG_MSB_TEMPLATE_5> + (l_enable_tmpl_5 == fapi2::ENUM_ATTR_EXPLR_ENABLE_US_TMPL_5_ENABLED); //Template 5 + l_data.writeBit<EXPLR_OC_OTTCFG_MSB_TEMPLATE_9> + (l_enable_tmpl_9 == fapi2::ENUM_ATTR_EXPLR_ENABLE_US_TMPL_9_ENABLED); //Template 9 + l_data.writeBit<EXPLR_OC_OTTCFG_MSB_TEMPLATE_11> + (l_enable_tmpl_B == fapi2::ENUM_ATTR_EXPLR_ENABLE_US_TMPL_B_ENABLED); //Template B + + + FAPI_TRY(mss::exp::ib::putOCCfg(i_target, EXPLR_OC_OTTCFG_MSB, l_data)); + + //Update template pacing + l_data.flush<0>(); + l_data.insertFromRight<EXPLR_OC_OTRCFG76_MSB_TEMPLATE_0, + EXPLR_OC_OTRCFG76_MSB_TEMPLATE_0_LEN>(l_tmpl_0_pacing); + FAPI_DBG("Upstream template 0 enabled with pacing %X", l_tmpl_0_pacing); + + if (l_enable_tmpl_1 == fapi2::ENUM_ATTR_EXPLR_ENABLE_US_TMPL_1_ENABLED) + { + l_data.insertFromRight<EXPLR_OC_OTRCFG76_MSB_TEMPLATE_1, + EXPLR_OC_OTRCFG76_MSB_TEMPLATE_1_LEN>(l_tmpl_1_pacing); + FAPI_DBG("WARNING Upstream template 1 enabled with pacing %X", l_tmpl_1_pacing); + } + + if (l_enable_tmpl_5 == fapi2::ENUM_ATTR_EXPLR_ENABLE_US_TMPL_5_ENABLED) + { + l_data.insertFromRight<EXPLR_OC_OTRCFG76_MSB_TEMPLATE_5, + EXPLR_OC_OTRCFG76_MSB_TEMPLATE_5_LEN>(l_tmpl_5_pacing); + FAPI_DBG("Upstream template 5 enabled with pacing %X", l_tmpl_5_pacing); + } + + FAPI_TRY(mss::exp::ib::putOCCfg(i_target, EXPLR_OC_OTRCFG76_MSB, l_data)); + + l_data.flush<0>(); + + if (l_enable_tmpl_9 == fapi2::ENUM_ATTR_EXPLR_ENABLE_US_TMPL_9_ENABLED) + { + l_data.insertFromRight<EXPLR_OC_OTRCFG76_LSB_TEMPLATE_9, + EXPLR_OC_OTRCFG76_LSB_TEMPLATE_9_LEN>(l_tmpl_9_pacing); + FAPI_DBG("Upstream template 9 enabled with pacing %X", l_tmpl_9_pacing); + } + + if (l_enable_tmpl_B == fapi2::ENUM_ATTR_EXPLR_ENABLE_US_TMPL_B_ENABLED) + { + l_data.insertFromRight<EXPLR_OC_OTRCFG76_LSB_TEMPLATE_11, + EXPLR_OC_OTRCFG76_LSB_TEMPLATE_11_LEN>(l_tmpl_B_pacing); + FAPI_DBG("Upstream template B enabled with pacing %X", l_tmpl_B_pacing); + } + + FAPI_TRY(mss::exp::ib::putOCCfg(i_target, EXPLR_OC_OTRCFG76_LSB, l_data)); + +fapi_try_exit: + + FAPI_DBG("Exiting with return code : 0x%08X...", (uint64_t) fapi2::current_err); + return fapi2::current_err; +} + + +/// +/// @brief Set the major minor version and short back-off timer values. +/// +/// @param[in] i_target Explorer to initialize +/// +/// @return fapi2:ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +/// +fapi2::ReturnCode omiTLVersionShortBackOff(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target) +{ + fapi2::buffer<uint32_t> l_data; + fapi2::buffer<uint8_t> l_short_backoff; + fapi2::ATTR_PROC_OMI_OC_MAJOR_VER_Type l_proc_oc_major; + fapi2::ATTR_PROC_OMI_OC_MINOR_VER_Type l_proc_oc_minor; + + auto const& l_proc = i_target.getParent<fapi2::TARGET_TYPE_OMI>() + .getParent<fapi2::TARGET_TYPE_PROC_CHIP>(); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_EXPLR_SHRT_BACKOFF_TIMER, + i_target, + l_short_backoff), + "Error from FAPI_ATTR_GET (ATTR_EXPLR_SHRT_BACKOFF_TIMER)"); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_OMI_OC_MAJOR_VER, + l_proc, + l_proc_oc_major), + "Error from FAPI_ATTR_GET (ATTR_PROC_OMI_OC_MAJOR_VER)"); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_OMI_OC_MINOR_VER, + l_proc, + l_proc_oc_minor), + "Error from FAPI_ATTR_GET (ATTR_PROC_OMI_OC_MINOR_VER)"); + + + //Write proc's supported OC version + l_data.insertFromRight<EXPLR_OC_OVERCFG_LSB_TL_MAJOR_VERSION_CONFIGURATION, + EXPLR_OC_OVERCFG_LSB_TL_MAJOR_VERSION_CONFIGURATION_LEN>(l_proc_oc_major); + l_data.insertFromRight<EXPLR_OC_OVERCFG_LSB_TL_MINOR_VERSION_CONFIGURATION, + EXPLR_OC_OVERCFG_LSB_TL_MINOR_VERSION_CONFIGURATION_LEN>(l_proc_oc_minor); + + //Short back-off timer + l_data.insertFromRight<EXPLR_OC_OVERCFG_LSB_SHORT_BACK_OFF_TIMER, + EXPLR_OC_OVERCFG_LSB_SHORT_BACK_OFF_TIMER_LEN>(l_short_backoff); + + FAPI_TRY(mss::exp::ib::putOCCfg(i_target, EXPLR_OC_OVERCFG_LSB, l_data)); + +fapi_try_exit: + + FAPI_DBG("Exiting with return code : 0x%08X...", (uint64_t) fapi2::current_err); + return fapi2::current_err; +} + + +/// +/// @brief Check if a bit/feature is supported if we want to use it. +/// +/// @param[in] i_data Register data to check +/// @param[in] i_offset Offset in register value starts +/// @param[in] i_useFeature Do we want to use this feature +/// @param[in] i_warn Warning message to display if reg value does not match attribute +/// @param[out] o_val Value to use +/// +/// @return fapi2::ReturnCode Success if no errors +/// +fapi2::ReturnCode omiCheckSupportedBit(const fapi2::buffer<uint32_t>& i_data, const uint32_t i_offset, + const uint8_t i_useFeature, const char* i_warn, uint8_t& o_val) +{ + uint8_t l_supported = 0; + o_val = i_useFeature; + FAPI_TRY(i_data.extractToRight<uint8_t>(l_supported, i_offset, 1)); + + if (i_useFeature != 0 && l_supported == 0) + { + //This feature is not supported by the hardware even though we requested it + FAPI_ERR("%s", i_warn); + o_val = 0; + } + +fapi_try_exit: + FAPI_ERR("extractToRight failed return code : 0x%08X", (uint64_t) fapi2::current_err); + return fapi2::current_err; +} + +/// +/// @brief Check if the requested pacing for a template is supported +/// +/// @param[in] i_data Register data to check +/// @param[in] i_offset Offset in register value starts +/// @param[in] i_len The length of the pacing field +/// @param[in] i_usePace The desired pacing value +/// @param[in] i_warn Warning message to display if reg value does not match attribute +/// @param[out] o_val The pacing value to use +/// +/// @return fapi2::ReturnCode Success if no errors +/// +fapi2::ReturnCode omiCheckSupportedPacing(const fapi2::buffer<uint32_t>& i_data, const uint32_t i_offset, + const uint32_t i_len, const uint8_t i_usePace, const char* i_warn, uint8_t& o_val) +{ + uint8_t l_supported = 0; + o_val = i_usePace; + FAPI_TRY(i_data.extractToRight<uint8_t>(l_supported, i_offset, i_len)); + + if (i_usePace < l_supported) + { + //This pacing is not supported by the hardware + FAPI_ERR("%s", i_warn); + o_val = l_supported; + } + +fapi_try_exit: + FAPI_ERR("extractToRight failed return code : 0x%08X", (uint64_t) fapi2::current_err); + return fapi2::current_err; +} + +/// +/// @brief Validate downstream receive templates +/// +/// @param[in] i_target Explorer to initialize +/// +/// @return fapi2:ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +/// +fapi2::ReturnCode omiValidateDownstream(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target) +{ + //Expected dnstream 0,1,4 to OCMB + //Expected upstream 0,5,9 to Axone + fapi2::buffer<uint32_t> l_data; + fapi2::ATTR_PROC_ENABLE_DL_TMPL_1_Type l_enable_tmpl_1; + fapi2::ATTR_PROC_ENABLE_DL_TMPL_4_Type l_enable_tmpl_4; + fapi2::ATTR_PROC_ENABLE_DL_TMPL_7_Type l_enable_tmpl_7; + fapi2::ATTR_PROC_ENABLE_DL_TMPL_A_Type l_enable_tmpl_A; + fapi2::ATTR_PROC_TMPL_0_PACING_Type l_tmpl_0_pace; + fapi2::ATTR_PROC_TMPL_1_PACING_Type l_tmpl_1_pace; + fapi2::ATTR_PROC_TMPL_4_PACING_Type l_tmpl_4_pace; + fapi2::ATTR_PROC_TMPL_7_PACING_Type l_tmpl_7_pace; + fapi2::ATTR_PROC_TMPL_A_PACING_Type l_tmpl_A_pace; + uint8_t l_tmp = 0x0; + + fapi2::ATTR_CHIP_EC_FEATURE_DS_TEMPLATES_0147_Type l_ds_only_0147; + + const auto& l_proc = i_target.getParent<fapi2::TARGET_TYPE_OMI>() + .getParent<fapi2::TARGET_TYPE_PROC_CHIP>(); + + const auto& l_mcc_target = i_target.getParent<fapi2::TARGET_TYPE_OMI>() + .getParent<fapi2::TARGET_TYPE_MCC>(); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_DS_TEMPLATES_0147, + l_proc, + l_ds_only_0147), + "Error from FAPI_ATTR_GET (ATTR_CHIP_EC_FEATURE_DS_TEMPLATES_0147)"); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_ENABLE_DL_TMPL_1, + l_mcc_target, + l_enable_tmpl_1), + "Error from FAPI_ATTR_GET (ATTR_PROC_ENABLE_DL_TMPL_1)"); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_ENABLE_DL_TMPL_4, + l_mcc_target, + l_enable_tmpl_4), + "Error from FAPI_ATTR_GET (ATTR_PROC_ENABLE_DL_TMPL_4)"); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_ENABLE_DL_TMPL_7, + l_mcc_target, + l_enable_tmpl_7), + "Error from FAPI_ATTR_GET (ATTR_PROC_ENABLE_DL_TMPL_7)"); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_ENABLE_DL_TMPL_A, + l_mcc_target, + l_enable_tmpl_A), + "Error from FAPI_ATTR_GET (ATTR_PROC_ENABLE_DL_TMPL_A)"); + + FAPI_ASSERT(!l_ds_only_0147 || !l_enable_tmpl_A, + fapi2::PROC_DOES_NOT_SUPPORT_DS_A() + .set_TARGET(l_proc) + .set_A(l_enable_tmpl_A), + "Downstream template A requested, but not supported by proc"); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_TMPL_0_PACING, + l_mcc_target, + l_tmpl_0_pace), + "Error from FAPI_ATTR_GET (ATTR_PROC_TMPL_0_PACING)"); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_TMPL_1_PACING, + l_mcc_target, + l_tmpl_1_pace), + "Error from FAPI_ATTR_GET (ATTR_PROC_TMPL_1_PACING)"); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_TMPL_4_PACING, + l_mcc_target, + l_tmpl_4_pace), + "Error from FAPI_ATTR_GET (ATTR_PROC_TMPL_4_PACING)"); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_TMPL_7_PACING, + l_mcc_target, + l_tmpl_7_pace), + "Error from FAPI_ATTR_GET (ATTR_PROC_TMPL_7_PACING)"); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_TMPL_A_PACING, + l_mcc_target, + l_tmpl_A_pace), + "Error from FAPI_ATTR_GET (ATTR_PROC_TMPL_A_PACING)"); + + FAPI_TRY(mss::exp::ib::getOCCfg(i_target, EXPLR_OC_ORTCAP_MSB, l_data)); + + FAPI_TRY(omiCheckSupportedBit(l_data, EXPLR_OC_ORTCAP_MSB_TEMPLATE_1, l_enable_tmpl_1, + "OCMB Template 1 requested, but not supported", l_tmp)); + + FAPI_TRY( FAPI_ATTR_SET( fapi2::ATTR_PROC_ENABLE_DL_TMPL_1, + l_mcc_target, + l_tmp ) ); + + FAPI_TRY(omiCheckSupportedBit(l_data, EXPLR_OC_ORTCAP_MSB_TEMPLATE_4, l_enable_tmpl_4, + "OCMB Template 4 requested, but not supported", l_tmp)); + FAPI_TRY( FAPI_ATTR_SET( fapi2::ATTR_PROC_ENABLE_DL_TMPL_4, + l_mcc_target, + l_tmp ) ); + + FAPI_TRY(omiCheckSupportedBit(l_data, EXPLR_OC_ORTCAP_MSB_TEMPLATE_7, l_enable_tmpl_7, + "OCMB Template 7 requested, but not supported", l_tmp)); + FAPI_TRY( FAPI_ATTR_SET( fapi2::ATTR_PROC_ENABLE_DL_TMPL_7, + l_mcc_target, + l_tmp ) ); + + FAPI_TRY(omiCheckSupportedBit(l_data, EXPLR_OC_ORTCAP_MSB_TEMPLATE_10, l_enable_tmpl_A, + "OCMB Template A requested, but not supported", l_tmp)) + FAPI_TRY( FAPI_ATTR_SET( fapi2::ATTR_PROC_ENABLE_DL_TMPL_A, + l_mcc_target, + l_tmp ) ); + + + + FAPI_TRY(mss::exp::ib::getOCCfg(i_target, EXPLR_OC_ORRCAP76_MSB, l_data)); + + FAPI_TRY(omiCheckSupportedPacing(l_data, EXPLR_OC_ORRCAP76_MSB_TEMPLATE_0, + EXPLR_OC_ORRCAP76_MSB_TEMPLATE_0_LEN, l_tmpl_0_pace, + "OCMB Template 0 requested pacing not supported", l_tmp)); + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_PROC_TMPL_0_PACING, + l_mcc_target, + l_tmp )); + + FAPI_TRY(omiCheckSupportedPacing(l_data, EXPLR_OC_ORRCAP76_MSB_TEMPLATE_1, + EXPLR_OC_ORRCAP76_MSB_TEMPLATE_1_LEN, l_tmpl_1_pace, + "OCMB Template 1 requested pacing not supported", l_tmp)); + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_PROC_TMPL_1_PACING, + l_mcc_target, + l_tmp )); + + FAPI_TRY(omiCheckSupportedPacing(l_data, EXPLR_OC_ORRCAP76_MSB_TEMPLATE_4, + EXPLR_OC_ORRCAP76_MSB_TEMPLATE_4_LEN, l_tmpl_4_pace, + "OCMB Template 4 requested pacing not supported", l_tmp)); + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_PROC_TMPL_4_PACING, + l_mcc_target, + l_tmp )); + + FAPI_TRY(omiCheckSupportedPacing(l_data, EXPLR_OC_ORRCAP76_MSB_TEMPLATE_7, + EXPLR_OC_ORRCAP76_MSB_TEMPLATE_7_LEN, l_tmpl_7_pace, + "OCMB Template 7 requested pacing not supported", l_tmp)); + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_PROC_TMPL_7_PACING, + l_mcc_target, + l_tmp )); + + FAPI_TRY(mss::exp::ib::getOCCfg(i_target, EXPLR_OC_ORRCAP76_LSB, l_data)); + + FAPI_TRY(omiCheckSupportedPacing(l_data, EXPLR_OC_ORRCAP76_LSB_TEMPLATE_10, + EXPLR_OC_ORRCAP76_LSB_TEMPLATE_10_LEN, l_tmpl_A_pace, + "OCMB Template A requested pacing not supported", l_tmp)); + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_PROC_TMPL_A_PACING, + l_mcc_target, + l_tmp )); + +fapi_try_exit: + + FAPI_DBG("Exiting with return code : 0x%08X...", (uint64_t) fapi2::current_err); + return fapi2::current_err; +} + + +/// +/// @brief Set the MMIO BAR +/// +/// @param[in] i_target Explorer to initialize +/// +/// @return fapi2:ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +/// +fapi2::ReturnCode omiSetMMIOEnableBAR(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target) +{ + uint8_t l_addrbit; + fapi2::buffer<uint32_t> l_value; + + const auto& l_mcc_target = i_target.getParent<fapi2::TARGET_TYPE_OMI>() + .getParent<fapi2::TARGET_TYPE_MCC>(); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_DSTLCFG_MMIO_ADDRBIT_POS, + l_mcc_target, + l_addrbit), + "Error from FAPI_ATTR_GET (ATTR_PROC_DSTLCFG_MMIO_ADDRBIT_POS)"); + + //Mask bit should be 43 + l_addrbit in le bit ordering + //subtract from 63 for big endian bit order + l_value.flush<0>(); + FAPI_TRY(l_value.setBit(63 - (43 + l_addrbit))); + FAPI_TRY(mss::exp::ib::putOCCfg(i_target, EXPLR_OC_O1BAR0_MSB, l_value)); + + //Enable the bar + FAPI_TRY(mss::exp::ib::getOCCfg(i_target, EXPLR_OC_O1MBIT_O1DID_MSB, l_value)); + l_value.setBit<EXPLR_OC_O1MBIT_O1DID_MSB_MEMORY_SPACE>(); + FAPI_TRY(mss::exp::ib::putOCCfg(i_target, EXPLR_OC_O1MBIT_O1DID_MSB, l_value)); + +fapi_try_exit: + + FAPI_DBG("Exiting with return code : 0x%08X...", (uint64_t) fapi2::current_err); + return fapi2::current_err; +} + +/// +/// @brief Set the actag and pasid lengths and bases, enable metadata. +/// +/// @param[in] i_target Explorer to initialize +/// +/// @return fapi2:ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +/// +fapi2::ReturnCode omiSetACTagPASIDMetaData(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target) +{ + fapi2::ATTR_EXPLR_METADATA_ENABLE_Type l_meta_data_ena; + fapi2::ATTR_EXPLR_ACTAG_BASE_Type l_actag_base; + fapi2::ATTR_EXPLR_PASID_BASE_Type l_pasid_base; + fapi2::ATTR_EXPLR_AFU_ACTAG_LEN_Type l_afu_actag_len; + fapi2::ATTR_EXPLR_PASID_LEN_Type l_pasid_len; + fapi2::buffer<uint32_t> l_value; + fapi2::buffer<uint32_t> l_afu_actag_len_supported; + fapi2::buffer<uint32_t> l_pasid_len_supported; + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_EXPLR_METADATA_ENABLE, + i_target, + l_meta_data_ena), + "Error from FAPI_ATTR_GET (ATTR_EXPLR_METADATA_ENABLE)"); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_EXPLR_PASID_BASE, + i_target, + l_pasid_base), + "Error from FAPI_ATTR_GET (ATTR_EXPLR_PASID_BASE)"); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_EXPLR_ACTAG_BASE, + i_target, + l_actag_base), + "Error from FAPI_ATTR_GET (ATTR_EXPLR_ACTAG_BASE)"); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_EXPLR_AFU_ACTAG_LEN, + i_target, + l_afu_actag_len), + "Error from FAPI_ATTR_GET (ATTR_EXPLR_AFU_ACTAG_LEN)"); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_EXPLR_PASID_LEN, + i_target, + l_pasid_len), + "Error from FAPI_ATTR_GET (ATTR_EXPLR_PASID_LEN)"); + + //Set PASID Base and enable metadata + FAPI_TRY(mss::exp::ib::getOCCfg(i_target, EXPLR_OC_OCTRLPID_MSB, l_value)); + FAPI_TRY(omiCheckSupportedBit(l_value, + EXPLR_OC_OCTRLPID_MSB_METADATA_SUPPORTED, + l_meta_data_ena, + "Metadata requested but not supported", l_meta_data_ena)); + + l_value.insertFromRight<EXPLR_OC_OCTRLPID_MSB_METADATA_ENABLED, + EXPLR_OC_OCTRLPID_MSB_METADATA_ENABLED_LEN> + (l_meta_data_ena); + l_value.insertFromRight<EXPLR_OC_OCTRLPID_MSB_PASID_BASE, + EXPLR_OC_OCTRLPID_MSB_PASID_BASE_LEN> + (l_pasid_base); + FAPI_TRY(mss::exp::ib::putOCCfg(i_target, EXPLR_OC_OCTRLPID_MSB, l_value)); + + + //Establish PASID supported, check expected, set enabled. + FAPI_TRY(mss::exp::ib::getOCCfg(i_target, EXPLR_OC_OCTRLPID_LSB, l_value)); + + FAPI_TRY(l_value.extractToRight<uint32_t>(l_pasid_len_supported, EXPLR_OC_OCTRLPID_LSB_PASID_LENGTH_SUPPORTED, + EXPLR_OC_OCTRLPID_LSB_PASID_LENGTH_SUPPORTED_LEN)); + + //If we want a smaller PASID length than what is supported use it, otherwise + //use the supported length. + if (l_pasid_len_supported < l_pasid_len) + { + FAPI_ERR("Requested PASID value (%d) greater than supported (%d)", l_pasid_len, l_pasid_len_supported); + l_pasid_len = l_pasid_len_supported; + } + + l_value.insertFromRight<EXPLR_OC_OCTRLPID_LSB_PASID_LENGTH_ENABLED, + EXPLR_OC_OCTRLPID_LSB_PASID_LENGTH_ENABLED_LEN> + (l_pasid_len); + FAPI_TRY(mss::exp::ib::putOCCfg(i_target, EXPLR_OC_OCTRLPID_LSB, l_value)); + + //Establish supported AFU ACTAG length, check expected, set + FAPI_TRY(mss::exp::ib::getOCCfg(i_target, EXPLR_OC_OCTRLTAG_LSB, l_value)); + + FAPI_TRY(l_value.extractToRight<uint32_t>(l_afu_actag_len_supported, + EXPLR_OC_OCTRLTAG_LSB_AFU_ACTAG_LENGTH_SUPPORTED, + EXPLR_OC_OCTRLTAG_LSB_AFU_ACTAG_LENGTH_SUPPORTED_LEN)); + + //If we want a smaller ACTAG length than what is supported use it, otherwise + //use the supported length; + if (l_afu_actag_len_supported < l_afu_actag_len) + { + FAPI_ERR("Requested ACTAG length value (%d) greater than supported (%d)", l_afu_actag_len, l_afu_actag_len_supported); + l_afu_actag_len = l_afu_actag_len_supported; + } + + l_value.insertFromRight<EXPLR_OC_OCTRLTAG_LSB_AFU_ACTAG_LENGTH_ENABLED, + EXPLR_OC_OCTRLTAG_LSB_AFU_ACTAG_LENGTH_ENABLED_LEN> + (l_afu_actag_len); + FAPI_TRY(mss::exp::ib::putOCCfg(i_target, EXPLR_OC_OCTRLTAG_LSB, l_value)); + + //Write the Functions actag length. There's only 1 AFU so set + //the function the same as the AFU. + //(Note: on explorer this causes it to send a assign_acTag to the host) + FAPI_TRY(mss::exp::ib::getOCCfg(i_target, EXPLR_OC_O1ACTAG_O1FNID_MSB, l_value)); + l_value.insertFromRight<EXPLR_OC_O1ACTAG_O1FNID_MSB_ACTAG_LENGTH, + EXPLR_OC_O1ACTAG_O1FNID_MSB_ACTAG_LENGTH_LEN> + (l_afu_actag_len); + l_value.insertFromRight<EXPLR_OC_O1ACTAG_O1FNID_MSB_ACTAG_BASE, + EXPLR_OC_O1ACTAG_O1FNID_MSB_ACTAG_BASE_LEN> + (l_actag_base); + FAPI_TRY(mss::exp::ib::putOCCfg(i_target, EXPLR_OC_O1ACTAG_O1FNID_MSB, l_value)); + +fapi_try_exit: + + FAPI_DBG("Exiting with return code : 0x%08X...", (uint64_t) fapi2::current_err); + return fapi2::current_err; +} + +/// +/// @brief Enable the AFU +/// +/// @param[in] i_target Explorer to initialize +/// +/// @return fapi2:ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +/// +fapi2::ReturnCode omiEnableAFU(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target) +{ + fapi2::buffer<uint32_t> l_value; + FAPI_TRY(mss::exp::ib::getOCCfg(i_target, EXPLR_OC_OCTRLENB_OCTRLID_MSB, l_value)); + l_value.setBit<EXPLR_OC_OCTRLENB_OCTRLID_MSB_ENABLE_AFU>(); + FAPI_TRY(mss::exp::ib::putOCCfg(i_target, EXPLR_OC_OCTRLENB_OCTRLID_MSB, l_value)); + +fapi_try_exit: + + FAPI_DBG("Exiting with return code : 0x%08X...", (uint64_t) fapi2::current_err); + return fapi2::current_err; +} + +/// +/// @brief Initialize Explorer OpenCAPI configuration +/// +/// @param[in] i_target Explorer to initialize +/// +/// @return fapi2:ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +/// +fapi2::ReturnCode exp_omi_init(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target) +{ + FAPI_DBG("Start"); + FAPI_TRY(omiDeviceVerify(i_target)); + FAPI_TRY(omiSetUpstreamTemplates(i_target)); + FAPI_TRY(omiValidateDownstream(i_target)); + FAPI_TRY(omiTLVersionShortBackOff(i_target)); + FAPI_TRY(omiSetMMIOEnableBAR(i_target)); + FAPI_TRY(omiSetACTagPASIDMetaData(i_target)); + FAPI_TRY(omiEnableAFU(i_target)); + +fapi_try_exit: + + FAPI_DBG("Exiting with return code : 0x%08X...", (uint64_t) fapi2::current_err); + return fapi2::current_err; +} diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_omi_init.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_omi_init.H index bc0855aba..12dfabd8c 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_omi_init.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_omi_init.H @@ -31,3 +31,28 @@ // *HWP Team: // *HWP Level: 2 // *HWP Consumed by: HB + + +#ifndef __EXP_OMI_INIT_H_ +#define __EXP_OMI_INIT_H_ + +#include <fapi2.H> + +typedef fapi2::ReturnCode (*exp_omi_init_FP_t) (const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>&); + +extern "C" +{ + +/// +/// @brief Initialize Explorer OpenCAPI configuration +/// +/// @param[in] i_target Explorer to initialize +/// +/// @return fapi2:ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +/// + fapi2::ReturnCode exp_omi_init(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target); + +} // extern "C" + + +#endif diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_omi_init.mk b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_omi_init.mk index 389b4900e..15c5a50b1 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_omi_init.mk +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_omi_init.mk @@ -23,3 +23,11 @@ # # IBM_PROLOG_END_TAG # Makefile for exp_omi_init HWP +PROCEDURE=exp_omi_init +lib$(PROCEDURE)_DEPLIBS+=mss_generic +lib$(PROCEDURE)_DEPLIBS+=exp_inband +$(call ADD_MODULE_INCDIR,$(PROCEDURE),$(ROOTPATH)/chips/ocmb/explorer/common/include) +$(call ADD_MODULE_INCDIR,$(PROCEDURE),$(ROOTPATH)/chips/ocmb/explorer/common/inband) +$(call ADD_MODULE_INCDIR,$(PROCEDURE),$(ROOTPATH)/chips/p9/procedures/hwp/nest) +$(call ADD_MODULE_INCDIR,$(PROCEDURE),$(ROOTPATH)) +$(call BUILD_PROCEDURE) diff --git a/src/import/chips/ocmb/explorer/procedures/xml/attribute_info/exp_omi_init.xml b/src/import/chips/ocmb/explorer/procedures/xml/attribute_info/exp_omi_init.xml index 86fcbcb0e..6db7aec3e 100644 --- a/src/import/chips/ocmb/explorer/procedures/xml/attribute_info/exp_omi_init.xml +++ b/src/import/chips/ocmb/explorer/procedures/xml/attribute_info/exp_omi_init.xml @@ -33,4 +33,212 @@ <!-- *HWP Consumed by: FSP:HB --> <!-- --> <attributes> +<!-- ********************************************************************** --> +<attribute> + <id>ATTR_EXPLR_ENABLE_US_TMPL_1</id> + <targetType>TARGET_TYPE_OCMB_CHIP</targetType> + <description> + Enable Explorer upstream transmit template 1. + Should be disabled by default. + </description> + <valueType>uint8</valueType> + <enum> + DISABLED = 0x00, + ENABLED = 0x01 + </enum> + <default>DISABLED</default> + <platInit/> +</attribute> +<!-- ********************************************************************** --> +<attribute> + <id>ATTR_EXPLR_ENABLE_US_TMPL_5</id> + <targetType>TARGET_TYPE_OCMB_CHIP</targetType> + <description> + Enable Explorer upstream transmit template 5. + Should be enabled by default. + </description> + <valueType>uint8</valueType> + <enum> + DISABLED = 0x00, + ENABLED = 0x01 + </enum> + <default>ENABLED</default> + <platInit/> +</attribute> +<!-- ********************************************************************** --> +<attribute> + <id>ATTR_EXPLR_ENABLE_US_TMPL_9</id> + <targetType>TARGET_TYPE_OCMB_CHIP</targetType> + <description> + Enable Explorer upstream transmit template 9. + Should be enabled by default. + </description> + <valueType>uint8</valueType> + <enum> + DISABLED = 0x00, + ENABLED = 0x01 + </enum> + <default>ENABLED</default> + <platInit/> +</attribute> +<!-- ********************************************************************** --> +<attribute> + <id>ATTR_EXPLR_ENABLE_US_TMPL_A</id> + <targetType>TARGET_TYPE_OCMB_CHIP</targetType> + <description> + Enable Explorer upstream transmit template A. + Not supported by Axone + </description> + <valueType>uint8</valueType> + <enum> + DISABLED = 0x00, + ENABLED = 0x01 + </enum> + <default>DISABLED</default> + <platInit/> +</attribute> +<!-- ********************************************************************** --> +<attribute> + <id>ATTR_EXPLR_ENABLE_US_TMPL_B</id> + <targetType>TARGET_TYPE_OCMB_CHIP</targetType> + <description> + Enable Explorer upstream transmit template B. + Not supported by Axone + </description> + <valueType>uint8</valueType> + <enum> + DISABLED = 0x00, + ENABLED = 0x01 + </enum> + <default>DISABLED</default> + <platInit/> +</attribute> +<!-- ********************************************************************** --> +<attribute> + <id>ATTR_EXPLR_TMPL_0_PACING</id> + <targetType>TARGET_TYPE_OCMB_CHIP</targetType> + <description> + Template 0 pacing + </description> + <valueType>uint8</valueType> + <default>0xF</default> + <platInit/> +</attribute> +<!-- ********************************************************************** --> +<attribute> + <id>ATTR_EXPLR_TMPL_1_PACING</id> + <targetType>TARGET_TYPE_OCMB_CHIP</targetType> + <description> + Template 1 pacing + </description> + <valueType>uint8</valueType> + <default>0x0</default> + <platInit/> +</attribute> +<!-- ********************************************************************** --> +<attribute> + <id>ATTR_EXPLR_TMPL_5_PACING</id> + <targetType>TARGET_TYPE_OCMB_CHIP</targetType> + <description> + Template 5 pacing + </description> + <valueType>uint8</valueType> + <default>0x0</default> + <platInit/> +</attribute> +<!-- ********************************************************************** --> +<attribute> + <id>ATTR_EXPLR_TMPL_9_PACING</id> + <targetType>TARGET_TYPE_OCMB_CHIP</targetType> + <description> + Template 9 pacing + </description> + <valueType>uint8</valueType> + <default>0x0</default> + <platInit/> +</attribute> +<!-- ********************************************************************** --> +<attribute> + <id>ATTR_EXPLR_TMPL_B_PACING</id> + <targetType>TARGET_TYPE_OCMB_CHIP</targetType> + <description> + Template B pacing + </description> + <valueType>uint8</valueType> + <default>0x0</default> + <platInit/> +</attribute> +<!-- ********************************************************************** --> +<attribute> + <id>ATTR_EXPLR_SHRT_BACKOFF_TIMER</id> + <targetType>TARGET_TYPE_OCMB_CHIP</targetType> + <description> + Short back-off timer value. + </description> + <valueType>uint8</valueType> + <default>0x0</default> + <platInit/> +</attribute> +<!-- ********************************************************************** --> +<attribute> + <id>ATTR_EXPLR_METADATA_ENABLE</id> + <targetType>TARGET_TYPE_OCMB_CHIP</targetType> + <description> + Enable OpenCAPI metadata + </description> + <valueType>uint8</valueType> + <default>0x1</default> + <platInit/> +</attribute> +<!-- ********************************************************************** --> +<attribute> + <id>ATTR_EXPLR_PASID_BASE</id> + <targetType>TARGET_TYPE_OCMB_CHIP</targetType> + <description> + The PASID base + </description> + <valueType>uint32</valueType> + <default>0x0</default> + <platInit/> +</attribute> +<!-- ********************************************************************** --> +<attribute> + <id>ATTR_EXPLR_ACTAG_BASE</id> + <targetType>TARGET_TYPE_OCMB_CHIP</targetType> + <description> + The desired actag base + </description> + <valueType>uint32</valueType> + <default>0x0</default> + <platInit/> +</attribute> +<!-- ********************************************************************** --> +<attribute> + <id>ATTR_EXPLR_AFU_ACTAG_LEN</id> + <targetType>TARGET_TYPE_OCMB_CHIP</targetType> + <description> + The expected number of actags to be supported by the ocmb. + Must be 1 for Explorer + Validate via OCTRLTAG + 10518 OCTRLTAG_AFU_ACTAG_LENGTH_SUPPORTED + </description> + <valueType>uint32</valueType> + <default>0x1</default> + <platInit/> +</attribute> +<!-- ********************************************************************** --> +<attribute> + <id>ATTR_EXPLR_PASID_LEN</id> + <targetType>TARGET_TYPE_OCMB_CHIP</targetType> + <description> + The expected number of PASIDs to be supported by the ocmb. + Number of consecutive PASIDs this AFU supports is 2^pasid_length_supported + Validate via OPASID + 10100 OPASID_MAX_PASID_WIDTH + </description> + <valueType>uint8</valueType> + <default>0x0</default> + <platInit/> +</attribute> +<!-- ********************************************************************** --> </attributes> diff --git a/src/import/chips/ocmb/explorer/procedures/xml/error_info/exp_omi_init_errors.xml b/src/import/chips/ocmb/explorer/procedures/xml/error_info/exp_omi_init_errors.xml index 793377045..7654fe832 100644 --- a/src/import/chips/ocmb/explorer/procedures/xml/error_info/exp_omi_init_errors.xml +++ b/src/import/chips/ocmb/explorer/procedures/xml/error_info/exp_omi_init_errors.xml @@ -24,4 +24,63 @@ <!-- IBM_PROLOG_END_TAG --> <!-- Error definitions for exp_omi_init HWP --> <hwpErrors> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_OCMB_IS_NOT_EXPLORER</rc> + <description> + Procedure: exp_omi_init.C + The Explorer O0DID was not read. + </description> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <target>OCMB_TARGET</target> + <priority>HIGH</priority> + </callout> + <ffdc>TARGET</ffdc> + <ffdc>ID</ffdc> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_EXPLR_OMI_TEMPLATE_ERR</rc> + <description> + Procedure: exp_omi_init.C + Required template not supported + </description> + <callout> + <procedure>CODE</procedure> + <priority>LOW</priority> + </callout> + <callout> + <target>OCMB_TARGET</target> + <priority>HIGH</priority> + </callout> + <ffdc>TARGET</ffdc> + <ffdc>TEMPLATE</ffdc> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_PROC_DOES_NOT_SUPPORT_US_B</rc> + <description> + Procedure: exp_omi_init.C + Upstream tempate B was requested, but the + connected processor does not support it. + </description> + <ffdc>TARGET</ffdc> + <ffdc>B</ffdc> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_PROC_DOES_NOT_SUPPORT_DS_A</rc> + <description> + Procedure: exp_omi_init.C + Downstream tempate A was requested, but the + connected processor does not support it. + </description> + <ffdc>TARGET</ffdc> + <ffdc>A</ffdc> + </hwpError> + <!-- ******************************************************************** --> </hwpErrors> |