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author | Andre Marin <aamarin@us.ibm.com> | 2018-08-10 08:29:49 -0500 |
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committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2019-02-12 17:02:28 -0600 |
commit | 01826b8b8a8375571b32d1256ca26d529ff88067 (patch) | |
tree | b77f5936afaf8efc7411fed7c1d5f496d1456f6d /src/import/chips/ocmb/explorer | |
parent | 4478b63177efbaed71db100ac58ddb874b115336 (diff) | |
download | talos-hostboot-01826b8b8a8375571b32d1256ca26d529ff88067.tar.gz talos-hostboot-01826b8b8a8375571b32d1256ca26d529ff88067.zip |
Implement exp_check_for_ready
Change-Id: I800eb12f166b1af90ce0153e109630cc90c8b8e8
Original-Change-Id: I11e80e70c411ec0f5a1891e078b669f176658c34
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/61972
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: RYAN P. KING <rpking@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71232
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/ocmb/explorer')
-rw-r--r-- | src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_check_for_ready.C | 57 | ||||
-rw-r--r-- | src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_check_for_ready.H | 31 |
2 files changed, 88 insertions, 0 deletions
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_check_for_ready.C b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_check_for_ready.C index d821f5a44..c162a9d15 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_check_for_ready.C +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_check_for_ready.C @@ -22,3 +22,60 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ + +/// +/// @file exp_check_for_ready.C +/// @brief FW polls I2C slave interface to determine when it is ready +/// +// *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> +// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> +// *HWP Team: Memory +// *HWP Level: 2 +// *HWP Consumed by: FSP:HB + +#include <fapi2.H> +#include <exp_check_for_ready.H> +#include <lib/i2c/exp_i2c.H> +#include <generic/memory/lib/utils/poll.H> + +extern "C" +{ +/// +/// @brief Checks if the explorer I2C is ready to receive commands +/// @param[in] i_target the controller +/// @return FAPI2_RC_SUCCESS iff ok +/// + fapi2::ReturnCode exp_check_for_ready(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target) + { + // Using default parameters + mss::poll_parameters l_poll_params; + + // From MSCC explorer firmware arch spec + // 4.1.5: After power-up, the Explorer Chip will respond with NACK to all incoming I2C requests + // from the HOST until the I2C slave interface is ready to receive commands. + FAPI_ASSERT( mss::poll(i_target, l_poll_params, [i_target]()->bool + { + return mss::exp::i2c::is_ready(i_target) == fapi2::FAPI2_RC_SUCCESS; + }), + fapi2::MSS_EXP_I2C_POLLING_TIMEOUT(). + set_TARGET(i_target), + "Failed to see an ACK from I2C -- polling timeout on %s", + mss::c_str(i_target) ); + + // We send the EXP_FW_STATUS command as a sanity check to see if it returns SUCCESS + FAPI_ASSERT( mss::poll(i_target, l_poll_params, [i_target]()->bool + { + return mss::exp::i2c::fw_status(i_target) == fapi2::FAPI2_RC_SUCCESS; + }), + fapi2::MSS_EXP_STATUS_POLLING_TIMEOUT(). + set_TARGET(i_target), + "Failled to see a successful return code -- polling timeout on %s", + mss::c_str(i_target) ); + + return fapi2::FAPI2_RC_SUCCESS; + + fapi_try_exit: + return fapi2::current_err; + } + +}// extern C diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_check_for_ready.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_check_for_ready.H index 770b993cd..743d41230 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_check_for_ready.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_check_for_ready.H @@ -22,3 +22,34 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ + +/// +/// @file exp_check_for_ready.H +/// @brief FW polls I2C slave interface to determine when it is ready +/// +// *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> +// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> +// *HWP Team: Memory +// *HWP Level: 2 +// *HWP Consumed by: FSP:HB + +#ifndef __MSS_EXP_CHECK_FOR_READY__ +#define __MSS_EXP_CHECK_FOR_READY__ + +#include <fapi2.H> + +// Required for Cronus +typedef fapi2::ReturnCode (*exp_check_for_ready_FP_t) (const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>&); + +extern "C" +{ + +/// +/// @brief Checks if the explorer I2C is ready to receive commands +/// @param[in] i_target the controller +/// @return FAPI2_RC_SUCCESS iff ok +/// + fapi2::ReturnCode exp_check_for_ready(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target); + +}// extern C +#endif |