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author | Andre A. Marin <aamarin@us.ibm.com> | 2019-04-15 14:41:46 -0500 |
---|---|---|
committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2019-04-25 12:39:26 -0500 |
commit | 508ddc960ec66dd9d6b312eb699589f3431dad1d (patch) | |
tree | f71c402b6715705fa224cfc483a9560bf20ebf17 /src/import/chips/ocmb/explorer/procedures | |
parent | 357441ef8b732b8f2b0a697d2ae7c368b3646649 (diff) | |
download | talos-hostboot-508ddc960ec66dd9d6b312eb699589f3431dad1d.tar.gz talos-hostboot-508ddc960ec66dd9d6b312eb699589f3431dad1d.zip |
Add mem_size and misc attrs, unit tests enable
Consulting w/PRD (Zane), ATTR_EFF_DIMM_RANK_CONFIGED
is not required to be initialized early in the ipl flow.
So we move it from pre_eff_config to eff_config.
Added attr_derived_engine to set attrs derived
from other attrs or hardcodes. Updated unit tests.
Added attrs not set in exp_draminit implementation of
eff_config
Change-Id: I0bb5e1913160d2cd0224cbb8566b7548eabe46d4
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75440
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Mark Pizzutillo <mark.pizzutillo@ibm.com>
Dev-Ready: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75575
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/ocmb/explorer/procedures')
4 files changed, 62 insertions, 42 deletions
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/eff_config/explorer_attr_engine_traits.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/eff_config/explorer_attr_engine_traits.H index a996dcef9..aa6328646 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/eff_config/explorer_attr_engine_traits.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/eff_config/explorer_attr_engine_traits.H @@ -48,10 +48,14 @@ namespace mss { +//////////////////////////////////////////////////////// +// Explorer specific traits for setTimingTraits +//////////////////////////////////////////////////////// + /// /// @brief Forward declartion of traits for setTimingTraits /// @class setTimingTraits -/// @note attr_eff_engine_fields, SPD_TAA_MIN +/// @note exp::attr_eff_engine_fields, SPD_TAA_MIN /// template< > struct setTimingTraits< exp::attr_eff_engine_fields, exp::SPD_TAA_MIN > @@ -62,6 +66,11 @@ struct setTimingTraits< exp::attr_eff_engine_fields, exp::SPD_TAA_MIN > static constexpr spd_facade_fptr get_timing_in_ftb = &spd::facade::fine_offset_min_taa; }; +//////////////////////////////////////////////////////// +// Traits for explorer specific attr_eff_engine_fields +//////////////////////////////////////////////////////// + + /// /// @brief Traits for attr_engine /// @class attrEngineTraits @@ -93,7 +102,7 @@ struct attrEngineTraits<exp::attr_eff_engine_fields, exp::BYTE_ENABLES> static fapi2::ReturnCode get_attr(const fapi2::Target<TARGET_TYPE>& i_target, attr_type& o_setting) { - return attr::get_byte_enables(i_target, o_setting); + return mss::attr::get_byte_enables(i_target, o_setting); } /// @@ -105,7 +114,7 @@ struct attrEngineTraits<exp::attr_eff_engine_fields, exp::BYTE_ENABLES> static fapi2::ReturnCode set_attr(const fapi2::Target<TARGET_TYPE>& i_target, attr_type& i_setting) { - return attr::set_byte_enables(i_target, i_setting); + return mss::attr::set_byte_enables(i_target, i_setting); } /// @@ -143,7 +152,7 @@ struct attrEngineTraits<exp::attr_eff_engine_fields, exp::NIBBLE_ENABLES> static fapi2::ReturnCode get_attr(const fapi2::Target<TARGET_TYPE>& i_target, attr_type& o_setting) { - return attr::get_nibble_enables(i_target, o_setting); + return mss::attr::get_nibble_enables(i_target, o_setting); } /// @@ -155,7 +164,7 @@ struct attrEngineTraits<exp::attr_eff_engine_fields, exp::NIBBLE_ENABLES> static fapi2::ReturnCode set_attr(const fapi2::Target<TARGET_TYPE>& i_target, attr_type& i_setting) { - return attr::set_nibble_enables(i_target, i_setting); + return mss::attr::set_nibble_enables(i_target, i_setting); } /// @@ -193,7 +202,7 @@ struct attrEngineTraits<exp::attr_eff_engine_fields, exp::SPD_TAA_MIN> static fapi2::ReturnCode get_attr(const fapi2::Target<TARGET_TYPE>& i_target, attr_type& o_setting) { - return attr::get_exp_spd_taa_min(i_target, o_setting); + return mss::attr::get_exp_spd_taa_min(i_target, o_setting); } /// @@ -205,7 +214,7 @@ struct attrEngineTraits<exp::attr_eff_engine_fields, exp::SPD_TAA_MIN> static fapi2::ReturnCode set_attr(const fapi2::Target<TARGET_TYPE>& i_target, attr_type& i_setting) { - return attr::set_exp_spd_taa_min(i_target, i_setting); + return mss::attr::set_exp_spd_taa_min(i_target, i_setting); } /// @@ -243,7 +252,7 @@ struct attrEngineTraits<exp::attr_eff_engine_fields, exp::FOUR_RANK_MODE> static fapi2::ReturnCode get_attr(const fapi2::Target<TARGET_TYPE>& i_target, attr_type& o_setting) { - return attr::get_four_rank_mode(i_target, o_setting); + return mss::attr::get_four_rank_mode(i_target, o_setting); } /// @@ -255,7 +264,7 @@ struct attrEngineTraits<exp::attr_eff_engine_fields, exp::FOUR_RANK_MODE> static fapi2::ReturnCode set_attr(const fapi2::Target<TARGET_TYPE>& i_target, attr_type& i_setting) { - return attr::set_four_rank_mode(i_target, i_setting); + return mss::attr::set_four_rank_mode(i_target, i_setting); } /// @@ -268,7 +277,7 @@ struct attrEngineTraits<exp::attr_eff_engine_fields, exp::FOUR_RANK_MODE> attr_integral_type& o_setting) { constexpr auto FOUR_RANK_MODE_BIT = 7; // From SPEC - uint8_t l_spd_four_rank_mode = 0; + attr_integral_type l_spd_four_rank_mode = 0; FAPI_TRY(i_spd_data.compatabilty_modes(l_spd_four_rank_mode)); o_setting = fapi2::buffer<uint8_t>(l_spd_four_rank_mode).getBit<FOUR_RANK_MODE_BIT>(); @@ -300,7 +309,7 @@ struct attrEngineTraits<exp::attr_eff_engine_fields, exp::DDP_COMPATIBILITY> static fapi2::ReturnCode get_attr(const fapi2::Target<TARGET_TYPE>& i_target, attr_type& o_setting) { - return attr::get_ddp_compatibility(i_target, o_setting); + return mss::attr::get_ddp_compatibility(i_target, o_setting); } /// @@ -312,7 +321,7 @@ struct attrEngineTraits<exp::attr_eff_engine_fields, exp::DDP_COMPATIBILITY> static fapi2::ReturnCode set_attr(const fapi2::Target<TARGET_TYPE>& i_target, attr_type& i_setting) { - return attr::set_ddp_compatibility(i_target, i_setting); + return mss::attr::set_ddp_compatibility(i_target, i_setting); } /// @@ -325,7 +334,7 @@ struct attrEngineTraits<exp::attr_eff_engine_fields, exp::DDP_COMPATIBILITY> attr_integral_type& o_setting) { constexpr auto DDP_COMPATIBILITY_BIT = 6; // From SPEC - uint8_t l_spd_ddp_compatibility = 0; + attr_integral_type l_spd_ddp_compatibility = 0; FAPI_TRY(i_spd_data.compatabilty_modes(l_spd_ddp_compatibility)); o_setting = fapi2::buffer<uint8_t>(l_spd_ddp_compatibility).getBit<DDP_COMPATIBILITY_BIT>(); @@ -357,7 +366,7 @@ struct attrEngineTraits<exp::attr_eff_engine_fields, exp::TSV_8H_SUPPORT> static fapi2::ReturnCode get_attr(const fapi2::Target<TARGET_TYPE>& i_target, attr_type& o_setting) { - return attr::get_tsv_8h_support(i_target, o_setting); + return mss::attr::get_tsv_8h_support(i_target, o_setting); } /// @@ -369,7 +378,7 @@ struct attrEngineTraits<exp::attr_eff_engine_fields, exp::TSV_8H_SUPPORT> static fapi2::ReturnCode set_attr(const fapi2::Target<TARGET_TYPE>& i_target, attr_type& i_setting) { - return attr::set_tsv_8h_support(i_target, i_setting); + return mss::attr::set_tsv_8h_support(i_target, i_setting); } /// @@ -407,7 +416,7 @@ struct attrEngineTraits<exp::attr_eff_engine_fields, exp::PSTATES> static fapi2::ReturnCode get_attr(const fapi2::Target<TARGET_TYPE>& i_target, attr_type& o_setting) { - return attr::get_pstates(i_target, o_setting); + return mss::attr::get_pstates(i_target, o_setting); } /// @@ -419,7 +428,7 @@ struct attrEngineTraits<exp::attr_eff_engine_fields, exp::PSTATES> static fapi2::ReturnCode set_attr(const fapi2::Target<TARGET_TYPE>& i_target, attr_type& i_setting) { - return attr::set_pstates(i_target, i_setting); + return mss::attr::set_pstates(i_target, i_setting); } /// @@ -457,7 +466,7 @@ struct attrEngineTraits<exp::attr_eff_engine_fields, exp::MRAM_SUPPORT> static fapi2::ReturnCode get_attr(const fapi2::Target<TARGET_TYPE>& i_target, attr_type& o_setting) { - return attr::get_mram_support(i_target, o_setting); + return mss::attr::get_mram_support(i_target, o_setting); } /// @@ -469,7 +478,7 @@ struct attrEngineTraits<exp::attr_eff_engine_fields, exp::MRAM_SUPPORT> static fapi2::ReturnCode set_attr(const fapi2::Target<TARGET_TYPE>& i_target, attr_type& i_setting) { - return attr::set_mram_support(i_target, i_setting); + return mss::attr::set_mram_support(i_target, i_setting); } /// @@ -482,7 +491,7 @@ struct attrEngineTraits<exp::attr_eff_engine_fields, exp::MRAM_SUPPORT> attr_integral_type& o_setting) { constexpr auto MRAM_SUPPORT_BIT = 4; // From SPEC - uint8_t l_spd_ddp_compatibility = 0; + attr_integral_type l_spd_ddp_compatibility = 0; FAPI_TRY(i_spd_data.compatabilty_modes(l_spd_ddp_compatibility)); o_setting = fapi2::buffer<uint8_t>(l_spd_ddp_compatibility).getBit<MRAM_SUPPORT_BIT>(); @@ -514,7 +523,7 @@ struct attrEngineTraits<exp::attr_eff_engine_fields, exp::HEIGHT_3DS> static fapi2::ReturnCode get_attr(const fapi2::Target<TARGET_TYPE>& i_target, attr_type& o_setting) { - return attr::get_exp_3ds_height(i_target, o_setting); + return mss::attr::get_exp_3ds_height(i_target, o_setting); } /// @@ -526,7 +535,7 @@ struct attrEngineTraits<exp::attr_eff_engine_fields, exp::HEIGHT_3DS> static fapi2::ReturnCode set_attr(const fapi2::Target<TARGET_TYPE>& i_target, attr_type& i_setting) { - return attr::set_exp_3ds_height(i_target, i_setting); + return mss::attr::set_exp_3ds_height(i_target, i_setting); } /// @@ -565,7 +574,7 @@ struct attrEngineTraits<exp::attr_eff_engine_fields, exp::SPD_CL_SUPPORTED> static fapi2::ReturnCode get_attr(const fapi2::Target<TARGET_TYPE>& i_target, attr_type& o_setting) { - return attr::get_exp_spd_cl_supported(i_target, o_setting); + return mss::attr::get_exp_spd_cl_supported(i_target, o_setting); } /// @@ -577,7 +586,7 @@ struct attrEngineTraits<exp::attr_eff_engine_fields, exp::SPD_CL_SUPPORTED> static fapi2::ReturnCode set_attr(const fapi2::Target<TARGET_TYPE>& i_target, attr_type& i_setting) { - return attr::set_exp_spd_cl_supported(i_target, i_setting); + return mss::attr::set_exp_spd_cl_supported(i_target, i_setting); } /// @@ -591,6 +600,7 @@ struct attrEngineTraits<exp::attr_eff_engine_fields, exp::SPD_CL_SUPPORTED> { uint64_t l_val = 0; FAPI_TRY(i_spd_data.supported_cas_latencies(l_val)); + o_setting = static_cast<attr_integral_type>(l_val); fapi_try_exit: @@ -637,8 +647,8 @@ struct attrEngineTraits<generic_metadata_fields, DIMM_TYPE_METADATA> /// /// @brief Computes setting for attribute - /// @param[in] i_spd_data SPD data - /// @param[in] i_setting value we want to set attr with + /// @param[in] i_target the DIMM target + /// @param[out] o_setting value we want to set attr with /// @return FAPI2_RC_SUCCESS iff okay /// static fapi2::ReturnCode get_value_to_set(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, @@ -721,8 +731,8 @@ struct attrEngineTraits<generic_metadata_fields, DRAM_GEN_METADATA> /// /// @brief Computes setting for attribute - /// @param[in] i_spd_data SPD data - /// @param[in] i_setting value we want to set attr with + /// @param[in] i_target the DIMM target + /// @param[out] o_setting value we want to set attr with /// @return FAPI2_RC_SUCCESS iff okay /// static fapi2::ReturnCode get_value_to_set(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, @@ -771,8 +781,8 @@ struct attrEngineTraits<generic_metadata_fields, DIMM_POS_METADATA> /// /// @brief Computes setting for attribute - /// @param[in] i_spd_data SPD data - /// @param[in] i_setting value we want to set attr with + /// @param[in] i_target the DIMM target + /// @param[out] o_setting value we want to set attr with /// @return FAPI2_RC_SUCCESS iff okay /// static fapi2::ReturnCode get_value_to_set(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, @@ -783,10 +793,15 @@ struct attrEngineTraits<generic_metadata_fields, DIMM_POS_METADATA> } }; +//////////////////////////////////////////////////////// +// Explorer specific traits for attrEnumTraits +//////////////////////////////////////////////////////// + + /// /// @brief Value traits for attr_eff_engine_fields /// @class attrEngineTraits -/// @note attr_eff_engine_fields +/// @note exp::attr_eff_engine_fields are exp DDIMM SPD fields /// template < > struct attrEnumTraits<exp::attr_eff_engine_fields> @@ -797,7 +812,7 @@ struct attrEnumTraits<exp::attr_eff_engine_fields> /// /// @brief Value traits for attr_eff_engine_fields /// @class attrEngineTraits -/// @note attr_eff_engine_fields +/// @note generic_metadata_fields used for dimm pos setting /// template < > struct attrEnumTraits<generic_metadata_fields> diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H index 4457ed3e7..d043e46f6 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H @@ -47,7 +47,10 @@ namespace exp constexpr uint32_t OCMB_ADDR_SHIFT = 3; /// -/// @brief enum list of explorer eff attributes to set +/// @brief enum list of explorer SPD derived attributes to set +/// @note these attrs are strictly derived from SPD +/// @warning wrapped in exp namesapce to be distinguished from +/// the generic attr_eff_engine_fields /// enum attr_eff_engine_fields { diff --git a/src/import/chips/ocmb/explorer/procedures/xml/attribute_info/exp_attributes.xml b/src/import/chips/ocmb/explorer/procedures/xml/attribute_info/exp_attributes.xml index e19cfe5be..c8a72cb0a 100644 --- a/src/import/chips/ocmb/explorer/procedures/xml/attribute_info/exp_attributes.xml +++ b/src/import/chips/ocmb/explorer/procedures/xml/attribute_info/exp_attributes.xml @@ -29,7 +29,6 @@ <!-- --> <!-- *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> --> <!-- *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> --> -<!-- *HWP FW Owner: Bill Hoffa <wghoffa@us.ibm.com> --> <!-- *HWP Team: Memory --> <!-- *HWP Level: 2 --> <!-- *HWP Consumed by: FSP:HB --> diff --git a/src/import/chips/ocmb/explorer/procedures/xml/attribute_info/exp_omi_train.xml b/src/import/chips/ocmb/explorer/procedures/xml/attribute_info/exp_omi_train.xml index e8880095e..fbb950259 100644 --- a/src/import/chips/ocmb/explorer/procedures/xml/attribute_info/exp_omi_train.xml +++ b/src/import/chips/ocmb/explorer/procedures/xml/attribute_info/exp_omi_train.xml @@ -5,7 +5,7 @@ <!-- --> <!-- OpenPOWER HostBoot Project --> <!-- --> -<!-- Contributors Listed Below - COPYRIGHT 2018 --> +<!-- Contributors Listed Below - COPYRIGHT 2018,2019 --> <!-- [+] International Business Machines Corp. --> <!-- --> <!-- --> @@ -47,7 +47,8 @@ MANUFACTURING_MODE = 1 </enum> <initToZero/> - <writeable/> + <platInit/> + <overrideOnly/> <mssAccessorName>ocmb_exp_boot_config_fw_mode</mssAccessorName> </attribute> @@ -63,7 +64,8 @@ PERFORM_LOOPBACK_TESTING = 1 </enum> <initToZero/> - <writeable/> + <platInit/> + <overrideOnly/> <mssAccessorName>ocmb_exp_boot_config_opencapi_loopback_test</mssAccessorName> </attribute> @@ -80,7 +82,8 @@ JTAG = 2 </enum> <initToZero/> - <writeable/> + <platInit/> + <overrideOnly/> <mssAccessorName>ocmb_exp_boot_config_transport_layer</mssAccessorName> </attribute> @@ -96,8 +99,9 @@ BOOT_RIGHT_AFTER_CONFIG = 0, WAIT_FOR_HOST_CMD = 1 </enum> + <platInit/> <initToZero/> - <writeable/> + <overrideOnly/> <mssAccessorName>ocmb_exp_boot_config_dl_layer_boot_mode</mssAccessorName> </attribute> @@ -113,7 +117,8 @@ STEP_BY_STEP_BOOT = 1 </enum> <initToZero/> - <writeable/> + <platInit/> + <overrideOnly/> <mssAccessorName>ocmb_exp_boot_config_boot_mode</mssAccessorName> </attribute> @@ -130,7 +135,6 @@ </enum> <default>1</default> <platInit/> - <writeable/> <mssAccessorName>ocmb_exp_boot_config_lane_mode</mssAccessorName> </attribute> @@ -148,7 +152,6 @@ </enum> <default>3</default> <platInit/> - <writeable/> <mssAccessorName>ocmb_exp_boot_config_serdes_frequency</mssAccessorName> </attribute> |