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| author | Dan Crowell <dcrowell@us.ibm.com> | 2020-01-16 12:55:30 -0600 |
|---|---|---|
| committer | Daniel M Crowell <dcrowell@us.ibm.com> | 2020-01-29 15:03:54 -0600 |
| commit | 3b5bb9f2e7467bde7c5f3a5c092f541a7e335dad (patch) | |
| tree | 7906aa16688c6d20c8b80bdf32b4664834bd2982 /src/import/chips/ocmb/explorer/procedures/hwp/memory/lib | |
| parent | a801fcf53301760bc456217d1e6a0790a840bc1f (diff) | |
| download | talos-hostboot-3b5bb9f2e7467bde7c5f3a5c092f541a7e335dad.tar.gz talos-hostboot-3b5bb9f2e7467bde7c5f3a5c092f541a7e335dad.zip | |
Adjust idec algorithm for Explorer B.0 format
The update to B.0 doesn't allow for a change to the register that
previously contained the MAJOR_REVISION value. Because of that
we are revising the logic that determines the EC level to be a
lookup based on a single number instead.
Ignore the MAJOR_RELEASE field from CHIP_INFO entirely, it will
always =1. Instead we will rely only on the EFUSE bits currently
designated for MINOR_RELEASE. Since we lost the ability to have
a common M.m we will just use a single incrementing value to
represent the ordinal revision number, regardless of major/minor,
i.e. the 1st revision is 0, the 2nd is 1, the 10th is 9, etc.
So that gives us these values for EFUSE_IMAGE_OUT_3[13:10]
A.0 = 0 = 0x10 in Host Firmware
A.1 = 1 = 0x11 in Host Firmware
B.0 = 2 = 0x20 in Host Firmware
B.1 = 3 = 0x21 in Host Firmware (if it were to happen)
Change-Id: I878491e8e004c231ce4dcd7abe887a947c7f3dc3
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/89764
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/89794
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/ocmb/explorer/procedures/hwp/memory/lib')
| -rw-r--r-- | src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H index 199f5296e..9051c946a 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2018,2019 */ +/* Contributors Listed Below - COPYRIGHT 2018,2020 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -177,12 +177,13 @@ enum ecid_consts enum idec_consts { EXPLR_CHIP_INFO_REG = 0x2134, - MAJOR_EC_BIT_START = 32, - MAJOR_EC_BIT_LENGTH = 4, LOCATION_BIT_START = 44, LOCATION_BIT_LENGTH = 4, CHIPID_BIT_START = 56, CHIPID_BIT_LENGTH = 8, + + REVISION_BIT_START = 50, + REVISION_BIT_LENGTH = 4, }; |
