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author | Louis Stermole <stermole@us.ibm.com> | 2019-05-06 21:04:22 -0400 |
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committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2019-05-29 14:46:56 -0500 |
commit | 8bde2e5cb164f08a25aa45dc9d3e991b3d66d9f5 (patch) | |
tree | 6641359845ff0c686ba3515d1ac6cd472f15a745 /src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H | |
parent | 6bb5c0eda3181e4114b07c39f02b63fc55c177df (diff) | |
download | talos-hostboot-8bde2e5cb164f08a25aa45dc9d3e991b3d66d9f5.tar.gz talos-hostboot-8bde2e5cb164f08a25aa45dc9d3e991b3d66d9f5.zip |
Update exp_omi_train for testing
Change BOOT_MODE param to DFE_DISABLE to match new spec
Change SERDES_FREQ to be based on ATTR_FREQ_OMI_MHZ
Change-Id: I06bd4a395b378a1493e5445578c3eb89d1b05886
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77014
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Mark Pizzutillo <mark.pizzutillo@ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77548
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H')
-rw-r--r-- | src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H index 37bad4942..a2b702bca 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H @@ -147,6 +147,7 @@ enum ffdc_codes SET_MRAM_SUPPORT = 0x1049, SET_3DS_HEIGHT = 0x1050, SET_SPD_CL_SUPPORTED = 0x1051, + SET_SERDES_FREQ = 0x1052, }; /// |