Adds process training response to exp draminit

Change-Id: I7170af9acddffef35ee50233bfa0a736d4c9b231
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/73108
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Mark Pizzutillo <mark.pizzutillo@ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/73129
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>

1 files changed, 71 insertions, 0 deletions

diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/phy/exp_train_handler.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/phy/exp_train_handler.H
index 1a41c395d..bb6bca47a 100644
--- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/phy/exp_train_handler.H
+++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/phy/exp_train_handler.H
@@ -22,3 +22,74 @@
 /* permissions and limitations under the License.                         */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
+
+///
+/// @file exp_train_handler.H
+/// @brief Procedure handle any training fails from the explorer
+///
+// *HWP HWP Owner: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 2
+// *HWP Consumed by: FSP:HB
+
+#ifndef __EXP_TRAIN_HANDLER_H__
+#define __EXP_TRAIN_HANDLER_H__
+
+#include <fapi2.H>
+#include <lib/shared/exp_consts.H>
+#include <exp_data_structs.H>
+#include <generic/memory/lib/utils/mss_bad_bits.H>
+#include <generic/memory/lib/mss_generic_attribute_setters.H>
+#include <generic/memory/lib/mss_generic_attribute_getters.H>
+
+namespace mss
+{
+namespace exp
+{
+
+///
+/// @brief Reads the training response structure
+/// @param[in] i_target the target associated with the response data
+/// @param[in] i_data the response data to read
+/// @param[out] o_resp the processed training response class
+/// @return FAPI2_RC_SUCCESS if ok
+///
+fapi2::ReturnCode read_training_response(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target,
+        const std::vector<uint8_t>& i_data,
+        user_response_msdg& o_resp);
+
+///
+/// @brief Explorer's bad bit interface class
+/// @note L1 functionality Place holder to avoid merge conflicts. This will be updated in another commit
+///
+class bad_bit_interface
+{
+    public:
+
+        ///
+        /// @brief Default constructor
+        ///
+        bad_bit_interface() = default;
+
+        ///
+        /// @brief Default destructor
+        ///
+        ~bad_bit_interface() = default;
+
+        ///
+        /// @param[in] i_target the DIMM to record training results on
+        /// @param[out] o_bad_bits the processed bad bits
+        /// @return FAPI2_RC_SUCCESS if ok
+        ///
+        fapi2::ReturnCode record_bad_bits_interface( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+                uint8_t (&o_bad_dq)[BAD_BITS_RANKS][BAD_DQ_BYTE_COUNT]) const
+        {
+            return fapi2::FAPI2_RC_SUCCESS;
+        }
+};
+
+} // ns exp
+} // ns mss
+
+#endif