Fixes MCBIST read bug in i2c mode

I2c reads are 32 bits. This means to read an IBM
logic register, the register must be read 2x, once for
the left half and once for the right half of the register.
This causes the read buffer to auto-increment 2x per read
instead of 1x per read.
As such, we have disabled the auto-increment feature in explorer
for all MCBISt tests.

JIRA EDBC-444

Change-Id: I21157376717177a02788ed7faeb76688df816727
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78347
Reviewed-by: Mark Pizzutillo <mark.pizzutillo@ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: RYAN P. KING <rpking@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78352
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

1 files changed, 10 insertions, 11 deletions

diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_mcbist.C b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_mcbist.C
index 946334c78..0273cd273 100644
--- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_mcbist.C
+++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_mcbist.C
@@ -121,7 +121,6 @@ fapi2::ReturnCode read_rb_array(const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>
 {
     using TT = mcbistTraits<DEFAULT_MC_TYPE, fapi2::TARGET_TYPE_OCMB_CHIP>;
 
-    fapi2::buffer<uint64_t> l_control_value;
     fapi2::buffer<uint64_t> l_data;
     uint64_t l_array_addr = i_start_addr;
 
@@ -131,18 +130,18 @@ fapi2::ReturnCode read_rb_array(const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>
     o_data.clear();
     o_ecc_data.clear();
 
-    // set start address
-    l_control_value.insertFromRight<TT::RB_ADDRESS, TT::RB_ADDRESS_LEN>(l_array_addr)
-    // enable the auto increment bit
-    .setBit<TT::RB_AUTOINC>();
-
-    FAPI_INF("Setting the RB array access control register.");
-    FAPI_TRY( mss::putScom(l_ocmb, TT::RD_BUF_CTL_REG, l_control_value) );
-
     for (uint8_t l_index = 0; l_index < i_num_entries; ++l_index)
     {
-        // Note that since we enabled AUTOINC above, reading ECC_REG will increment
-        // the array pointer so the next DATA_REG read will read the next array entry
+        fapi2::buffer<uint64_t> l_control_value;
+
+        // set start address
+        l_control_value.insertFromRight<TT::RB_ADDRESS, TT::RB_ADDRESS_LEN>(l_array_addr);
+
+        FAPI_INF("Setting the RB array access control register.");
+        FAPI_TRY( mss::putScom(l_ocmb, TT::RD_BUF_CTL_REG, l_control_value) );
+
+
+        // We setup the address to what we need it to be, so let's continue
         FAPI_TRY( mss::getScom(i_target, TT::RD_BUF_DATA_REG, l_data) );
         FAPI_INF("RB data index %d is: 0x%016lx", l_array_addr, l_data);
         o_data.push_back(l_data);