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authorAlvin Wang <wangat@tw.ibm.com>2019-03-14 10:25:31 -0500
committerChristian R. Geddes <crgeddes@us.ibm.com>2019-04-22 11:18:12 -0500
commit3c3ab2bd4c3cbee67eb518bcce214234d8f071f3 (patch)
tree6bf46537fd7357489516b93fdcc3d699248818be /src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_mcbist.C
parente4956ca54c226efdda7639decb8f06a92e586825 (diff)
downloadtalos-hostboot-3c3ab2bd4c3cbee67eb518bcce214234d8f071f3.tar.gz
talos-hostboot-3c3ab2bd4c3cbee67eb518bcce214234d8f071f3.zip
Move MCBIST lib to generic folder
Change-Id: Ib717742707bea6a626131578f5a3b1aeebc76281 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69677 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69707 Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_mcbist.C')
-rw-r--r--src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_mcbist.C144
1 files changed, 144 insertions, 0 deletions
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_mcbist.C b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_mcbist.C
index 47d9da4af..a02d4445e 100644
--- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_mcbist.C
+++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_mcbist.C
@@ -22,3 +22,147 @@
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
+
+///
+/// @file exp_mcbist.C
+/// @brief Run and manage the MCBIST engine
+///
+// *HWP HWP Owner: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 3
+// *HWP Consumed by: FSP:HB
+
+#include <fapi2.H>
+#include <lib/shared/exp_defaults.H>
+#include <lib/shared/exp_consts.H>
+#include <lib/mcbist/exp_mcbist.H>
+#include <mss_explorer_attribute_getters.H>
+#include <mss_explorer_attribute_setters.H>
+#include <mss_generic_attribute_getters.H>
+
+namespace mss
+{
+
+///
+/// @brief Gets the attribute for freq
+/// @param[in] const ref to the target
+/// @param[out] uint64_t& reference to store the value
+/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
+/// @note Frequency of this memory channel in MT/s (Mega Transfers per second)
+///
+template<>
+fapi2::ReturnCode freq<mss::mc_type::EXPLORER, fapi2::TARGET_TYPE_OCMB_CHIP>(
+ const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target,
+ uint64_t& o_value)
+{
+ // Each OCMB only has one MEM_PORT
+ for (const auto l_port : mss::find_targets<fapi2::TARGET_TYPE_MEM_PORT>(i_target))
+ {
+ return attr::get_freq(l_port, o_value);
+ }
+
+ // Should never reach here
+ return ~fapi2::FAPI2_RC_SUCCESS;
+}
+
+const std::pair<uint64_t, uint64_t> mcbistTraits<mss::mc_type::EXPLORER>::address_pairs[] =
+{
+ { START_ADDRESS_0, END_ADDRESS_0 },
+ { START_ADDRESS_1, END_ADDRESS_1 },
+ { START_ADDRESS_2, END_ADDRESS_2 },
+ { START_ADDRESS_3, END_ADDRESS_3 },
+};
+
+const std::vector< mss::mcbist::op_type > mcbistTraits<mss::mc_type::EXPLORER>::FIFO_MODE_REQUIRED_OP_TYPES =
+{
+ mss::mcbist::op_type::WRITE ,
+ mss::mcbist::op_type::READ ,
+ mss::mcbist::op_type::READ_WRITE ,
+ mss::mcbist::op_type::WRITE_READ ,
+ mss::mcbist::op_type::READ_WRITE_READ ,
+ mss::mcbist::op_type::READ_WRITE_WRITE ,
+ mss::mcbist::op_type::RAND_SEQ ,
+ mss::mcbist::op_type::READ_READ_WRITE ,
+};
+
+namespace mcbist
+{
+///
+/// @brief Configures broadcast mode, if it is needed
+/// @param[in] i_target the target to effect
+/// @param[in,out] io_program the mcbist::program
+/// @return FAPI2_RC_SUCCSS iff ok
+///
+template<>
+fapi2::ReturnCode configure_broadcast_mode(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target,
+ mcbist::program<mss::mc_type::EXPLORER>& io_program)
+{
+ // No broadcast mode for explorer
+ return fapi2::FAPI2_RC_SUCCESS;
+}
+
+///
+/// @brief Read entries from MCBIST Read Buffer (RB) array
+/// Specialization for fapi2::TARGET_TYPE_MEM_PORT
+/// @param[in] i_target the target to effect
+/// @param[in] i_start_addr the array address to read first
+/// @param[in] i_num_entries the number of array entries to read
+/// @param[out] o_data vector of output data
+/// @param[out] o_ecc_data vector of ecc data
+/// @return FAPI2_RC_SUCCSS iff ok
+///
+template<>
+fapi2::ReturnCode read_rb_array(const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target,
+ const uint64_t i_start_addr,
+ const uint64_t i_num_entries,
+ std::vector< fapi2::buffer<uint64_t> >& o_data,
+ std::vector< fapi2::buffer<uint64_t> >& o_ecc_data)
+{
+ using TT = mcbistTraits<DEFAULT_MC_TYPE, fapi2::TARGET_TYPE_OCMB_CHIP>;
+
+ fapi2::buffer<uint64_t> l_control_value;
+ fapi2::buffer<uint64_t> l_data;
+ uint64_t l_array_addr = i_start_addr;
+
+ const auto& l_ocmb = mss::find_target<fapi2::TARGET_TYPE_OCMB_CHIP>(i_target);
+
+ // Clear out any stale values from output vectors
+ o_data.clear();
+ o_ecc_data.clear();
+
+ // set start address
+ l_control_value.insertFromRight<TT::RB_ADDRESS, TT::RB_ADDRESS_LEN>(l_array_addr)
+ // enable the auto increment bit
+ .setBit<TT::RB_AUTOINC>();
+
+ FAPI_INF("Setting the RB array access control register.");
+ FAPI_TRY( mss::putScom(l_ocmb, TT::RD_BUF_CTL_REG, l_control_value) );
+
+ for (uint8_t l_index = 0; l_index < i_num_entries; ++l_index)
+ {
+ // Note that since we enabled AUTOINC above, reading ECC_REG will increment
+ // the array pointer so the next DATA_REG read will read the next array entry
+ FAPI_TRY( mss::getScom(i_target, TT::RD_BUF_DATA_REG, l_data) );
+ FAPI_INF("RB data index %d is: 0x%016lx", l_array_addr, l_data);
+ o_data.push_back(l_data);
+
+ // Need to read ecc register to increment array index
+ FAPI_TRY( mss::getScom(i_target, TT::RD_BUF_ECC_REG, l_data) );
+ o_ecc_data.push_back(l_data);
+ ++l_array_addr;
+
+ // Array address automatically rolls over if we go beyond NUM_COMPARE_LOG_ENTRIES
+ if (l_array_addr >= TT::NUM_COMPARE_LOG_ENTRIES)
+ {
+ l_array_addr = 0;
+ }
+
+ }
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+} // namespace mcbist
+} // namespace mss
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