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authorLouis Stermole <stermole@us.ibm.com>2019-07-25 14:43:45 -0400
committerDaniel M Crowell <dcrowell@us.ibm.com>2019-08-02 08:53:07 -0500
commiteed8602070a6021b8e01d842b8bead02fdb45982 (patch)
tree0daf6b475bd76792f2edb6e2fb8452734e0a73ff /src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_inband.H
parent3a146159cff78f77566b80d632bc18a7a6941124 (diff)
downloadtalos-hostboot-eed8602070a6021b8e01d842b8bead02fdb45982.tar.gz
talos-hostboot-eed8602070a6021b8e01d842b8bead02fdb45982.zip
Add attribute to control word swapping over OMI MMIO
Controls the swap of first and second half of MMIO transactions on data structures transferred to and from Explorer Change-Id: I2f930a1b71e4aead010f4c7df876b7fb07a89506 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/81103 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Dev-Ready: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Mark Pizzutillo <mark.pizzutillo@ibm.com> Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/81143 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_inband.H')
-rw-r--r--src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_inband.H48
1 files changed, 48 insertions, 0 deletions
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_inband.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_inband.H
index 88921392d..19c015a3f 100644
--- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_inband.H
+++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_inband.H
@@ -396,6 +396,45 @@ fapi2::ReturnCode getSensorCache(
// Command/Response/Data structure Endian handling
//--------------------------------------------------------------------------------
+///
+/// @brief UT helper for correctMMIOEndianForStruct
+///
+/// @param[in] i_endian_ctrl value of ATTR_MSS_OCMB_EXP_STRUCT_MMIO_ENDIAN_CTRL
+/// @param[in,out] io_data value to swizzle
+///
+void correctMMIOEndianForStruct_helper(fapi2::ATTR_MSS_OCMB_EXP_STRUCT_MMIO_ENDIAN_CTRL_Type i_endian_ctrl,
+ std::vector<uint8_t>& io_data);
+
+///
+/// @brief We will use 4 or 8 byte reads via fapi2::put/getMMIO for buffer
+/// data structures. The byte order of the 4 or 8 byte reads should be little
+/// endian. In order to represent the data structure in its proper layout
+/// the endianness of each 4 or 8 byte read must be corrected.
+/// @param[in,out] io_data Either data structure in proper byte order that we
+/// want to swizzle prior to writing to the buffer, or the data returned
+/// from reading the buffer that we want to unsizzle.
+/// @return fapi2::ReturnCode. FAPI2_RC_SUCCESS if success, else error code.
+///
+fapi2::ReturnCode correctMMIOEndianForStruct(std::vector<uint8_t>& io_data);
+
+///
+/// @brief UT helper for correctMMIOword_order
+/// @param[in] i_word_swap value of ATTR_MSS_OCMB_EXP_STRUCT_MMIO_WORD_SWAP
+/// @param[in,out] io_data value to swizzle
+///
+void correctMMIOword_order_helper(fapi2::ATTR_MSS_OCMB_EXP_STRUCT_MMIO_WORD_SWAP_Type i_word_swap,
+ std::vector<uint8_t>& io_data);
+
+///
+/// @brief Because of how the AXI bridge in Explorer breaks up the transaction,
+/// we might need to swap 32-bit word order
+/// @param[in,out] io_data Either data structure in proper byte order that we
+/// want to swizzle prior to writing to the buffer, or the data returned
+/// from reading the buffer that we want to unsizzle.
+/// @return fapi2::ReturnCode. FAPI2_RC_SUCCESS if success, else error code.
+///
+fapi2::ReturnCode correctMMIOword_order(std::vector<uint8_t>& io_data);
+
/// @brief We will use 4 or 8 byte reads via fapi2::put/getMMIO for buffer
/// data structures. The byte order of the 4 or 8 byte reads should be little
/// endian. In order to represent the data structure in its proper layout
@@ -408,6 +447,15 @@ fapi2::ReturnCode getSensorCache(
/// @return fapi2::ReturnCode. FAPI2_RC_SUCCESS if success, else error code.
fapi2::ReturnCode correctMMIOEndianForStruct(std::vector<uint8_t>& io_data);
+/// @brief Because of how the AXI bridge in Explorer breaks up the transaction,
+/// we might need to swap 32-bit word order
+/// @param[in,out] io_data Either data structure in proper byte order that we
+/// want to swizzle prior to writing to the buffer, or the data returned
+/// from reading the buffer that we want to unsizzle.
+///
+/// @return fapi2::ReturnCode. FAPI2_RC_SUCCESS if success, else error code.
+fapi2::ReturnCode correctMMIOword_order(std::vector<uint8_t>& io_data);
+
/// @brief Ensure data is an even multiple of 8 (BUFFER_TRANSACTION_SIZE).
/// If (sizeof(buffer) % BUFFER_TRANSACTION_SIZE != 0) ; then pad
/// buffer with zeros until statement is true.
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