add first draft of exp_access_delay_regs code

Change-Id: If8f0200d29efdac6f23bf825b1f9cc1cb575de26
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76866
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78359
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>

1 files changed, 3117 insertions, 0 deletions

diff --git a/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fixes.H b/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fixes.H
index 39e55dc78..4f587fcbc 100644
--- a/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fixes.H
+++ b/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fixes.H
@@ -29,4 +29,3121 @@
 
 static const uint64_t EXPLR_MIPS_TO_OCMB_INTERRUPT_REGISTER1 = 0x2058ull;
 
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG0_U0_P0 = 0x04040340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG0_U0_P0 = 0x04040230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG0_U0_P0 = 0x04040240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG0_U0_P0 = 0x04040200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG0_U1_P0 = 0x04040740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG0_U1_P0 = 0x04040630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG0_U1_P0 = 0x04040640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG0_U1_P0 = 0x04040600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R0_P0 = 0x04040300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R1_P0 = 0x04040700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R2_P0 = 0x04040b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R3_P0 = 0x04040f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R4_P0 = 0x04041300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R5_P0 = 0x04041700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R6_P0 = 0x04041b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R7_P0 = 0x04041f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R8_P0 = 0x04042300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG0_U0_P0 = 0x04044340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG0_U0_P0 = 0x04044230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG0_U0_P0 = 0x04044240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG0_U0_P0 = 0x04044200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG0_U1_P0 = 0x04044740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG0_U1_P0 = 0x04044630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG0_U1_P0 = 0x04044640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG0_U1_P0 = 0x04044600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R0_P0 = 0x04044300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R1_P0 = 0x04044700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R2_P0 = 0x04044b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R3_P0 = 0x04044f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R4_P0 = 0x04045300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R5_P0 = 0x04045700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R6_P0 = 0x04045b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R7_P0 = 0x04045f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R8_P0 = 0x04046300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG0_U0_P0 = 0x04048340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG0_U0_P0 = 0x04048230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG0_U0_P0 = 0x04048240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG0_U0_P0 = 0x04048200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG0_U1_P0 = 0x04048740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG0_U1_P0 = 0x04048630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG0_U1_P0 = 0x04048640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG0_U1_P0 = 0x04048600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R0_P0 = 0x04048300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R1_P0 = 0x04048700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R2_P0 = 0x04048b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R3_P0 = 0x04048f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R4_P0 = 0x04049300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R5_P0 = 0x04049700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R6_P0 = 0x04049b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R7_P0 = 0x04049f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R8_P0 = 0x0404a300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG0_U0_P0 = 0x0404c340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG0_U0_P0 = 0x0404c230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG0_U0_P0 = 0x0404c240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG0_U0_P0 = 0x0404c200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG0_U1_P0 = 0x0404c740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG0_U1_P0 = 0x0404c630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG0_U1_P0 = 0x0404c640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG0_U1_P0 = 0x0404c600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R0_P0 = 0x0404c300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R1_P0 = 0x0404c700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R2_P0 = 0x0404cb00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R3_P0 = 0x0404cf00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R4_P0 = 0x0404d300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R5_P0 = 0x0404d700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R6_P0 = 0x0404db00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R7_P0 = 0x0404df00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R8_P0 = 0x0404e300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG0_U0_P0 = 0x04050340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG0_U0_P0 = 0x04050230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG0_U0_P0 = 0x04050240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG0_U0_P0 = 0x04050200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG0_U1_P0 = 0x04050740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG0_U1_P0 = 0x04050630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG0_U1_P0 = 0x04050640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG0_U1_P0 = 0x04050600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R0_P0 = 0x04050300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R1_P0 = 0x04050700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R2_P0 = 0x04050b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R3_P0 = 0x04050f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R4_P0 = 0x04051300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R5_P0 = 0x04051700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R6_P0 = 0x04051b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R7_P0 = 0x04051f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R8_P0 = 0x04052300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG0_U0_P0 = 0x04054340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG0_U0_P0 = 0x04054230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG0_U0_P0 = 0x04054240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG0_U0_P0 = 0x04054200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG0_U1_P0 = 0x04054740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG0_U1_P0 = 0x04054630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG0_U1_P0 = 0x04054640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG0_U1_P0 = 0x04054600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R0_P0 = 0x04054300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R1_P0 = 0x04054700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R2_P0 = 0x04054b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R3_P0 = 0x04054f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R4_P0 = 0x04055300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R5_P0 = 0x04055700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R6_P0 = 0x04055b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R7_P0 = 0x04055f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R8_P0 = 0x04056300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG0_U0_P0 = 0x04058340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG0_U0_P0 = 0x04058230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG0_U0_P0 = 0x04058240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG0_U0_P0 = 0x04058200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG0_U1_P0 = 0x04058740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG0_U1_P0 = 0x04058630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG0_U1_P0 = 0x04058640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG0_U1_P0 = 0x04058600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R0_P0 = 0x04058300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R1_P0 = 0x04058700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R2_P0 = 0x04058b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R3_P0 = 0x04058f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R4_P0 = 0x04059300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R5_P0 = 0x04059700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R6_P0 = 0x04059b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R7_P0 = 0x04059f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R8_P0 = 0x0405a300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG0_U0_P0 = 0x0405c340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG0_U0_P0 = 0x0405c230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG0_U0_P0 = 0x0405c240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG0_U0_P0 = 0x0405c200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG0_U1_P0 = 0x0405c740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG0_U1_P0 = 0x0405c630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG0_U1_P0 = 0x0405c640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG0_U1_P0 = 0x0405c600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R0_P0 = 0x0405c300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R1_P0 = 0x0405c700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R2_P0 = 0x0405cb00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R3_P0 = 0x0405cf00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R4_P0 = 0x0405d300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R5_P0 = 0x0405d700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R6_P0 = 0x0405db00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R7_P0 = 0x0405df00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R8_P0 = 0x0405e300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG0_U0_P0 = 0x04060340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG0_U0_P0 = 0x04060230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG0_U0_P0 = 0x04060240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG0_U0_P0 = 0x04060200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG0_U1_P0 = 0x04060740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG0_U1_P0 = 0x04060630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG0_U1_P0 = 0x04060640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG0_U1_P0 = 0x04060600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R0_P0 = 0x04060300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R1_P0 = 0x04060700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R2_P0 = 0x04060b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R3_P0 = 0x04060f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R4_P0 = 0x04061300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R5_P0 = 0x04061700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R6_P0 = 0x04061b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R7_P0 = 0x04061f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R8_P0 = 0x04062300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG0_U0_P0 = 0x04064340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG0_U0_P0 = 0x04064230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG0_U0_P0 = 0x04064240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG0_U0_P0 = 0x04064200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG0_U1_P0 = 0x04064740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG0_U1_P0 = 0x04064630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG0_U1_P0 = 0x04064640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG0_U1_P0 = 0x04064600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R0_P0 = 0x04064300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R1_P0 = 0x04064700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R2_P0 = 0x04064b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R3_P0 = 0x04064f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R4_P0 = 0x04065300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R5_P0 = 0x04065700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R6_P0 = 0x04065b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R7_P0 = 0x04065f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R8_P0 = 0x04066300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG1_U0_P0 = 0x04040344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG1_U0_P0 = 0x04040234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG1_U0_P0 = 0x04040244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG1_U0_P0 = 0x04040204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG1_U1_P0 = 0x04040744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG1_U1_P0 = 0x04040634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG1_U1_P0 = 0x04040644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG1_U1_P0 = 0x04040604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R0_P0 = 0x04040304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R1_P0 = 0x04040704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R2_P0 = 0x04040b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R3_P0 = 0x04040f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R4_P0 = 0x04041304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R5_P0 = 0x04041704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R6_P0 = 0x04041b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R7_P0 = 0x04041f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R8_P0 = 0x04042304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG1_U0_P0 = 0x04044344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG1_U0_P0 = 0x04044234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG1_U0_P0 = 0x04044244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG1_U0_P0 = 0x04044204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG1_U1_P0 = 0x04044744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG1_U1_P0 = 0x04044634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG1_U1_P0 = 0x04044644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG1_U1_P0 = 0x04044604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R0_P0 = 0x04044304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R1_P0 = 0x04044704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R2_P0 = 0x04044b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R3_P0 = 0x04044f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R4_P0 = 0x04045304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R5_P0 = 0x04045704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R6_P0 = 0x04045b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R7_P0 = 0x04045f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R8_P0 = 0x04046304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG1_U0_P0 = 0x04048344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG1_U0_P0 = 0x04048234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG1_U0_P0 = 0x04048244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG1_U0_P0 = 0x04048204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG1_U1_P0 = 0x04048744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG1_U1_P0 = 0x04048634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG1_U1_P0 = 0x04048644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG1_U1_P0 = 0x04048604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R0_P0 = 0x04048304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R1_P0 = 0x04048704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R2_P0 = 0x04048b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R3_P0 = 0x04048f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R4_P0 = 0x04049304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R5_P0 = 0x04049704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R6_P0 = 0x04049b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R7_P0 = 0x04049f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R8_P0 = 0x0404a304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG1_U0_P0 = 0x0404c344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG1_U0_P0 = 0x0404c234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG1_U0_P0 = 0x0404c244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG1_U0_P0 = 0x0404c204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG1_U1_P0 = 0x0404c744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG1_U1_P0 = 0x0404c634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG1_U1_P0 = 0x0404c644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG1_U1_P0 = 0x0404c604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R0_P0 = 0x0404c304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R1_P0 = 0x0404c704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R2_P0 = 0x0404cb04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R3_P0 = 0x0404cf04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R4_P0 = 0x0404d304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R5_P0 = 0x0404d704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R6_P0 = 0x0404db04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R7_P0 = 0x0404df04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R8_P0 = 0x0404e304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG1_U0_P0 = 0x04050344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG1_U0_P0 = 0x04050234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG1_U0_P0 = 0x04050244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG1_U0_P0 = 0x04050204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG1_U1_P0 = 0x04050744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG1_U1_P0 = 0x04050634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG1_U1_P0 = 0x04050644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG1_U1_P0 = 0x04050604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R0_P0 = 0x04050304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R1_P0 = 0x04050704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R2_P0 = 0x04050b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R3_P0 = 0x04050f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R4_P0 = 0x04051304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R5_P0 = 0x04051704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R6_P0 = 0x04051b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R7_P0 = 0x04051f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R8_P0 = 0x04052304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG1_U0_P0 = 0x04054344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG1_U0_P0 = 0x04054234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG1_U0_P0 = 0x04054244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG1_U0_P0 = 0x04054204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG1_U1_P0 = 0x04054744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG1_U1_P0 = 0x04054634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG1_U1_P0 = 0x04054644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG1_U1_P0 = 0x04054604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R0_P0 = 0x04054304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R1_P0 = 0x04054704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R2_P0 = 0x04054b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R3_P0 = 0x04054f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R4_P0 = 0x04055304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R5_P0 = 0x04055704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R6_P0 = 0x04055b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R7_P0 = 0x04055f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R8_P0 = 0x04056304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG1_U0_P0 = 0x04058344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG1_U0_P0 = 0x04058234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG1_U0_P0 = 0x04058244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG1_U0_P0 = 0x04058204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG1_U1_P0 = 0x04058744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG1_U1_P0 = 0x04058634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG1_U1_P0 = 0x04058644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG1_U1_P0 = 0x04058604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R0_P0 = 0x04058304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R1_P0 = 0x04058704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R2_P0 = 0x04058b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R3_P0 = 0x04058f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R4_P0 = 0x04059304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R5_P0 = 0x04059704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R6_P0 = 0x04059b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R7_P0 = 0x04059f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R8_P0 = 0x0405a304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG1_U0_P0 = 0x0405c344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG1_U0_P0 = 0x0405c234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG1_U0_P0 = 0x0405c244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG1_U0_P0 = 0x0405c204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG1_U1_P0 = 0x0405c744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG1_U1_P0 = 0x0405c634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG1_U1_P0 = 0x0405c644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG1_U1_P0 = 0x0405c604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R0_P0 = 0x0405c304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R1_P0 = 0x0405c704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R2_P0 = 0x0405cb04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R3_P0 = 0x0405cf04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R4_P0 = 0x0405d304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R5_P0 = 0x0405d704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R6_P0 = 0x0405db04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R7_P0 = 0x0405df04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R8_P0 = 0x0405e304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG1_U0_P0 = 0x04060344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG1_U0_P0 = 0x04060234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG1_U0_P0 = 0x04060244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG1_U0_P0 = 0x04060204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG1_U1_P0 = 0x04060744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG1_U1_P0 = 0x04060634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG1_U1_P0 = 0x04060644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG1_U1_P0 = 0x04060604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R0_P0 = 0x04060304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R1_P0 = 0x04060704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R2_P0 = 0x04060b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R3_P0 = 0x04060f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R4_P0 = 0x04061304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R5_P0 = 0x04061704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R6_P0 = 0x04061b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R7_P0 = 0x04061f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R8_P0 = 0x04062304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG1_U0_P0 = 0x04064344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG1_U0_P0 = 0x04064234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG1_U0_P0 = 0x04064244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG1_U0_P0 = 0x04064204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG1_U1_P0 = 0x04064744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG1_U1_P0 = 0x04064634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG1_U1_P0 = 0x04064644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG1_U1_P0 = 0x04064604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R0_P0 = 0x04064304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R1_P0 = 0x04064704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R2_P0 = 0x04064b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R3_P0 = 0x04064f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R4_P0 = 0x04065304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R5_P0 = 0x04065704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R6_P0 = 0x04065b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R7_P0 = 0x04065f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R8_P0 = 0x04066304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG2_U0_P0 = 0x04040348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG2_U0_P0 = 0x04040238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG2_U0_P0 = 0x04040248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG2_U0_P0 = 0x04040208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG2_U1_P0 = 0x04040748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG2_U1_P0 = 0x04040638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG2_U1_P0 = 0x04040648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG2_U1_P0 = 0x04040608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R0_P0 = 0x04040308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R1_P0 = 0x04040708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R2_P0 = 0x04040b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R3_P0 = 0x04040f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R4_P0 = 0x04041308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R5_P0 = 0x04041708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R6_P0 = 0x04041b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R7_P0 = 0x04041f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R8_P0 = 0x04042308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG2_U0_P0 = 0x04044348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG2_U0_P0 = 0x04044238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG2_U0_P0 = 0x04044248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG2_U0_P0 = 0x04044208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG2_U1_P0 = 0x04044748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG2_U1_P0 = 0x04044638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG2_U1_P0 = 0x04044648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG2_U1_P0 = 0x04044608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R0_P0 = 0x04044308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R1_P0 = 0x04044708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R2_P0 = 0x04044b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R3_P0 = 0x04044f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R4_P0 = 0x04045308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R5_P0 = 0x04045708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R6_P0 = 0x04045b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R7_P0 = 0x04045f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R8_P0 = 0x04046308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG2_U0_P0 = 0x04048348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG2_U0_P0 = 0x04048238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG2_U0_P0 = 0x04048248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG2_U0_P0 = 0x04048208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG2_U1_P0 = 0x04048748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG2_U1_P0 = 0x04048638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG2_U1_P0 = 0x04048648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG2_U1_P0 = 0x04048608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R0_P0 = 0x04048308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R1_P0 = 0x04048708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R2_P0 = 0x04048b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R3_P0 = 0x04048f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R4_P0 = 0x04049308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R5_P0 = 0x04049708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R6_P0 = 0x04049b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R7_P0 = 0x04049f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R8_P0 = 0x0404a308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG2_U0_P0 = 0x0404c348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG2_U0_P0 = 0x0404c238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG2_U0_P0 = 0x0404c248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG2_U0_P0 = 0x0404c208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG2_U1_P0 = 0x0404c748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG2_U1_P0 = 0x0404c638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG2_U1_P0 = 0x0404c648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG2_U1_P0 = 0x0404c608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R0_P0 = 0x0404c308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R1_P0 = 0x0404c708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R2_P0 = 0x0404cb08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R3_P0 = 0x0404cf08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R4_P0 = 0x0404d308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R5_P0 = 0x0404d708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R6_P0 = 0x0404db08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R7_P0 = 0x0404df08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R8_P0 = 0x0404e308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG2_U0_P0 = 0x04050348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG2_U0_P0 = 0x04050238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG2_U0_P0 = 0x04050248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG2_U0_P0 = 0x04050208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG2_U1_P0 = 0x04050748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG2_U1_P0 = 0x04050638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG2_U1_P0 = 0x04050648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG2_U1_P0 = 0x04050608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R0_P0 = 0x04050308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R1_P0 = 0x04050708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R2_P0 = 0x04050b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R3_P0 = 0x04050f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R4_P0 = 0x04051308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R5_P0 = 0x04051708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R6_P0 = 0x04051b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R7_P0 = 0x04051f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R8_P0 = 0x04052308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG2_U0_P0 = 0x04054348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG2_U0_P0 = 0x04054238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG2_U0_P0 = 0x04054248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG2_U0_P0 = 0x04054208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG2_U1_P0 = 0x04054748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG2_U1_P0 = 0x04054638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG2_U1_P0 = 0x04054648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG2_U1_P0 = 0x04054608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R0_P0 = 0x04054308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R1_P0 = 0x04054708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R2_P0 = 0x04054b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R3_P0 = 0x04054f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R4_P0 = 0x04055308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R5_P0 = 0x04055708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R6_P0 = 0x04055b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R7_P0 = 0x04055f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R8_P0 = 0x04056308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG2_U0_P0 = 0x04058348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG2_U0_P0 = 0x04058238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG2_U0_P0 = 0x04058248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG2_U0_P0 = 0x04058208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG2_U1_P0 = 0x04058748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG2_U1_P0 = 0x04058638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG2_U1_P0 = 0x04058648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG2_U1_P0 = 0x04058608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R0_P0 = 0x04058308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R1_P0 = 0x04058708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R2_P0 = 0x04058b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R3_P0 = 0x04058f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R4_P0 = 0x04059308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R5_P0 = 0x04059708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R6_P0 = 0x04059b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R7_P0 = 0x04059f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R8_P0 = 0x0405a308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG2_U0_P0 = 0x0405c348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG2_U0_P0 = 0x0405c238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG2_U0_P0 = 0x0405c248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG2_U0_P0 = 0x0405c208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG2_U1_P0 = 0x0405c748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG2_U1_P0 = 0x0405c638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG2_U1_P0 = 0x0405c648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG2_U1_P0 = 0x0405c608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R0_P0 = 0x0405c308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R1_P0 = 0x0405c708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R2_P0 = 0x0405cb08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R3_P0 = 0x0405cf08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R4_P0 = 0x0405d308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R5_P0 = 0x0405d708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R6_P0 = 0x0405db08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R7_P0 = 0x0405df08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R8_P0 = 0x0405e308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG2_U0_P0 = 0x04060348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG2_U0_P0 = 0x04060238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG2_U0_P0 = 0x04060248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG2_U0_P0 = 0x04060208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG2_U1_P0 = 0x04060748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG2_U1_P0 = 0x04060638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG2_U1_P0 = 0x04060648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG2_U1_P0 = 0x04060608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R0_P0 = 0x04060308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R1_P0 = 0x04060708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R2_P0 = 0x04060b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R3_P0 = 0x04060f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R4_P0 = 0x04061308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R5_P0 = 0x04061708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R6_P0 = 0x04061b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R7_P0 = 0x04061f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R8_P0 = 0x04062308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG2_U0_P0 = 0x04064348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG2_U0_P0 = 0x04064238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG2_U0_P0 = 0x04064248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG2_U0_P0 = 0x04064208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG2_U1_P0 = 0x04064748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG2_U1_P0 = 0x04064638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG2_U1_P0 = 0x04064648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG2_U1_P0 = 0x04064608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R0_P0 = 0x04064308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R1_P0 = 0x04064708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R2_P0 = 0x04064b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R3_P0 = 0x04064f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R4_P0 = 0x04065308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R5_P0 = 0x04065708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R6_P0 = 0x04065b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R7_P0 = 0x04065f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R8_P0 = 0x04066308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG3_U0_P0 = 0x0404034cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG3_U0_P0 = 0x0404023cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG3_U0_P0 = 0x0404024cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG3_U0_P0 = 0x0404020cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG3_U1_P0 = 0x0404074cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG3_U1_P0 = 0x0404063cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG3_U1_P0 = 0x0404064cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG3_U1_P0 = 0x0404060cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R0_P0 = 0x0404030cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R1_P0 = 0x0404070cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R2_P0 = 0x04040b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R3_P0 = 0x04040f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R4_P0 = 0x0404130cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R5_P0 = 0x0404170cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R6_P0 = 0x04041b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R7_P0 = 0x04041f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R8_P0 = 0x0404230cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG3_U0_P0 = 0x0404434cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG3_U0_P0 = 0x0404423cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG3_U0_P0 = 0x0404424cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG3_U0_P0 = 0x0404420cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG3_U1_P0 = 0x0404474cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG3_U1_P0 = 0x0404463cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG3_U1_P0 = 0x0404464cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG3_U1_P0 = 0x0404460cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R0_P0 = 0x0404430cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R1_P0 = 0x0404470cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R2_P0 = 0x04044b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R3_P0 = 0x04044f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R4_P0 = 0x0404530cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R5_P0 = 0x0404570cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R6_P0 = 0x04045b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R7_P0 = 0x04045f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R8_P0 = 0x0404630cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG3_U0_P0 = 0x0404834cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG3_U0_P0 = 0x0404823cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG3_U0_P0 = 0x0404824cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG3_U0_P0 = 0x0404820cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG3_U1_P0 = 0x0404874cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG3_U1_P0 = 0x0404863cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG3_U1_P0 = 0x0404864cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG3_U1_P0 = 0x0404860cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R0_P0 = 0x0404830cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R1_P0 = 0x0404870cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R2_P0 = 0x04048b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R3_P0 = 0x04048f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R4_P0 = 0x0404930cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R5_P0 = 0x0404970cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R6_P0 = 0x04049b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R7_P0 = 0x04049f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R8_P0 = 0x0404a30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG3_U0_P0 = 0x0404c34cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG3_U0_P0 = 0x0404c23cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG3_U0_P0 = 0x0404c24cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG3_U0_P0 = 0x0404c20cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG3_U1_P0 = 0x0404c74cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG3_U1_P0 = 0x0404c63cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG3_U1_P0 = 0x0404c64cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG3_U1_P0 = 0x0404c60cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R0_P0 = 0x0404c30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R1_P0 = 0x0404c70cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R2_P0 = 0x0404cb0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R3_P0 = 0x0404cf0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R4_P0 = 0x0404d30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R5_P0 = 0x0404d70cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R6_P0 = 0x0404db0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R7_P0 = 0x0404df0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R8_P0 = 0x0404e30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG3_U0_P0 = 0x0405034cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG3_U0_P0 = 0x0405023cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG3_U0_P0 = 0x0405024cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG3_U0_P0 = 0x0405020cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG3_U1_P0 = 0x0405074cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG3_U1_P0 = 0x0405063cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG3_U1_P0 = 0x0405064cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG3_U1_P0 = 0x0405060cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R0_P0 = 0x0405030cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R1_P0 = 0x0405070cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R2_P0 = 0x04050b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R3_P0 = 0x04050f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R4_P0 = 0x0405130cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R5_P0 = 0x0405170cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R6_P0 = 0x04051b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R7_P0 = 0x04051f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R8_P0 = 0x0405230cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG3_U0_P0 = 0x0405434cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG3_U0_P0 = 0x0405423cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG3_U0_P0 = 0x0405424cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG3_U0_P0 = 0x0405420cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG3_U1_P0 = 0x0405474cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG3_U1_P0 = 0x0405463cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG3_U1_P0 = 0x0405464cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG3_U1_P0 = 0x0405460cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R0_P0 = 0x0405430cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R1_P0 = 0x0405470cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R2_P0 = 0x04054b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R3_P0 = 0x04054f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R4_P0 = 0x0405530cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R5_P0 = 0x0405570cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R6_P0 = 0x04055b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R7_P0 = 0x04055f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R8_P0 = 0x0405630cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG3_U0_P0 = 0x0405834cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG3_U0_P0 = 0x0405823cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG3_U0_P0 = 0x0405824cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG3_U0_P0 = 0x0405820cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG3_U1_P0 = 0x0405874cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG3_U1_P0 = 0x0405863cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG3_U1_P0 = 0x0405864cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG3_U1_P0 = 0x0405860cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R0_P0 = 0x0405830cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R1_P0 = 0x0405870cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R2_P0 = 0x04058b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R3_P0 = 0x04058f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R4_P0 = 0x0405930cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R5_P0 = 0x0405970cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R6_P0 = 0x04059b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R7_P0 = 0x04059f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R8_P0 = 0x0405a30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG3_U0_P0 = 0x0405c34cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG3_U0_P0 = 0x0405c23cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG3_U0_P0 = 0x0405c24cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG3_U0_P0 = 0x0405c20cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG3_U1_P0 = 0x0405c74cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG3_U1_P0 = 0x0405c63cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG3_U1_P0 = 0x0405c64cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG3_U1_P0 = 0x0405c60cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R0_P0 = 0x0405c30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R1_P0 = 0x0405c70cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R2_P0 = 0x0405cb0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R3_P0 = 0x0405cf0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R4_P0 = 0x0405d30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R5_P0 = 0x0405d70cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R6_P0 = 0x0405db0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R7_P0 = 0x0405df0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R8_P0 = 0x0405e30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG3_U0_P0 = 0x0406034cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG3_U0_P0 = 0x0406023cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG3_U0_P0 = 0x0406024cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG3_U0_P0 = 0x0406020cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG3_U1_P0 = 0x0406074cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG3_U1_P0 = 0x0406063cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG3_U1_P0 = 0x0406064cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG3_U1_P0 = 0x0406060cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R0_P0 = 0x0406030cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R1_P0 = 0x0406070cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R2_P0 = 0x04060b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R3_P0 = 0x04060f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R4_P0 = 0x0406130cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R5_P0 = 0x0406170cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R6_P0 = 0x04061b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R7_P0 = 0x04061f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R8_P0 = 0x0406230cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG3_U0_P0 = 0x0406434cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG3_U0_P0 = 0x0406423cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG3_U0_P0 = 0x0406424cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG3_U0_P0 = 0x0406420cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG3_U1_P0 = 0x0406474cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG3_U1_P0 = 0x0406463cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG3_U1_P0 = 0x0406464cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG3_U1_P0 = 0x0406460cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R0_P0 = 0x0406430cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R1_P0 = 0x0406470cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R2_P0 = 0x04064b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R3_P0 = 0x04064f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R4_P0 = 0x0406530cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R5_P0 = 0x0406570cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R6_P0 = 0x04065b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R7_P0 = 0x04065f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R8_P0 = 0x0406630cull;
+static const uint64_t EXP_DDR4_PHY_ANIB0_ATXDLY_P0 = 0x04000200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB1_ATXDLY_P0 = 0x04004200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB2_ATXDLY_P0 = 0x04008200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB3_ATXDLY_P0 = 0x0400c200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB4_ATXDLY_P0 = 0x04010200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB5_ATXDLY_P0 = 0x04014200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB6_ATXDLY_P0 = 0x04018200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB7_ATXDLY_P0 = 0x0401c200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB8_ATXDLY_P0 = 0x04020200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG0_U0_P1 = 0x04440340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG0_U0_P1 = 0x04440230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG0_U0_P1 = 0x04440240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG0_U0_P1 = 0x04440200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG0_U1_P1 = 0x04440740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG0_U1_P1 = 0x04440630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG0_U1_P1 = 0x04440640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG0_U1_P1 = 0x04440600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R0_P1 = 0x04440300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R1_P1 = 0x04440700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R2_P1 = 0x04440b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R3_P1 = 0x04440f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R4_P1 = 0x04441300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R5_P1 = 0x04441700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R6_P1 = 0x04441b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R7_P1 = 0x04441f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R8_P1 = 0x04442300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG0_U0_P1 = 0x04444340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG0_U0_P1 = 0x04444230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG0_U0_P1 = 0x04444240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG0_U0_P1 = 0x04444200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG0_U1_P1 = 0x04444740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG0_U1_P1 = 0x04444630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG0_U1_P1 = 0x04444640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG0_U1_P1 = 0x04444600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R0_P1 = 0x04444300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R1_P1 = 0x04444700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R2_P1 = 0x04444b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R3_P1 = 0x04444f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R4_P1 = 0x04445300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R5_P1 = 0x04445700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R6_P1 = 0x04445b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R7_P1 = 0x04445f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R8_P1 = 0x04446300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG0_U0_P1 = 0x04448340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG0_U0_P1 = 0x04448230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG0_U0_P1 = 0x04448240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG0_U0_P1 = 0x04448200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG0_U1_P1 = 0x04448740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG0_U1_P1 = 0x04448630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG0_U1_P1 = 0x04448640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG0_U1_P1 = 0x04448600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R0_P1 = 0x04448300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R1_P1 = 0x04448700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R2_P1 = 0x04448b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R3_P1 = 0x04448f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R4_P1 = 0x04449300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R5_P1 = 0x04449700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R6_P1 = 0x04449b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R7_P1 = 0x04449f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R8_P1 = 0x0444a300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG0_U0_P1 = 0x0444c340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG0_U0_P1 = 0x0444c230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG0_U0_P1 = 0x0444c240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG0_U0_P1 = 0x0444c200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG0_U1_P1 = 0x0444c740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG0_U1_P1 = 0x0444c630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG0_U1_P1 = 0x0444c640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG0_U1_P1 = 0x0444c600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R0_P1 = 0x0444c300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R1_P1 = 0x0444c700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R2_P1 = 0x0444cb00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R3_P1 = 0x0444cf00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R4_P1 = 0x0444d300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R5_P1 = 0x0444d700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R6_P1 = 0x0444db00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R7_P1 = 0x0444df00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R8_P1 = 0x0444e300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG0_U0_P1 = 0x04450340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG0_U0_P1 = 0x04450230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG0_U0_P1 = 0x04450240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG0_U0_P1 = 0x04450200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG0_U1_P1 = 0x04450740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG0_U1_P1 = 0x04450630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG0_U1_P1 = 0x04450640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG0_U1_P1 = 0x04450600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R0_P1 = 0x04450300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R1_P1 = 0x04450700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R2_P1 = 0x04450b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R3_P1 = 0x04450f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R4_P1 = 0x04451300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R5_P1 = 0x04451700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R6_P1 = 0x04451b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R7_P1 = 0x04451f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R8_P1 = 0x04452300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG0_U0_P1 = 0x04454340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG0_U0_P1 = 0x04454230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG0_U0_P1 = 0x04454240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG0_U0_P1 = 0x04454200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG0_U1_P1 = 0x04454740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG0_U1_P1 = 0x04454630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG0_U1_P1 = 0x04454640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG0_U1_P1 = 0x04454600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R0_P1 = 0x04454300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R1_P1 = 0x04454700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R2_P1 = 0x04454b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R3_P1 = 0x04454f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R4_P1 = 0x04455300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R5_P1 = 0x04455700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R6_P1 = 0x04455b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R7_P1 = 0x04455f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R8_P1 = 0x04456300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG0_U0_P1 = 0x04458340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG0_U0_P1 = 0x04458230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG0_U0_P1 = 0x04458240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG0_U0_P1 = 0x04458200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG0_U1_P1 = 0x04458740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG0_U1_P1 = 0x04458630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG0_U1_P1 = 0x04458640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG0_U1_P1 = 0x04458600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R0_P1 = 0x04458300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R1_P1 = 0x04458700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R2_P1 = 0x04458b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R3_P1 = 0x04458f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R4_P1 = 0x04459300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R5_P1 = 0x04459700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R6_P1 = 0x04459b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R7_P1 = 0x04459f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R8_P1 = 0x0445a300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG0_U0_P1 = 0x0445c340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG0_U0_P1 = 0x0445c230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG0_U0_P1 = 0x0445c240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG0_U0_P1 = 0x0445c200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG0_U1_P1 = 0x0445c740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG0_U1_P1 = 0x0445c630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG0_U1_P1 = 0x0445c640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG0_U1_P1 = 0x0445c600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R0_P1 = 0x0445c300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R1_P1 = 0x0445c700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R2_P1 = 0x0445cb00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R3_P1 = 0x0445cf00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R4_P1 = 0x0445d300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R5_P1 = 0x0445d700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R6_P1 = 0x0445db00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R7_P1 = 0x0445df00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R8_P1 = 0x0445e300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG0_U0_P1 = 0x04460340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG0_U0_P1 = 0x04460230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG0_U0_P1 = 0x04460240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG0_U0_P1 = 0x04460200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG0_U1_P1 = 0x04460740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG0_U1_P1 = 0x04460630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG0_U1_P1 = 0x04460640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG0_U1_P1 = 0x04460600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R0_P1 = 0x04460300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R1_P1 = 0x04460700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R2_P1 = 0x04460b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R3_P1 = 0x04460f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R4_P1 = 0x04461300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R5_P1 = 0x04461700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R6_P1 = 0x04461b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R7_P1 = 0x04461f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R8_P1 = 0x04462300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG0_U0_P1 = 0x04464340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG0_U0_P1 = 0x04464230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG0_U0_P1 = 0x04464240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG0_U0_P1 = 0x04464200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG0_U1_P1 = 0x04464740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG0_U1_P1 = 0x04464630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG0_U1_P1 = 0x04464640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG0_U1_P1 = 0x04464600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R0_P1 = 0x04464300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R1_P1 = 0x04464700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R2_P1 = 0x04464b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R3_P1 = 0x04464f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R4_P1 = 0x04465300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R5_P1 = 0x04465700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R6_P1 = 0x04465b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R7_P1 = 0x04465f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R8_P1 = 0x04466300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG1_U0_P1 = 0x04440344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG1_U0_P1 = 0x04440234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG1_U0_P1 = 0x04440244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG1_U0_P1 = 0x04440204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG1_U1_P1 = 0x04440744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG1_U1_P1 = 0x04440634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG1_U1_P1 = 0x04440644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG1_U1_P1 = 0x04440604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R0_P1 = 0x04440304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R1_P1 = 0x04440704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R2_P1 = 0x04440b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R3_P1 = 0x04440f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R4_P1 = 0x04441304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R5_P1 = 0x04441704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R6_P1 = 0x04441b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R7_P1 = 0x04441f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R8_P1 = 0x04442304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG1_U0_P1 = 0x04444344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG1_U0_P1 = 0x04444234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG1_U0_P1 = 0x04444244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG1_U0_P1 = 0x04444204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG1_U1_P1 = 0x04444744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG1_U1_P1 = 0x04444634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG1_U1_P1 = 0x04444644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG1_U1_P1 = 0x04444604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R0_P1 = 0x04444304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R1_P1 = 0x04444704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R2_P1 = 0x04444b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R3_P1 = 0x04444f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R4_P1 = 0x04445304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R5_P1 = 0x04445704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R6_P1 = 0x04445b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R7_P1 = 0x04445f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R8_P1 = 0x04446304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG1_U0_P1 = 0x04448344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG1_U0_P1 = 0x04448234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG1_U0_P1 = 0x04448244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG1_U0_P1 = 0x04448204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG1_U1_P1 = 0x04448744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG1_U1_P1 = 0x04448634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG1_U1_P1 = 0x04448644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG1_U1_P1 = 0x04448604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R0_P1 = 0x04448304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R1_P1 = 0x04448704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R2_P1 = 0x04448b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R3_P1 = 0x04448f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R4_P1 = 0x04449304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R5_P1 = 0x04449704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R6_P1 = 0x04449b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R7_P1 = 0x04449f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R8_P1 = 0x0444a304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG1_U0_P1 = 0x0444c344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG1_U0_P1 = 0x0444c234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG1_U0_P1 = 0x0444c244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG1_U0_P1 = 0x0444c204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG1_U1_P1 = 0x0444c744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG1_U1_P1 = 0x0444c634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG1_U1_P1 = 0x0444c644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG1_U1_P1 = 0x0444c604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R0_P1 = 0x0444c304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R1_P1 = 0x0444c704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R2_P1 = 0x0444cb04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R3_P1 = 0x0444cf04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R4_P1 = 0x0444d304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R5_P1 = 0x0444d704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R6_P1 = 0x0444db04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R7_P1 = 0x0444df04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R8_P1 = 0x0444e304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG1_U0_P1 = 0x04450344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG1_U0_P1 = 0x04450234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG1_U0_P1 = 0x04450244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG1_U0_P1 = 0x04450204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG1_U1_P1 = 0x04450744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG1_U1_P1 = 0x04450634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG1_U1_P1 = 0x04450644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG1_U1_P1 = 0x04450604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R0_P1 = 0x04450304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R1_P1 = 0x04450704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R2_P1 = 0x04450b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R3_P1 = 0x04450f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R4_P1 = 0x04451304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R5_P1 = 0x04451704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R6_P1 = 0x04451b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R7_P1 = 0x04451f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R8_P1 = 0x04452304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG1_U0_P1 = 0x04454344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG1_U0_P1 = 0x04454234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG1_U0_P1 = 0x04454244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG1_U0_P1 = 0x04454204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG1_U1_P1 = 0x04454744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG1_U1_P1 = 0x04454634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG1_U1_P1 = 0x04454644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG1_U1_P1 = 0x04454604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R0_P1 = 0x04454304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R1_P1 = 0x04454704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R2_P1 = 0x04454b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R3_P1 = 0x04454f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R4_P1 = 0x04455304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R5_P1 = 0x04455704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R6_P1 = 0x04455b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R7_P1 = 0x04455f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R8_P1 = 0x04456304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG1_U0_P1 = 0x04458344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG1_U0_P1 = 0x04458234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG1_U0_P1 = 0x04458244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG1_U0_P1 = 0x04458204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG1_U1_P1 = 0x04458744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG1_U1_P1 = 0x04458634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG1_U1_P1 = 0x04458644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG1_U1_P1 = 0x04458604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R0_P1 = 0x04458304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R1_P1 = 0x04458704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R2_P1 = 0x04458b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R3_P1 = 0x04458f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R4_P1 = 0x04459304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R5_P1 = 0x04459704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R6_P1 = 0x04459b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R7_P1 = 0x04459f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R8_P1 = 0x0445a304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG1_U0_P1 = 0x0445c344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG1_U0_P1 = 0x0445c234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG1_U0_P1 = 0x0445c244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG1_U0_P1 = 0x0445c204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG1_U1_P1 = 0x0445c744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG1_U1_P1 = 0x0445c634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG1_U1_P1 = 0x0445c644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG1_U1_P1 = 0x0445c604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R0_P1 = 0x0445c304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R1_P1 = 0x0445c704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R2_P1 = 0x0445cb04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R3_P1 = 0x0445cf04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R4_P1 = 0x0445d304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R5_P1 = 0x0445d704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R6_P1 = 0x0445db04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R7_P1 = 0x0445df04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R8_P1 = 0x0445e304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG1_U0_P1 = 0x04460344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG1_U0_P1 = 0x04460234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG1_U0_P1 = 0x04460244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG1_U0_P1 = 0x04460204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG1_U1_P1 = 0x04460744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG1_U1_P1 = 0x04460634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG1_U1_P1 = 0x04460644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG1_U1_P1 = 0x04460604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R0_P1 = 0x04460304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R1_P1 = 0x04460704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R2_P1 = 0x04460b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R3_P1 = 0x04460f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R4_P1 = 0x04461304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R5_P1 = 0x04461704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R6_P1 = 0x04461b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R7_P1 = 0x04461f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R8_P1 = 0x04462304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG1_U0_P1 = 0x04464344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG1_U0_P1 = 0x04464234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG1_U0_P1 = 0x04464244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG1_U0_P1 = 0x04464204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG1_U1_P1 = 0x04464744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG1_U1_P1 = 0x04464634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG1_U1_P1 = 0x04464644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG1_U1_P1 = 0x04464604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R0_P1 = 0x04464304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R1_P1 = 0x04464704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R2_P1 = 0x04464b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R3_P1 = 0x04464f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R4_P1 = 0x04465304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R5_P1 = 0x04465704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R6_P1 = 0x04465b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R7_P1 = 0x04465f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R8_P1 = 0x04466304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG2_U0_P1 = 0x04440348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG2_U0_P1 = 0x04440238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG2_U0_P1 = 0x04440248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG2_U0_P1 = 0x04440208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG2_U1_P1 = 0x04440748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG2_U1_P1 = 0x04440638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG2_U1_P1 = 0x04440648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG2_U1_P1 = 0x04440608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R0_P1 = 0x04440308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R1_P1 = 0x04440708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R2_P1 = 0x04440b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R3_P1 = 0x04440f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R4_P1 = 0x04441308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R5_P1 = 0x04441708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R6_P1 = 0x04441b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R7_P1 = 0x04441f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R8_P1 = 0x04442308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG2_U0_P1 = 0x04444348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG2_U0_P1 = 0x04444238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG2_U0_P1 = 0x04444248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG2_U0_P1 = 0x04444208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG2_U1_P1 = 0x04444748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG2_U1_P1 = 0x04444638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG2_U1_P1 = 0x04444648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG2_U1_P1 = 0x04444608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R0_P1 = 0x04444308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R1_P1 = 0x04444708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R2_P1 = 0x04444b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R3_P1 = 0x04444f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R4_P1 = 0x04445308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R5_P1 = 0x04445708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R6_P1 = 0x04445b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R7_P1 = 0x04445f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R8_P1 = 0x04446308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG2_U0_P1 = 0x04448348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG2_U0_P1 = 0x04448238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG2_U0_P1 = 0x04448248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG2_U0_P1 = 0x04448208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG2_U1_P1 = 0x04448748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG2_U1_P1 = 0x04448638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG2_U1_P1 = 0x04448648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG2_U1_P1 = 0x04448608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R0_P1 = 0x04448308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R1_P1 = 0x04448708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R2_P1 = 0x04448b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R3_P1 = 0x04448f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R4_P1 = 0x04449308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R5_P1 = 0x04449708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R6_P1 = 0x04449b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R7_P1 = 0x04449f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R8_P1 = 0x0444a308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG2_U0_P1 = 0x0444c348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG2_U0_P1 = 0x0444c238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG2_U0_P1 = 0x0444c248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG2_U0_P1 = 0x0444c208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG2_U1_P1 = 0x0444c748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG2_U1_P1 = 0x0444c638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG2_U1_P1 = 0x0444c648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG2_U1_P1 = 0x0444c608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R0_P1 = 0x0444c308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R1_P1 = 0x0444c708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R2_P1 = 0x0444cb08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R3_P1 = 0x0444cf08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R4_P1 = 0x0444d308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R5_P1 = 0x0444d708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R6_P1 = 0x0444db08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R7_P1 = 0x0444df08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R8_P1 = 0x0444e308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG2_U0_P1 = 0x04450348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG2_U0_P1 = 0x04450238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG2_U0_P1 = 0x04450248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG2_U0_P1 = 0x04450208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG2_U1_P1 = 0x04450748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG2_U1_P1 = 0x04450638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG2_U1_P1 = 0x04450648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG2_U1_P1 = 0x04450608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R0_P1 = 0x04450308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R1_P1 = 0x04450708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R2_P1 = 0x04450b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R3_P1 = 0x04450f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R4_P1 = 0x04451308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R5_P1 = 0x04451708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R6_P1 = 0x04451b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R7_P1 = 0x04451f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R8_P1 = 0x04452308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG2_U0_P1 = 0x04454348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG2_U0_P1 = 0x04454238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG2_U0_P1 = 0x04454248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG2_U0_P1 = 0x04454208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG2_U1_P1 = 0x04454748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG2_U1_P1 = 0x04454638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG2_U1_P1 = 0x04454648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG2_U1_P1 = 0x04454608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R0_P1 = 0x04454308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R1_P1 = 0x04454708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R2_P1 = 0x04454b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R3_P1 = 0x04454f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R4_P1 = 0x04455308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R5_P1 = 0x04455708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R6_P1 = 0x04455b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R7_P1 = 0x04455f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R8_P1 = 0x04456308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG2_U0_P1 = 0x04458348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG2_U0_P1 = 0x04458238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG2_U0_P1 = 0x04458248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG2_U0_P1 = 0x04458208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG2_U1_P1 = 0x04458748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG2_U1_P1 = 0x04458638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG2_U1_P1 = 0x04458648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG2_U1_P1 = 0x04458608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R0_P1 = 0x04458308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R1_P1 = 0x04458708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R2_P1 = 0x04458b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R3_P1 = 0x04458f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R4_P1 = 0x04459308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R5_P1 = 0x04459708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R6_P1 = 0x04459b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R7_P1 = 0x04459f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R8_P1 = 0x0445a308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG2_U0_P1 = 0x0445c348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG2_U0_P1 = 0x0445c238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG2_U0_P1 = 0x0445c248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG2_U0_P1 = 0x0445c208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG2_U1_P1 = 0x0445c748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG2_U1_P1 = 0x0445c638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG2_U1_P1 = 0x0445c648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG2_U1_P1 = 0x0445c608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R0_P1 = 0x0445c308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R1_P1 = 0x0445c708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R2_P1 = 0x0445cb08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R3_P1 = 0x0445cf08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R4_P1 = 0x0445d308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R5_P1 = 0x0445d708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R6_P1 = 0x0445db08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R7_P1 = 0x0445df08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R8_P1 = 0x0445e308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG2_U0_P1 = 0x04460348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG2_U0_P1 = 0x04460238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG2_U0_P1 = 0x04460248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG2_U0_P1 = 0x04460208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG2_U1_P1 = 0x04460748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG2_U1_P1 = 0x04460638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG2_U1_P1 = 0x04460648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG2_U1_P1 = 0x04460608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R0_P1 = 0x04460308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R1_P1 = 0x04460708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R2_P1 = 0x04460b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R3_P1 = 0x04460f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R4_P1 = 0x04461308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R5_P1 = 0x04461708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R6_P1 = 0x04461b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R7_P1 = 0x04461f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R8_P1 = 0x04462308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG2_U0_P1 = 0x04464348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG2_U0_P1 = 0x04464238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG2_U0_P1 = 0x04464248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG2_U0_P1 = 0x04464208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG2_U1_P1 = 0x04464748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG2_U1_P1 = 0x04464638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG2_U1_P1 = 0x04464648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG2_U1_P1 = 0x04464608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R0_P1 = 0x04464308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R1_P1 = 0x04464708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R2_P1 = 0x04464b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R3_P1 = 0x04464f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R4_P1 = 0x04465308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R5_P1 = 0x04465708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R6_P1 = 0x04465b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R7_P1 = 0x04465f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R8_P1 = 0x04466308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG3_U0_P1 = 0x0444034cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG3_U0_P1 = 0x0444023cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG3_U0_P1 = 0x0444024cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG3_U0_P1 = 0x0444020cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG3_U1_P1 = 0x0444074cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG3_U1_P1 = 0x0444063cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG3_U1_P1 = 0x0444064cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG3_U1_P1 = 0x0444060cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R0_P1 = 0x0444030cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R1_P1 = 0x0444070cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R2_P1 = 0x04440b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R3_P1 = 0x04440f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R4_P1 = 0x0444130cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R5_P1 = 0x0444170cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R6_P1 = 0x04441b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R7_P1 = 0x04441f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R8_P1 = 0x0444230cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG3_U0_P1 = 0x0444434cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG3_U0_P1 = 0x0444423cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG3_U0_P1 = 0x0444424cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG3_U0_P1 = 0x0444420cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG3_U1_P1 = 0x0444474cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG3_U1_P1 = 0x0444463cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG3_U1_P1 = 0x0444464cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG3_U1_P1 = 0x0444460cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R0_P1 = 0x0444430cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R1_P1 = 0x0444470cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R2_P1 = 0x04444b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R3_P1 = 0x04444f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R4_P1 = 0x0444530cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R5_P1 = 0x0444570cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R6_P1 = 0x04445b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R7_P1 = 0x04445f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R8_P1 = 0x0444630cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG3_U0_P1 = 0x0444834cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG3_U0_P1 = 0x0444823cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG3_U0_P1 = 0x0444824cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG3_U0_P1 = 0x0444820cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG3_U1_P1 = 0x0444874cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG3_U1_P1 = 0x0444863cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG3_U1_P1 = 0x0444864cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG3_U1_P1 = 0x0444860cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R0_P1 = 0x0444830cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R1_P1 = 0x0444870cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R2_P1 = 0x04448b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R3_P1 = 0x04448f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R4_P1 = 0x0444930cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R5_P1 = 0x0444970cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R6_P1 = 0x04449b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R7_P1 = 0x04449f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R8_P1 = 0x0444a30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG3_U0_P1 = 0x0444c34cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG3_U0_P1 = 0x0444c23cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG3_U0_P1 = 0x0444c24cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG3_U0_P1 = 0x0444c20cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG3_U1_P1 = 0x0444c74cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG3_U1_P1 = 0x0444c63cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG3_U1_P1 = 0x0444c64cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG3_U1_P1 = 0x0444c60cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R0_P1 = 0x0444c30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R1_P1 = 0x0444c70cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R2_P1 = 0x0444cb0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R3_P1 = 0x0444cf0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R4_P1 = 0x0444d30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R5_P1 = 0x0444d70cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R6_P1 = 0x0444db0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R7_P1 = 0x0444df0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R8_P1 = 0x0444e30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG3_U0_P1 = 0x0445034cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG3_U0_P1 = 0x0445023cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG3_U0_P1 = 0x0445024cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG3_U0_P1 = 0x0445020cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG3_U1_P1 = 0x0445074cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG3_U1_P1 = 0x0445063cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG3_U1_P1 = 0x0445064cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG3_U1_P1 = 0x0445060cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R0_P1 = 0x0445030cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R1_P1 = 0x0445070cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R2_P1 = 0x04450b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R3_P1 = 0x04450f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R4_P1 = 0x0445130cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R5_P1 = 0x0445170cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R6_P1 = 0x04451b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R7_P1 = 0x04451f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R8_P1 = 0x0445230cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG3_U0_P1 = 0x0445434cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG3_U0_P1 = 0x0445423cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG3_U0_P1 = 0x0445424cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG3_U0_P1 = 0x0445420cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG3_U1_P1 = 0x0445474cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG3_U1_P1 = 0x0445463cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG3_U1_P1 = 0x0445464cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG3_U1_P1 = 0x0445460cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R0_P1 = 0x0445430cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R1_P1 = 0x0445470cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R2_P1 = 0x04454b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R3_P1 = 0x04454f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R4_P1 = 0x0445530cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R5_P1 = 0x0445570cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R6_P1 = 0x04455b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R7_P1 = 0x04455f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R8_P1 = 0x0445630cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG3_U0_P1 = 0x0445834cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG3_U0_P1 = 0x0445823cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG3_U0_P1 = 0x0445824cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG3_U0_P1 = 0x0445820cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG3_U1_P1 = 0x0445874cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG3_U1_P1 = 0x0445863cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG3_U1_P1 = 0x0445864cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG3_U1_P1 = 0x0445860cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R0_P1 = 0x0445830cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R1_P1 = 0x0445870cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R2_P1 = 0x04458b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R3_P1 = 0x04458f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R4_P1 = 0x0445930cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R5_P1 = 0x0445970cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R6_P1 = 0x04459b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R7_P1 = 0x04459f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R8_P1 = 0x0445a30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG3_U0_P1 = 0x0445c34cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG3_U0_P1 = 0x0445c23cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG3_U0_P1 = 0x0445c24cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG3_U0_P1 = 0x0445c20cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG3_U1_P1 = 0x0445c74cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG3_U1_P1 = 0x0445c63cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG3_U1_P1 = 0x0445c64cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG3_U1_P1 = 0x0445c60cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R0_P1 = 0x0445c30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R1_P1 = 0x0445c70cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R2_P1 = 0x0445cb0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R3_P1 = 0x0445cf0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R4_P1 = 0x0445d30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R5_P1 = 0x0445d70cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R6_P1 = 0x0445db0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R7_P1 = 0x0445df0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R8_P1 = 0x0445e30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG3_U0_P1 = 0x0446034cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG3_U0_P1 = 0x0446023cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG3_U0_P1 = 0x0446024cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG3_U0_P1 = 0x0446020cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG3_U1_P1 = 0x0446074cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG3_U1_P1 = 0x0446063cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG3_U1_P1 = 0x0446064cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG3_U1_P1 = 0x0446060cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R0_P1 = 0x0446030cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R1_P1 = 0x0446070cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R2_P1 = 0x04460b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R3_P1 = 0x04460f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R4_P1 = 0x0446130cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R5_P1 = 0x0446170cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R6_P1 = 0x04461b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R7_P1 = 0x04461f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R8_P1 = 0x0446230cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG3_U0_P1 = 0x0446434cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG3_U0_P1 = 0x0446423cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG3_U0_P1 = 0x0446424cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG3_U0_P1 = 0x0446420cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG3_U1_P1 = 0x0446474cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG3_U1_P1 = 0x0446463cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG3_U1_P1 = 0x0446464cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG3_U1_P1 = 0x0446460cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R0_P1 = 0x0446430cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R1_P1 = 0x0446470cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R2_P1 = 0x04464b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R3_P1 = 0x04464f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R4_P1 = 0x0446530cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R5_P1 = 0x0446570cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R6_P1 = 0x04465b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R7_P1 = 0x04465f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R8_P1 = 0x0446630cull;
+static const uint64_t EXP_DDR4_PHY_ANIB0_ATXDLY_P1 = 0x04400200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB1_ATXDLY_P1 = 0x04404200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB2_ATXDLY_P1 = 0x04408200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB3_ATXDLY_P1 = 0x0440c200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB4_ATXDLY_P1 = 0x04410200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB5_ATXDLY_P1 = 0x04414200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB6_ATXDLY_P1 = 0x04418200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB7_ATXDLY_P1 = 0x0441c200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB8_ATXDLY_P1 = 0x04420200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG0_U0_P2 = 0x04840340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG0_U0_P2 = 0x04840230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG0_U0_P2 = 0x04840240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG0_U0_P2 = 0x04840200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG0_U1_P2 = 0x04840740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG0_U1_P2 = 0x04840630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG0_U1_P2 = 0x04840640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG0_U1_P2 = 0x04840600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R0_P2 = 0x04840300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R1_P2 = 0x04840700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R2_P2 = 0x04840b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R3_P2 = 0x04840f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R4_P2 = 0x04841300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R5_P2 = 0x04841700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R6_P2 = 0x04841b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R7_P2 = 0x04841f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R8_P2 = 0x04842300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG0_U0_P2 = 0x04844340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG0_U0_P2 = 0x04844230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG0_U0_P2 = 0x04844240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG0_U0_P2 = 0x04844200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG0_U1_P2 = 0x04844740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG0_U1_P2 = 0x04844630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG0_U1_P2 = 0x04844640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG0_U1_P2 = 0x04844600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R0_P2 = 0x04844300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R1_P2 = 0x04844700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R2_P2 = 0x04844b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R3_P2 = 0x04844f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R4_P2 = 0x04845300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R5_P2 = 0x04845700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R6_P2 = 0x04845b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R7_P2 = 0x04845f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R8_P2 = 0x04846300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG0_U0_P2 = 0x04848340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG0_U0_P2 = 0x04848230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG0_U0_P2 = 0x04848240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG0_U0_P2 = 0x04848200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG0_U1_P2 = 0x04848740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG0_U1_P2 = 0x04848630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG0_U1_P2 = 0x04848640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG0_U1_P2 = 0x04848600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R0_P2 = 0x04848300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R1_P2 = 0x04848700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R2_P2 = 0x04848b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R3_P2 = 0x04848f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R4_P2 = 0x04849300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R5_P2 = 0x04849700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R6_P2 = 0x04849b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R7_P2 = 0x04849f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R8_P2 = 0x0484a300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG0_U0_P2 = 0x0484c340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG0_U0_P2 = 0x0484c230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG0_U0_P2 = 0x0484c240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG0_U0_P2 = 0x0484c200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG0_U1_P2 = 0x0484c740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG0_U1_P2 = 0x0484c630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG0_U1_P2 = 0x0484c640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG0_U1_P2 = 0x0484c600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R0_P2 = 0x0484c300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R1_P2 = 0x0484c700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R2_P2 = 0x0484cb00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R3_P2 = 0x0484cf00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R4_P2 = 0x0484d300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R5_P2 = 0x0484d700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R6_P2 = 0x0484db00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R7_P2 = 0x0484df00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R8_P2 = 0x0484e300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG0_U0_P2 = 0x04850340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG0_U0_P2 = 0x04850230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG0_U0_P2 = 0x04850240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG0_U0_P2 = 0x04850200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG0_U1_P2 = 0x04850740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG0_U1_P2 = 0x04850630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG0_U1_P2 = 0x04850640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG0_U1_P2 = 0x04850600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R0_P2 = 0x04850300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R1_P2 = 0x04850700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R2_P2 = 0x04850b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R3_P2 = 0x04850f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R4_P2 = 0x04851300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R5_P2 = 0x04851700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R6_P2 = 0x04851b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R7_P2 = 0x04851f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R8_P2 = 0x04852300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG0_U0_P2 = 0x04854340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG0_U0_P2 = 0x04854230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG0_U0_P2 = 0x04854240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG0_U0_P2 = 0x04854200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG0_U1_P2 = 0x04854740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG0_U1_P2 = 0x04854630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG0_U1_P2 = 0x04854640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG0_U1_P2 = 0x04854600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R0_P2 = 0x04854300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R1_P2 = 0x04854700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R2_P2 = 0x04854b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R3_P2 = 0x04854f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R4_P2 = 0x04855300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R5_P2 = 0x04855700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R6_P2 = 0x04855b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R7_P2 = 0x04855f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R8_P2 = 0x04856300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG0_U0_P2 = 0x04858340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG0_U0_P2 = 0x04858230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG0_U0_P2 = 0x04858240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG0_U0_P2 = 0x04858200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG0_U1_P2 = 0x04858740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG0_U1_P2 = 0x04858630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG0_U1_P2 = 0x04858640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG0_U1_P2 = 0x04858600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R0_P2 = 0x04858300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R1_P2 = 0x04858700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R2_P2 = 0x04858b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R3_P2 = 0x04858f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R4_P2 = 0x04859300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R5_P2 = 0x04859700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R6_P2 = 0x04859b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R7_P2 = 0x04859f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R8_P2 = 0x0485a300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG0_U0_P2 = 0x0485c340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG0_U0_P2 = 0x0485c230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG0_U0_P2 = 0x0485c240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG0_U0_P2 = 0x0485c200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG0_U1_P2 = 0x0485c740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG0_U1_P2 = 0x0485c630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG0_U1_P2 = 0x0485c640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG0_U1_P2 = 0x0485c600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R0_P2 = 0x0485c300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R1_P2 = 0x0485c700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R2_P2 = 0x0485cb00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R3_P2 = 0x0485cf00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R4_P2 = 0x0485d300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R5_P2 = 0x0485d700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R6_P2 = 0x0485db00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R7_P2 = 0x0485df00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R8_P2 = 0x0485e300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG0_U0_P2 = 0x04860340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG0_U0_P2 = 0x04860230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG0_U0_P2 = 0x04860240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG0_U0_P2 = 0x04860200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG0_U1_P2 = 0x04860740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG0_U1_P2 = 0x04860630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG0_U1_P2 = 0x04860640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG0_U1_P2 = 0x04860600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R0_P2 = 0x04860300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R1_P2 = 0x04860700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R2_P2 = 0x04860b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R3_P2 = 0x04860f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R4_P2 = 0x04861300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R5_P2 = 0x04861700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R6_P2 = 0x04861b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R7_P2 = 0x04861f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R8_P2 = 0x04862300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG0_U0_P2 = 0x04864340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG0_U0_P2 = 0x04864230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG0_U0_P2 = 0x04864240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG0_U0_P2 = 0x04864200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG0_U1_P2 = 0x04864740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG0_U1_P2 = 0x04864630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG0_U1_P2 = 0x04864640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG0_U1_P2 = 0x04864600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R0_P2 = 0x04864300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R1_P2 = 0x04864700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R2_P2 = 0x04864b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R3_P2 = 0x04864f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R4_P2 = 0x04865300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R5_P2 = 0x04865700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R6_P2 = 0x04865b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R7_P2 = 0x04865f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R8_P2 = 0x04866300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG1_U0_P2 = 0x04840344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG1_U0_P2 = 0x04840234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG1_U0_P2 = 0x04840244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG1_U0_P2 = 0x04840204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG1_U1_P2 = 0x04840744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG1_U1_P2 = 0x04840634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG1_U1_P2 = 0x04840644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG1_U1_P2 = 0x04840604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R0_P2 = 0x04840304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R1_P2 = 0x04840704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R2_P2 = 0x04840b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R3_P2 = 0x04840f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R4_P2 = 0x04841304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R5_P2 = 0x04841704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R6_P2 = 0x04841b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R7_P2 = 0x04841f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R8_P2 = 0x04842304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG1_U0_P2 = 0x04844344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG1_U0_P2 = 0x04844234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG1_U0_P2 = 0x04844244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG1_U0_P2 = 0x04844204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG1_U1_P2 = 0x04844744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG1_U1_P2 = 0x04844634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG1_U1_P2 = 0x04844644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG1_U1_P2 = 0x04844604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R0_P2 = 0x04844304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R1_P2 = 0x04844704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R2_P2 = 0x04844b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R3_P2 = 0x04844f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R4_P2 = 0x04845304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R5_P2 = 0x04845704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R6_P2 = 0x04845b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R7_P2 = 0x04845f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R8_P2 = 0x04846304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG1_U0_P2 = 0x04848344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG1_U0_P2 = 0x04848234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG1_U0_P2 = 0x04848244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG1_U0_P2 = 0x04848204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG1_U1_P2 = 0x04848744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG1_U1_P2 = 0x04848634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG1_U1_P2 = 0x04848644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG1_U1_P2 = 0x04848604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R0_P2 = 0x04848304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R1_P2 = 0x04848704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R2_P2 = 0x04848b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R3_P2 = 0x04848f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R4_P2 = 0x04849304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R5_P2 = 0x04849704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R6_P2 = 0x04849b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R7_P2 = 0x04849f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R8_P2 = 0x0484a304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG1_U0_P2 = 0x0484c344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG1_U0_P2 = 0x0484c234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG1_U0_P2 = 0x0484c244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG1_U0_P2 = 0x0484c204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG1_U1_P2 = 0x0484c744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG1_U1_P2 = 0x0484c634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG1_U1_P2 = 0x0484c644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG1_U1_P2 = 0x0484c604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R0_P2 = 0x0484c304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R1_P2 = 0x0484c704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R2_P2 = 0x0484cb04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R3_P2 = 0x0484cf04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R4_P2 = 0x0484d304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R5_P2 = 0x0484d704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R6_P2 = 0x0484db04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R7_P2 = 0x0484df04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R8_P2 = 0x0484e304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG1_U0_P2 = 0x04850344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG1_U0_P2 = 0x04850234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG1_U0_P2 = 0x04850244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG1_U0_P2 = 0x04850204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG1_U1_P2 = 0x04850744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG1_U1_P2 = 0x04850634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG1_U1_P2 = 0x04850644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG1_U1_P2 = 0x04850604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R0_P2 = 0x04850304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R1_P2 = 0x04850704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R2_P2 = 0x04850b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R3_P2 = 0x04850f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R4_P2 = 0x04851304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R5_P2 = 0x04851704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R6_P2 = 0x04851b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R7_P2 = 0x04851f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R8_P2 = 0x04852304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG1_U0_P2 = 0x04854344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG1_U0_P2 = 0x04854234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG1_U0_P2 = 0x04854244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG1_U0_P2 = 0x04854204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG1_U1_P2 = 0x04854744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG1_U1_P2 = 0x04854634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG1_U1_P2 = 0x04854644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG1_U1_P2 = 0x04854604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R0_P2 = 0x04854304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R1_P2 = 0x04854704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R2_P2 = 0x04854b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R3_P2 = 0x04854f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R4_P2 = 0x04855304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R5_P2 = 0x04855704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R6_P2 = 0x04855b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R7_P2 = 0x04855f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R8_P2 = 0x04856304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG1_U0_P2 = 0x04858344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG1_U0_P2 = 0x04858234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG1_U0_P2 = 0x04858244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG1_U0_P2 = 0x04858204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG1_U1_P2 = 0x04858744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG1_U1_P2 = 0x04858634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG1_U1_P2 = 0x04858644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG1_U1_P2 = 0x04858604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R0_P2 = 0x04858304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R1_P2 = 0x04858704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R2_P2 = 0x04858b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R3_P2 = 0x04858f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R4_P2 = 0x04859304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R5_P2 = 0x04859704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R6_P2 = 0x04859b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R7_P2 = 0x04859f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R8_P2 = 0x0485a304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG1_U0_P2 = 0x0485c344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG1_U0_P2 = 0x0485c234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG1_U0_P2 = 0x0485c244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG1_U0_P2 = 0x0485c204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG1_U1_P2 = 0x0485c744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG1_U1_P2 = 0x0485c634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG1_U1_P2 = 0x0485c644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG1_U1_P2 = 0x0485c604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R0_P2 = 0x0485c304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R1_P2 = 0x0485c704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R2_P2 = 0x0485cb04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R3_P2 = 0x0485cf04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R4_P2 = 0x0485d304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R5_P2 = 0x0485d704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R6_P2 = 0x0485db04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R7_P2 = 0x0485df04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R8_P2 = 0x0485e304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG1_U0_P2 = 0x04860344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG1_U0_P2 = 0x04860234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG1_U0_P2 = 0x04860244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG1_U0_P2 = 0x04860204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG1_U1_P2 = 0x04860744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG1_U1_P2 = 0x04860634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG1_U1_P2 = 0x04860644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG1_U1_P2 = 0x04860604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R0_P2 = 0x04860304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R1_P2 = 0x04860704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R2_P2 = 0x04860b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R3_P2 = 0x04860f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R4_P2 = 0x04861304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R5_P2 = 0x04861704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R6_P2 = 0x04861b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R7_P2 = 0x04861f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R8_P2 = 0x04862304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG1_U0_P2 = 0x04864344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG1_U0_P2 = 0x04864234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG1_U0_P2 = 0x04864244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG1_U0_P2 = 0x04864204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG1_U1_P2 = 0x04864744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG1_U1_P2 = 0x04864634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG1_U1_P2 = 0x04864644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG1_U1_P2 = 0x04864604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R0_P2 = 0x04864304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R1_P2 = 0x04864704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R2_P2 = 0x04864b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R3_P2 = 0x04864f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R4_P2 = 0x04865304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R5_P2 = 0x04865704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R6_P2 = 0x04865b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R7_P2 = 0x04865f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R8_P2 = 0x04866304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG2_U0_P2 = 0x04840348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG2_U0_P2 = 0x04840238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG2_U0_P2 = 0x04840248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG2_U0_P2 = 0x04840208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG2_U1_P2 = 0x04840748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG2_U1_P2 = 0x04840638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG2_U1_P2 = 0x04840648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG2_U1_P2 = 0x04840608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R0_P2 = 0x04840308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R1_P2 = 0x04840708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R2_P2 = 0x04840b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R3_P2 = 0x04840f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R4_P2 = 0x04841308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R5_P2 = 0x04841708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R6_P2 = 0x04841b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R7_P2 = 0x04841f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R8_P2 = 0x04842308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG2_U0_P2 = 0x04844348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG2_U0_P2 = 0x04844238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG2_U0_P2 = 0x04844248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG2_U0_P2 = 0x04844208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG2_U1_P2 = 0x04844748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG2_U1_P2 = 0x04844638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG2_U1_P2 = 0x04844648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG2_U1_P2 = 0x04844608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R0_P2 = 0x04844308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R1_P2 = 0x04844708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R2_P2 = 0x04844b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R3_P2 = 0x04844f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R4_P2 = 0x04845308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R5_P2 = 0x04845708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R6_P2 = 0x04845b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R7_P2 = 0x04845f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R8_P2 = 0x04846308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG2_U0_P2 = 0x04848348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG2_U0_P2 = 0x04848238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG2_U0_P2 = 0x04848248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG2_U0_P2 = 0x04848208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG2_U1_P2 = 0x04848748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG2_U1_P2 = 0x04848638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG2_U1_P2 = 0x04848648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG2_U1_P2 = 0x04848608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R0_P2 = 0x04848308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R1_P2 = 0x04848708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R2_P2 = 0x04848b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R3_P2 = 0x04848f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R4_P2 = 0x04849308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R5_P2 = 0x04849708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R6_P2 = 0x04849b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R7_P2 = 0x04849f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R8_P2 = 0x0484a308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG2_U0_P2 = 0x0484c348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG2_U0_P2 = 0x0484c238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG2_U0_P2 = 0x0484c248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG2_U0_P2 = 0x0484c208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG2_U1_P2 = 0x0484c748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG2_U1_P2 = 0x0484c638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG2_U1_P2 = 0x0484c648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG2_U1_P2 = 0x0484c608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R0_P2 = 0x0484c308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R1_P2 = 0x0484c708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R2_P2 = 0x0484cb08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R3_P2 = 0x0484cf08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R4_P2 = 0x0484d308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R5_P2 = 0x0484d708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R6_P2 = 0x0484db08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R7_P2 = 0x0484df08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R8_P2 = 0x0484e308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG2_U0_P2 = 0x04850348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG2_U0_P2 = 0x04850238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG2_U0_P2 = 0x04850248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG2_U0_P2 = 0x04850208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG2_U1_P2 = 0x04850748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG2_U1_P2 = 0x04850638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG2_U1_P2 = 0x04850648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG2_U1_P2 = 0x04850608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R0_P2 = 0x04850308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R1_P2 = 0x04850708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R2_P2 = 0x04850b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R3_P2 = 0x04850f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R4_P2 = 0x04851308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R5_P2 = 0x04851708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R6_P2 = 0x04851b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R7_P2 = 0x04851f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R8_P2 = 0x04852308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG2_U0_P2 = 0x04854348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG2_U0_P2 = 0x04854238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG2_U0_P2 = 0x04854248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG2_U0_P2 = 0x04854208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG2_U1_P2 = 0x04854748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG2_U1_P2 = 0x04854638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG2_U1_P2 = 0x04854648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG2_U1_P2 = 0x04854608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R0_P2 = 0x04854308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R1_P2 = 0x04854708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R2_P2 = 0x04854b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R3_P2 = 0x04854f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R4_P2 = 0x04855308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R5_P2 = 0x04855708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R6_P2 = 0x04855b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R7_P2 = 0x04855f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R8_P2 = 0x04856308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG2_U0_P2 = 0x04858348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG2_U0_P2 = 0x04858238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG2_U0_P2 = 0x04858248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG2_U0_P2 = 0x04858208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG2_U1_P2 = 0x04858748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG2_U1_P2 = 0x04858638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG2_U1_P2 = 0x04858648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG2_U1_P2 = 0x04858608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R0_P2 = 0x04858308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R1_P2 = 0x04858708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R2_P2 = 0x04858b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R3_P2 = 0x04858f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R4_P2 = 0x04859308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R5_P2 = 0x04859708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R6_P2 = 0x04859b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R7_P2 = 0x04859f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R8_P2 = 0x0485a308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG2_U0_P2 = 0x0485c348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG2_U0_P2 = 0x0485c238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG2_U0_P2 = 0x0485c248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG2_U0_P2 = 0x0485c208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG2_U1_P2 = 0x0485c748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG2_U1_P2 = 0x0485c638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG2_U1_P2 = 0x0485c648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG2_U1_P2 = 0x0485c608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R0_P2 = 0x0485c308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R1_P2 = 0x0485c708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R2_P2 = 0x0485cb08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R3_P2 = 0x0485cf08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R4_P2 = 0x0485d308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R5_P2 = 0x0485d708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R6_P2 = 0x0485db08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R7_P2 = 0x0485df08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R8_P2 = 0x0485e308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG2_U0_P2 = 0x04860348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG2_U0_P2 = 0x04860238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG2_U0_P2 = 0x04860248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG2_U0_P2 = 0x04860208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG2_U1_P2 = 0x04860748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG2_U1_P2 = 0x04860638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG2_U1_P2 = 0x04860648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG2_U1_P2 = 0x04860608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R0_P2 = 0x04860308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R1_P2 = 0x04860708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R2_P2 = 0x04860b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R3_P2 = 0x04860f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R4_P2 = 0x04861308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R5_P2 = 0x04861708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R6_P2 = 0x04861b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R7_P2 = 0x04861f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R8_P2 = 0x04862308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG2_U0_P2 = 0x04864348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG2_U0_P2 = 0x04864238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG2_U0_P2 = 0x04864248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG2_U0_P2 = 0x04864208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG2_U1_P2 = 0x04864748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG2_U1_P2 = 0x04864638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG2_U1_P2 = 0x04864648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG2_U1_P2 = 0x04864608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R0_P2 = 0x04864308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R1_P2 = 0x04864708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R2_P2 = 0x04864b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R3_P2 = 0x04864f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R4_P2 = 0x04865308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R5_P2 = 0x04865708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R6_P2 = 0x04865b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R7_P2 = 0x04865f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R8_P2 = 0x04866308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG3_U0_P2 = 0x0484034cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG3_U0_P2 = 0x0484023cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG3_U0_P2 = 0x0484024cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG3_U0_P2 = 0x0484020cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG3_U1_P2 = 0x0484074cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG3_U1_P2 = 0x0484063cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG3_U1_P2 = 0x0484064cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG3_U1_P2 = 0x0484060cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R0_P2 = 0x0484030cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R1_P2 = 0x0484070cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R2_P2 = 0x04840b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R3_P2 = 0x04840f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R4_P2 = 0x0484130cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R5_P2 = 0x0484170cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R6_P2 = 0x04841b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R7_P2 = 0x04841f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R8_P2 = 0x0484230cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG3_U0_P2 = 0x0484434cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG3_U0_P2 = 0x0484423cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG3_U0_P2 = 0x0484424cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG3_U0_P2 = 0x0484420cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG3_U1_P2 = 0x0484474cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG3_U1_P2 = 0x0484463cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG3_U1_P2 = 0x0484464cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG3_U1_P2 = 0x0484460cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R0_P2 = 0x0484430cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R1_P2 = 0x0484470cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R2_P2 = 0x04844b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R3_P2 = 0x04844f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R4_P2 = 0x0484530cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R5_P2 = 0x0484570cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R6_P2 = 0x04845b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R7_P2 = 0x04845f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R8_P2 = 0x0484630cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG3_U0_P2 = 0x0484834cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG3_U0_P2 = 0x0484823cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG3_U0_P2 = 0x0484824cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG3_U0_P2 = 0x0484820cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG3_U1_P2 = 0x0484874cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG3_U1_P2 = 0x0484863cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG3_U1_P2 = 0x0484864cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG3_U1_P2 = 0x0484860cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R0_P2 = 0x0484830cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R1_P2 = 0x0484870cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R2_P2 = 0x04848b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R3_P2 = 0x04848f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R4_P2 = 0x0484930cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R5_P2 = 0x0484970cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R6_P2 = 0x04849b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R7_P2 = 0x04849f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R8_P2 = 0x0484a30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG3_U0_P2 = 0x0484c34cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG3_U0_P2 = 0x0484c23cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG3_U0_P2 = 0x0484c24cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG3_U0_P2 = 0x0484c20cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG3_U1_P2 = 0x0484c74cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG3_U1_P2 = 0x0484c63cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG3_U1_P2 = 0x0484c64cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG3_U1_P2 = 0x0484c60cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R0_P2 = 0x0484c30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R1_P2 = 0x0484c70cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R2_P2 = 0x0484cb0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R3_P2 = 0x0484cf0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R4_P2 = 0x0484d30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R5_P2 = 0x0484d70cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R6_P2 = 0x0484db0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R7_P2 = 0x0484df0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R8_P2 = 0x0484e30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG3_U0_P2 = 0x0485034cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG3_U0_P2 = 0x0485023cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG3_U0_P2 = 0x0485024cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG3_U0_P2 = 0x0485020cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG3_U1_P2 = 0x0485074cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG3_U1_P2 = 0x0485063cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG3_U1_P2 = 0x0485064cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG3_U1_P2 = 0x0485060cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R0_P2 = 0x0485030cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R1_P2 = 0x0485070cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R2_P2 = 0x04850b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R3_P2 = 0x04850f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R4_P2 = 0x0485130cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R5_P2 = 0x0485170cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R6_P2 = 0x04851b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R7_P2 = 0x04851f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R8_P2 = 0x0485230cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG3_U0_P2 = 0x0485434cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG3_U0_P2 = 0x0485423cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG3_U0_P2 = 0x0485424cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG3_U0_P2 = 0x0485420cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG3_U1_P2 = 0x0485474cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG3_U1_P2 = 0x0485463cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG3_U1_P2 = 0x0485464cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG3_U1_P2 = 0x0485460cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R0_P2 = 0x0485430cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R1_P2 = 0x0485470cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R2_P2 = 0x04854b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R3_P2 = 0x04854f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R4_P2 = 0x0485530cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R5_P2 = 0x0485570cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R6_P2 = 0x04855b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R7_P2 = 0x04855f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R8_P2 = 0x0485630cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG3_U0_P2 = 0x0485834cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG3_U0_P2 = 0x0485823cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG3_U0_P2 = 0x0485824cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG3_U0_P2 = 0x0485820cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG3_U1_P2 = 0x0485874cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG3_U1_P2 = 0x0485863cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG3_U1_P2 = 0x0485864cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG3_U1_P2 = 0x0485860cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R0_P2 = 0x0485830cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R1_P2 = 0x0485870cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R2_P2 = 0x04858b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R3_P2 = 0x04858f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R4_P2 = 0x0485930cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R5_P2 = 0x0485970cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R6_P2 = 0x04859b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R7_P2 = 0x04859f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R8_P2 = 0x0485a30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG3_U0_P2 = 0x0485c34cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG3_U0_P2 = 0x0485c23cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG3_U0_P2 = 0x0485c24cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG3_U0_P2 = 0x0485c20cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG3_U1_P2 = 0x0485c74cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG3_U1_P2 = 0x0485c63cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG3_U1_P2 = 0x0485c64cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG3_U1_P2 = 0x0485c60cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R0_P2 = 0x0485c30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R1_P2 = 0x0485c70cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R2_P2 = 0x0485cb0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R3_P2 = 0x0485cf0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R4_P2 = 0x0485d30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R5_P2 = 0x0485d70cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R6_P2 = 0x0485db0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R7_P2 = 0x0485df0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R8_P2 = 0x0485e30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG3_U0_P2 = 0x0486034cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG3_U0_P2 = 0x0486023cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG3_U0_P2 = 0x0486024cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG3_U0_P2 = 0x0486020cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG3_U1_P2 = 0x0486074cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG3_U1_P2 = 0x0486063cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG3_U1_P2 = 0x0486064cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG3_U1_P2 = 0x0486060cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R0_P2 = 0x0486030cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R1_P2 = 0x0486070cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R2_P2 = 0x04860b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R3_P2 = 0x04860f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R4_P2 = 0x0486130cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R5_P2 = 0x0486170cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R6_P2 = 0x04861b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R7_P2 = 0x04861f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R8_P2 = 0x0486230cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG3_U0_P2 = 0x0486434cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG3_U0_P2 = 0x0486423cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG3_U0_P2 = 0x0486424cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG3_U0_P2 = 0x0486420cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG3_U1_P2 = 0x0486474cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG3_U1_P2 = 0x0486463cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG3_U1_P2 = 0x0486464cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG3_U1_P2 = 0x0486460cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R0_P2 = 0x0486430cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R1_P2 = 0x0486470cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R2_P2 = 0x04864b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R3_P2 = 0x04864f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R4_P2 = 0x0486530cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R5_P2 = 0x0486570cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R6_P2 = 0x04865b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R7_P2 = 0x04865f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R8_P2 = 0x0486630cull;
+static const uint64_t EXP_DDR4_PHY_ANIB0_ATXDLY_P2 = 0x04800200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB1_ATXDLY_P2 = 0x04804200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB2_ATXDLY_P2 = 0x04808200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB3_ATXDLY_P2 = 0x0480c200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB4_ATXDLY_P2 = 0x04810200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB5_ATXDLY_P2 = 0x04814200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB6_ATXDLY_P2 = 0x04818200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB7_ATXDLY_P2 = 0x0481c200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB8_ATXDLY_P2 = 0x04820200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG0_U0_P3 = 0x04c40340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG0_U0_P3 = 0x04c40230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG0_U0_P3 = 0x04c40240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG0_U0_P3 = 0x04c40200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG0_U1_P3 = 0x04c40740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG0_U1_P3 = 0x04c40630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG0_U1_P3 = 0x04c40640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG0_U1_P3 = 0x04c40600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R0_P3 = 0x04c40300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R1_P3 = 0x04c40700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R2_P3 = 0x04c40b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R3_P3 = 0x04c40f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R4_P3 = 0x04c41300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R5_P3 = 0x04c41700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R6_P3 = 0x04c41b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R7_P3 = 0x04c41f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG0_R8_P3 = 0x04c42300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG0_U0_P3 = 0x04c44340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG0_U0_P3 = 0x04c44230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG0_U0_P3 = 0x04c44240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG0_U0_P3 = 0x04c44200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG0_U1_P3 = 0x04c44740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG0_U1_P3 = 0x04c44630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG0_U1_P3 = 0x04c44640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG0_U1_P3 = 0x04c44600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R0_P3 = 0x04c44300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R1_P3 = 0x04c44700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R2_P3 = 0x04c44b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R3_P3 = 0x04c44f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R4_P3 = 0x04c45300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R5_P3 = 0x04c45700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R6_P3 = 0x04c45b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R7_P3 = 0x04c45f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG0_R8_P3 = 0x04c46300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG0_U0_P3 = 0x04c48340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG0_U0_P3 = 0x04c48230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG0_U0_P3 = 0x04c48240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG0_U0_P3 = 0x04c48200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG0_U1_P3 = 0x04c48740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG0_U1_P3 = 0x04c48630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG0_U1_P3 = 0x04c48640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG0_U1_P3 = 0x04c48600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R0_P3 = 0x04c48300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R1_P3 = 0x04c48700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R2_P3 = 0x04c48b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R3_P3 = 0x04c48f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R4_P3 = 0x04c49300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R5_P3 = 0x04c49700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R6_P3 = 0x04c49b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R7_P3 = 0x04c49f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG0_R8_P3 = 0x04c4a300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG0_U0_P3 = 0x04c4c340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG0_U0_P3 = 0x04c4c230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG0_U0_P3 = 0x04c4c240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG0_U0_P3 = 0x04c4c200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG0_U1_P3 = 0x04c4c740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG0_U1_P3 = 0x04c4c630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG0_U1_P3 = 0x04c4c640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG0_U1_P3 = 0x04c4c600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R0_P3 = 0x04c4c300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R1_P3 = 0x04c4c700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R2_P3 = 0x04c4cb00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R3_P3 = 0x04c4cf00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R4_P3 = 0x04c4d300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R5_P3 = 0x04c4d700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R6_P3 = 0x04c4db00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R7_P3 = 0x04c4df00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG0_R8_P3 = 0x04c4e300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG0_U0_P3 = 0x04c50340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG0_U0_P3 = 0x04c50230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG0_U0_P3 = 0x04c50240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG0_U0_P3 = 0x04c50200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG0_U1_P3 = 0x04c50740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG0_U1_P3 = 0x04c50630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG0_U1_P3 = 0x04c50640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG0_U1_P3 = 0x04c50600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R0_P3 = 0x04c50300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R1_P3 = 0x04c50700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R2_P3 = 0x04c50b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R3_P3 = 0x04c50f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R4_P3 = 0x04c51300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R5_P3 = 0x04c51700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R6_P3 = 0x04c51b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R7_P3 = 0x04c51f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG0_R8_P3 = 0x04c52300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG0_U0_P3 = 0x04c54340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG0_U0_P3 = 0x04c54230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG0_U0_P3 = 0x04c54240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG0_U0_P3 = 0x04c54200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG0_U1_P3 = 0x04c54740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG0_U1_P3 = 0x04c54630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG0_U1_P3 = 0x04c54640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG0_U1_P3 = 0x04c54600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R0_P3 = 0x04c54300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R1_P3 = 0x04c54700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R2_P3 = 0x04c54b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R3_P3 = 0x04c54f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R4_P3 = 0x04c55300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R5_P3 = 0x04c55700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R6_P3 = 0x04c55b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R7_P3 = 0x04c55f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG0_R8_P3 = 0x04c56300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG0_U0_P3 = 0x04c58340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG0_U0_P3 = 0x04c58230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG0_U0_P3 = 0x04c58240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG0_U0_P3 = 0x04c58200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG0_U1_P3 = 0x04c58740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG0_U1_P3 = 0x04c58630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG0_U1_P3 = 0x04c58640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG0_U1_P3 = 0x04c58600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R0_P3 = 0x04c58300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R1_P3 = 0x04c58700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R2_P3 = 0x04c58b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R3_P3 = 0x04c58f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R4_P3 = 0x04c59300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R5_P3 = 0x04c59700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R6_P3 = 0x04c59b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R7_P3 = 0x04c59f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG0_R8_P3 = 0x04c5a300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG0_U0_P3 = 0x04c5c340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG0_U0_P3 = 0x04c5c230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG0_U0_P3 = 0x04c5c240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG0_U0_P3 = 0x04c5c200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG0_U1_P3 = 0x04c5c740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG0_U1_P3 = 0x04c5c630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG0_U1_P3 = 0x04c5c640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG0_U1_P3 = 0x04c5c600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R0_P3 = 0x04c5c300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R1_P3 = 0x04c5c700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R2_P3 = 0x04c5cb00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R3_P3 = 0x04c5cf00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R4_P3 = 0x04c5d300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R5_P3 = 0x04c5d700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R6_P3 = 0x04c5db00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R7_P3 = 0x04c5df00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG0_R8_P3 = 0x04c5e300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG0_U0_P3 = 0x04c60340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG0_U0_P3 = 0x04c60230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG0_U0_P3 = 0x04c60240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG0_U0_P3 = 0x04c60200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG0_U1_P3 = 0x04c60740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG0_U1_P3 = 0x04c60630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG0_U1_P3 = 0x04c60640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG0_U1_P3 = 0x04c60600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R0_P3 = 0x04c60300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R1_P3 = 0x04c60700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R2_P3 = 0x04c60b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R3_P3 = 0x04c60f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R4_P3 = 0x04c61300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R5_P3 = 0x04c61700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R6_P3 = 0x04c61b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R7_P3 = 0x04c61f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG0_R8_P3 = 0x04c62300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG0_U0_P3 = 0x04c64340ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG0_U0_P3 = 0x04c64230ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG0_U0_P3 = 0x04c64240ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG0_U0_P3 = 0x04c64200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG0_U1_P3 = 0x04c64740ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG0_U1_P3 = 0x04c64630ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG0_U1_P3 = 0x04c64640ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG0_U1_P3 = 0x04c64600ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R0_P3 = 0x04c64300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R1_P3 = 0x04c64700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R2_P3 = 0x04c64b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R3_P3 = 0x04c64f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R4_P3 = 0x04c65300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R5_P3 = 0x04c65700ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R6_P3 = 0x04c65b00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R7_P3 = 0x04c65f00ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG0_R8_P3 = 0x04c66300ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG1_U0_P3 = 0x04c40344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG1_U0_P3 = 0x04c40234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG1_U0_P3 = 0x04c40244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG1_U0_P3 = 0x04c40204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG1_U1_P3 = 0x04c40744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG1_U1_P3 = 0x04c40634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG1_U1_P3 = 0x04c40644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG1_U1_P3 = 0x04c40604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R0_P3 = 0x04c40304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R1_P3 = 0x04c40704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R2_P3 = 0x04c40b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R3_P3 = 0x04c40f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R4_P3 = 0x04c41304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R5_P3 = 0x04c41704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R6_P3 = 0x04c41b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R7_P3 = 0x04c41f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG1_R8_P3 = 0x04c42304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG1_U0_P3 = 0x04c44344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG1_U0_P3 = 0x04c44234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG1_U0_P3 = 0x04c44244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG1_U0_P3 = 0x04c44204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG1_U1_P3 = 0x04c44744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG1_U1_P3 = 0x04c44634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG1_U1_P3 = 0x04c44644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG1_U1_P3 = 0x04c44604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R0_P3 = 0x04c44304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R1_P3 = 0x04c44704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R2_P3 = 0x04c44b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R3_P3 = 0x04c44f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R4_P3 = 0x04c45304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R5_P3 = 0x04c45704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R6_P3 = 0x04c45b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R7_P3 = 0x04c45f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG1_R8_P3 = 0x04c46304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG1_U0_P3 = 0x04c48344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG1_U0_P3 = 0x04c48234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG1_U0_P3 = 0x04c48244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG1_U0_P3 = 0x04c48204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG1_U1_P3 = 0x04c48744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG1_U1_P3 = 0x04c48634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG1_U1_P3 = 0x04c48644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG1_U1_P3 = 0x04c48604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R0_P3 = 0x04c48304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R1_P3 = 0x04c48704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R2_P3 = 0x04c48b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R3_P3 = 0x04c48f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R4_P3 = 0x04c49304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R5_P3 = 0x04c49704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R6_P3 = 0x04c49b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R7_P3 = 0x04c49f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG1_R8_P3 = 0x04c4a304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG1_U0_P3 = 0x04c4c344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG1_U0_P3 = 0x04c4c234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG1_U0_P3 = 0x04c4c244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG1_U0_P3 = 0x04c4c204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG1_U1_P3 = 0x04c4c744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG1_U1_P3 = 0x04c4c634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG1_U1_P3 = 0x04c4c644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG1_U1_P3 = 0x04c4c604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R0_P3 = 0x04c4c304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R1_P3 = 0x04c4c704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R2_P3 = 0x04c4cb04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R3_P3 = 0x04c4cf04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R4_P3 = 0x04c4d304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R5_P3 = 0x04c4d704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R6_P3 = 0x04c4db04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R7_P3 = 0x04c4df04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG1_R8_P3 = 0x04c4e304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG1_U0_P3 = 0x04c50344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG1_U0_P3 = 0x04c50234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG1_U0_P3 = 0x04c50244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG1_U0_P3 = 0x04c50204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG1_U1_P3 = 0x04c50744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG1_U1_P3 = 0x04c50634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG1_U1_P3 = 0x04c50644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG1_U1_P3 = 0x04c50604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R0_P3 = 0x04c50304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R1_P3 = 0x04c50704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R2_P3 = 0x04c50b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R3_P3 = 0x04c50f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R4_P3 = 0x04c51304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R5_P3 = 0x04c51704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R6_P3 = 0x04c51b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R7_P3 = 0x04c51f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG1_R8_P3 = 0x04c52304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG1_U0_P3 = 0x04c54344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG1_U0_P3 = 0x04c54234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG1_U0_P3 = 0x04c54244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG1_U0_P3 = 0x04c54204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG1_U1_P3 = 0x04c54744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG1_U1_P3 = 0x04c54634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG1_U1_P3 = 0x04c54644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG1_U1_P3 = 0x04c54604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R0_P3 = 0x04c54304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R1_P3 = 0x04c54704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R2_P3 = 0x04c54b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R3_P3 = 0x04c54f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R4_P3 = 0x04c55304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R5_P3 = 0x04c55704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R6_P3 = 0x04c55b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R7_P3 = 0x04c55f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG1_R8_P3 = 0x04c56304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG1_U0_P3 = 0x04c58344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG1_U0_P3 = 0x04c58234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG1_U0_P3 = 0x04c58244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG1_U0_P3 = 0x04c58204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG1_U1_P3 = 0x04c58744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG1_U1_P3 = 0x04c58634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG1_U1_P3 = 0x04c58644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG1_U1_P3 = 0x04c58604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R0_P3 = 0x04c58304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R1_P3 = 0x04c58704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R2_P3 = 0x04c58b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R3_P3 = 0x04c58f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R4_P3 = 0x04c59304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R5_P3 = 0x04c59704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R6_P3 = 0x04c59b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R7_P3 = 0x04c59f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG1_R8_P3 = 0x04c5a304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG1_U0_P3 = 0x04c5c344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG1_U0_P3 = 0x04c5c234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG1_U0_P3 = 0x04c5c244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG1_U0_P3 = 0x04c5c204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG1_U1_P3 = 0x04c5c744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG1_U1_P3 = 0x04c5c634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG1_U1_P3 = 0x04c5c644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG1_U1_P3 = 0x04c5c604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R0_P3 = 0x04c5c304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R1_P3 = 0x04c5c704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R2_P3 = 0x04c5cb04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R3_P3 = 0x04c5cf04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R4_P3 = 0x04c5d304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R5_P3 = 0x04c5d704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R6_P3 = 0x04c5db04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R7_P3 = 0x04c5df04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG1_R8_P3 = 0x04c5e304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG1_U0_P3 = 0x04c60344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG1_U0_P3 = 0x04c60234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG1_U0_P3 = 0x04c60244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG1_U0_P3 = 0x04c60204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG1_U1_P3 = 0x04c60744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG1_U1_P3 = 0x04c60634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG1_U1_P3 = 0x04c60644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG1_U1_P3 = 0x04c60604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R0_P3 = 0x04c60304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R1_P3 = 0x04c60704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R2_P3 = 0x04c60b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R3_P3 = 0x04c60f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R4_P3 = 0x04c61304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R5_P3 = 0x04c61704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R6_P3 = 0x04c61b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R7_P3 = 0x04c61f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG1_R8_P3 = 0x04c62304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG1_U0_P3 = 0x04c64344ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG1_U0_P3 = 0x04c64234ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG1_U0_P3 = 0x04c64244ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG1_U0_P3 = 0x04c64204ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG1_U1_P3 = 0x04c64744ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG1_U1_P3 = 0x04c64634ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG1_U1_P3 = 0x04c64644ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG1_U1_P3 = 0x04c64604ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R0_P3 = 0x04c64304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R1_P3 = 0x04c64704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R2_P3 = 0x04c64b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R3_P3 = 0x04c64f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R4_P3 = 0x04c65304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R5_P3 = 0x04c65704ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R6_P3 = 0x04c65b04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R7_P3 = 0x04c65f04ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG1_R8_P3 = 0x04c66304ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG2_U0_P3 = 0x04c40348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG2_U0_P3 = 0x04c40238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG2_U0_P3 = 0x04c40248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG2_U0_P3 = 0x04c40208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG2_U1_P3 = 0x04c40748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG2_U1_P3 = 0x04c40638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG2_U1_P3 = 0x04c40648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG2_U1_P3 = 0x04c40608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R0_P3 = 0x04c40308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R1_P3 = 0x04c40708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R2_P3 = 0x04c40b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R3_P3 = 0x04c40f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R4_P3 = 0x04c41308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R5_P3 = 0x04c41708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R6_P3 = 0x04c41b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R7_P3 = 0x04c41f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG2_R8_P3 = 0x04c42308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG2_U0_P3 = 0x04c44348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG2_U0_P3 = 0x04c44238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG2_U0_P3 = 0x04c44248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG2_U0_P3 = 0x04c44208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG2_U1_P3 = 0x04c44748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG2_U1_P3 = 0x04c44638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG2_U1_P3 = 0x04c44648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG2_U1_P3 = 0x04c44608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R0_P3 = 0x04c44308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R1_P3 = 0x04c44708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R2_P3 = 0x04c44b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R3_P3 = 0x04c44f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R4_P3 = 0x04c45308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R5_P3 = 0x04c45708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R6_P3 = 0x04c45b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R7_P3 = 0x04c45f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG2_R8_P3 = 0x04c46308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG2_U0_P3 = 0x04c48348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG2_U0_P3 = 0x04c48238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG2_U0_P3 = 0x04c48248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG2_U0_P3 = 0x04c48208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG2_U1_P3 = 0x04c48748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG2_U1_P3 = 0x04c48638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG2_U1_P3 = 0x04c48648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG2_U1_P3 = 0x04c48608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R0_P3 = 0x04c48308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R1_P3 = 0x04c48708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R2_P3 = 0x04c48b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R3_P3 = 0x04c48f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R4_P3 = 0x04c49308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R5_P3 = 0x04c49708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R6_P3 = 0x04c49b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R7_P3 = 0x04c49f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG2_R8_P3 = 0x04c4a308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG2_U0_P3 = 0x04c4c348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG2_U0_P3 = 0x04c4c238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG2_U0_P3 = 0x04c4c248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG2_U0_P3 = 0x04c4c208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG2_U1_P3 = 0x04c4c748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG2_U1_P3 = 0x04c4c638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG2_U1_P3 = 0x04c4c648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG2_U1_P3 = 0x04c4c608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R0_P3 = 0x04c4c308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R1_P3 = 0x04c4c708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R2_P3 = 0x04c4cb08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R3_P3 = 0x04c4cf08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R4_P3 = 0x04c4d308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R5_P3 = 0x04c4d708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R6_P3 = 0x04c4db08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R7_P3 = 0x04c4df08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG2_R8_P3 = 0x04c4e308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG2_U0_P3 = 0x04c50348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG2_U0_P3 = 0x04c50238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG2_U0_P3 = 0x04c50248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG2_U0_P3 = 0x04c50208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG2_U1_P3 = 0x04c50748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG2_U1_P3 = 0x04c50638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG2_U1_P3 = 0x04c50648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG2_U1_P3 = 0x04c50608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R0_P3 = 0x04c50308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R1_P3 = 0x04c50708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R2_P3 = 0x04c50b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R3_P3 = 0x04c50f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R4_P3 = 0x04c51308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R5_P3 = 0x04c51708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R6_P3 = 0x04c51b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R7_P3 = 0x04c51f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG2_R8_P3 = 0x04c52308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG2_U0_P3 = 0x04c54348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG2_U0_P3 = 0x04c54238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG2_U0_P3 = 0x04c54248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG2_U0_P3 = 0x04c54208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG2_U1_P3 = 0x04c54748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG2_U1_P3 = 0x04c54638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG2_U1_P3 = 0x04c54648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG2_U1_P3 = 0x04c54608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R0_P3 = 0x04c54308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R1_P3 = 0x04c54708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R2_P3 = 0x04c54b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R3_P3 = 0x04c54f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R4_P3 = 0x04c55308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R5_P3 = 0x04c55708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R6_P3 = 0x04c55b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R7_P3 = 0x04c55f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG2_R8_P3 = 0x04c56308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG2_U0_P3 = 0x04c58348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG2_U0_P3 = 0x04c58238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG2_U0_P3 = 0x04c58248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG2_U0_P3 = 0x04c58208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG2_U1_P3 = 0x04c58748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG2_U1_P3 = 0x04c58638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG2_U1_P3 = 0x04c58648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG2_U1_P3 = 0x04c58608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R0_P3 = 0x04c58308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R1_P3 = 0x04c58708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R2_P3 = 0x04c58b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R3_P3 = 0x04c58f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R4_P3 = 0x04c59308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R5_P3 = 0x04c59708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R6_P3 = 0x04c59b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R7_P3 = 0x04c59f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG2_R8_P3 = 0x04c5a308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG2_U0_P3 = 0x04c5c348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG2_U0_P3 = 0x04c5c238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG2_U0_P3 = 0x04c5c248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG2_U0_P3 = 0x04c5c208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG2_U1_P3 = 0x04c5c748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG2_U1_P3 = 0x04c5c638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG2_U1_P3 = 0x04c5c648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG2_U1_P3 = 0x04c5c608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R0_P3 = 0x04c5c308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R1_P3 = 0x04c5c708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R2_P3 = 0x04c5cb08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R3_P3 = 0x04c5cf08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R4_P3 = 0x04c5d308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R5_P3 = 0x04c5d708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R6_P3 = 0x04c5db08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R7_P3 = 0x04c5df08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG2_R8_P3 = 0x04c5e308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG2_U0_P3 = 0x04c60348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG2_U0_P3 = 0x04c60238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG2_U0_P3 = 0x04c60248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG2_U0_P3 = 0x04c60208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG2_U1_P3 = 0x04c60748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG2_U1_P3 = 0x04c60638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG2_U1_P3 = 0x04c60648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG2_U1_P3 = 0x04c60608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R0_P3 = 0x04c60308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R1_P3 = 0x04c60708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R2_P3 = 0x04c60b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R3_P3 = 0x04c60f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R4_P3 = 0x04c61308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R5_P3 = 0x04c61708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R6_P3 = 0x04c61b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R7_P3 = 0x04c61f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG2_R8_P3 = 0x04c62308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG2_U0_P3 = 0x04c64348ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG2_U0_P3 = 0x04c64238ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG2_U0_P3 = 0x04c64248ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG2_U0_P3 = 0x04c64208ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG2_U1_P3 = 0x04c64748ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG2_U1_P3 = 0x04c64638ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG2_U1_P3 = 0x04c64648ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG2_U1_P3 = 0x04c64608ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R0_P3 = 0x04c64308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R1_P3 = 0x04c64708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R2_P3 = 0x04c64b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R3_P3 = 0x04c64f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R4_P3 = 0x04c65308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R5_P3 = 0x04c65708ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R6_P3 = 0x04c65b08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R7_P3 = 0x04c65f08ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG2_R8_P3 = 0x04c66308ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG3_U0_P3 = 0x04c4034cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG3_U0_P3 = 0x04c4023cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG3_U0_P3 = 0x04c4024cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG3_U0_P3 = 0x04c4020cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG3_U1_P3 = 0x04c4074cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG3_U1_P3 = 0x04c4063cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKCDLYTG3_U1_P3 = 0x04c4064cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXENDLYTG3_U1_P3 = 0x04c4060cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R0_P3 = 0x04c4030cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R1_P3 = 0x04c4070cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R2_P3 = 0x04c40b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R3_P3 = 0x04c40f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R4_P3 = 0x04c4130cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R5_P3 = 0x04c4170cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R6_P3 = 0x04c41b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R7_P3 = 0x04c41f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQDLYTG3_R8_P3 = 0x04c4230cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG3_U0_P3 = 0x04c4434cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG3_U0_P3 = 0x04c4423cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG3_U0_P3 = 0x04c4424cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG3_U0_P3 = 0x04c4420cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQSDLYTG3_U1_P3 = 0x04c4474cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKDLYTG3_U1_P3 = 0x04c4463cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXCLKCDLYTG3_U1_P3 = 0x04c4464cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXENDLYTG3_U1_P3 = 0x04c4460cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R0_P3 = 0x04c4430cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R1_P3 = 0x04c4470cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R2_P3 = 0x04c44b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R3_P3 = 0x04c44f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R4_P3 = 0x04c4530cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R5_P3 = 0x04c4570cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R6_P3 = 0x04c45b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R7_P3 = 0x04c45f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_TXDQDLYTG3_R8_P3 = 0x04c4630cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG3_U0_P3 = 0x04c4834cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG3_U0_P3 = 0x04c4823cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG3_U0_P3 = 0x04c4824cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG3_U0_P3 = 0x04c4820cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQSDLYTG3_U1_P3 = 0x04c4874cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKDLYTG3_U1_P3 = 0x04c4863cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXCLKCDLYTG3_U1_P3 = 0x04c4864cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXENDLYTG3_U1_P3 = 0x04c4860cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R0_P3 = 0x04c4830cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R1_P3 = 0x04c4870cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R2_P3 = 0x04c48b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R3_P3 = 0x04c48f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R4_P3 = 0x04c4930cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R5_P3 = 0x04c4970cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R6_P3 = 0x04c49b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R7_P3 = 0x04c49f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_TXDQDLYTG3_R8_P3 = 0x04c4a30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG3_U0_P3 = 0x04c4c34cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG3_U0_P3 = 0x04c4c23cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG3_U0_P3 = 0x04c4c24cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG3_U0_P3 = 0x04c4c20cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQSDLYTG3_U1_P3 = 0x04c4c74cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKDLYTG3_U1_P3 = 0x04c4c63cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXCLKCDLYTG3_U1_P3 = 0x04c4c64cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXENDLYTG3_U1_P3 = 0x04c4c60cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R0_P3 = 0x04c4c30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R1_P3 = 0x04c4c70cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R2_P3 = 0x04c4cb0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R3_P3 = 0x04c4cf0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R4_P3 = 0x04c4d30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R5_P3 = 0x04c4d70cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R6_P3 = 0x04c4db0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R7_P3 = 0x04c4df0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_TXDQDLYTG3_R8_P3 = 0x04c4e30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG3_U0_P3 = 0x04c5034cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG3_U0_P3 = 0x04c5023cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG3_U0_P3 = 0x04c5024cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG3_U0_P3 = 0x04c5020cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQSDLYTG3_U1_P3 = 0x04c5074cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKDLYTG3_U1_P3 = 0x04c5063cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXCLKCDLYTG3_U1_P3 = 0x04c5064cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXENDLYTG3_U1_P3 = 0x04c5060cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R0_P3 = 0x04c5030cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R1_P3 = 0x04c5070cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R2_P3 = 0x04c50b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R3_P3 = 0x04c50f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R4_P3 = 0x04c5130cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R5_P3 = 0x04c5170cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R6_P3 = 0x04c51b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R7_P3 = 0x04c51f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_TXDQDLYTG3_R8_P3 = 0x04c5230cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG3_U0_P3 = 0x04c5434cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG3_U0_P3 = 0x04c5423cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG3_U0_P3 = 0x04c5424cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG3_U0_P3 = 0x04c5420cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQSDLYTG3_U1_P3 = 0x04c5474cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKDLYTG3_U1_P3 = 0x04c5463cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXCLKCDLYTG3_U1_P3 = 0x04c5464cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXENDLYTG3_U1_P3 = 0x04c5460cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R0_P3 = 0x04c5430cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R1_P3 = 0x04c5470cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R2_P3 = 0x04c54b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R3_P3 = 0x04c54f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R4_P3 = 0x04c5530cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R5_P3 = 0x04c5570cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R6_P3 = 0x04c55b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R7_P3 = 0x04c55f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_TXDQDLYTG3_R8_P3 = 0x04c5630cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG3_U0_P3 = 0x04c5834cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG3_U0_P3 = 0x04c5823cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG3_U0_P3 = 0x04c5824cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG3_U0_P3 = 0x04c5820cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQSDLYTG3_U1_P3 = 0x04c5874cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKDLYTG3_U1_P3 = 0x04c5863cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXCLKCDLYTG3_U1_P3 = 0x04c5864cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXENDLYTG3_U1_P3 = 0x04c5860cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R0_P3 = 0x04c5830cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R1_P3 = 0x04c5870cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R2_P3 = 0x04c58b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R3_P3 = 0x04c58f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R4_P3 = 0x04c5930cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R5_P3 = 0x04c5970cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R6_P3 = 0x04c59b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R7_P3 = 0x04c59f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_TXDQDLYTG3_R8_P3 = 0x04c5a30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG3_U0_P3 = 0x04c5c34cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG3_U0_P3 = 0x04c5c23cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG3_U0_P3 = 0x04c5c24cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG3_U0_P3 = 0x04c5c20cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQSDLYTG3_U1_P3 = 0x04c5c74cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKDLYTG3_U1_P3 = 0x04c5c63cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXCLKCDLYTG3_U1_P3 = 0x04c5c64cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXENDLYTG3_U1_P3 = 0x04c5c60cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R0_P3 = 0x04c5c30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R1_P3 = 0x04c5c70cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R2_P3 = 0x04c5cb0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R3_P3 = 0x04c5cf0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R4_P3 = 0x04c5d30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R5_P3 = 0x04c5d70cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R6_P3 = 0x04c5db0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R7_P3 = 0x04c5df0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_TXDQDLYTG3_R8_P3 = 0x04c5e30cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG3_U0_P3 = 0x04c6034cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG3_U0_P3 = 0x04c6023cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG3_U0_P3 = 0x04c6024cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG3_U0_P3 = 0x04c6020cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQSDLYTG3_U1_P3 = 0x04c6074cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKDLYTG3_U1_P3 = 0x04c6063cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXCLKCDLYTG3_U1_P3 = 0x04c6064cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXENDLYTG3_U1_P3 = 0x04c6060cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R0_P3 = 0x04c6030cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R1_P3 = 0x04c6070cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R2_P3 = 0x04c60b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R3_P3 = 0x04c60f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R4_P3 = 0x04c6130cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R5_P3 = 0x04c6170cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R6_P3 = 0x04c61b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R7_P3 = 0x04c61f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_TXDQDLYTG3_R8_P3 = 0x04c6230cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG3_U0_P3 = 0x04c6434cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG3_U0_P3 = 0x04c6423cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG3_U0_P3 = 0x04c6424cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG3_U0_P3 = 0x04c6420cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQSDLYTG3_U1_P3 = 0x04c6474cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKDLYTG3_U1_P3 = 0x04c6463cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXCLKCDLYTG3_U1_P3 = 0x04c6464cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXENDLYTG3_U1_P3 = 0x04c6460cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R0_P3 = 0x04c6430cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R1_P3 = 0x04c6470cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R2_P3 = 0x04c64b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R3_P3 = 0x04c64f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R4_P3 = 0x04c6530cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R5_P3 = 0x04c6570cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R6_P3 = 0x04c65b0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R7_P3 = 0x04c65f0cull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_TXDQDLYTG3_R8_P3 = 0x04c6630cull;
+static const uint64_t EXP_DDR4_PHY_ANIB0_ATXDLY_P3 = 0x04c00200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB1_ATXDLY_P3 = 0x04c04200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB2_ATXDLY_P3 = 0x04c08200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB3_ATXDLY_P3 = 0x04c0c200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB4_ATXDLY_P3 = 0x04c10200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB5_ATXDLY_P3 = 0x04c14200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB6_ATXDLY_P3 = 0x04c18200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB7_ATXDLY_P3 = 0x04c1c200ull;
+static const uint64_t EXP_DDR4_PHY_ANIB8_ATXDLY_P3 = 0x04c20200ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG0_R0 = 0x040401a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG0_R1 = 0x040405a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG0_R2 = 0x040409a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG0_R3 = 0x04040da0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG0_R4 = 0x040411a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG0_R5 = 0x040415a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG0_R6 = 0x040419a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG0_R7 = 0x04041da0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG0_R8 = 0x040421a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG0_R0 = 0x040441a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG0_R1 = 0x040445a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG0_R2 = 0x040449a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG0_R3 = 0x04044da0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG0_R4 = 0x040451a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG0_R5 = 0x040455a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG0_R6 = 0x040459a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG0_R7 = 0x04045da0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG0_R8 = 0x040461a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG0_R0 = 0x040481a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG0_R1 = 0x040485a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG0_R2 = 0x040489a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG0_R3 = 0x04048da0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG0_R4 = 0x040491a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG0_R5 = 0x040495a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG0_R6 = 0x040499a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG0_R7 = 0x04049da0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG0_R8 = 0x0404a1a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG0_R0 = 0x0404c1a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG0_R1 = 0x0404c5a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG0_R2 = 0x0404c9a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG0_R3 = 0x0404cda0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG0_R4 = 0x0404d1a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG0_R5 = 0x0404d5a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG0_R6 = 0x0404d9a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG0_R7 = 0x0404dda0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG0_R8 = 0x0404e1a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG0_R0 = 0x040501a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG0_R1 = 0x040505a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG0_R2 = 0x040509a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG0_R3 = 0x04050da0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG0_R4 = 0x040511a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG0_R5 = 0x040515a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG0_R6 = 0x040519a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG0_R7 = 0x04051da0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG0_R8 = 0x040521a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG0_R0 = 0x040541a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG0_R1 = 0x040545a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG0_R2 = 0x040549a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG0_R3 = 0x04054da0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG0_R4 = 0x040551a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG0_R5 = 0x040555a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG0_R6 = 0x040559a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG0_R7 = 0x04055da0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG0_R8 = 0x040561a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG0_R0 = 0x040581a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG0_R1 = 0x040585a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG0_R2 = 0x040589a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG0_R3 = 0x04058da0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG0_R4 = 0x040591a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG0_R5 = 0x040595a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG0_R6 = 0x040599a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG0_R7 = 0x04059da0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG0_R8 = 0x0405a1a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG0_R0 = 0x0405c1a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG0_R1 = 0x0405c5a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG0_R2 = 0x0405c9a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG0_R3 = 0x0405cda0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG0_R4 = 0x0405d1a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG0_R5 = 0x0405d5a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG0_R6 = 0x0405d9a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG0_R7 = 0x0405dda0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG0_R8 = 0x0405e1a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG0_R0 = 0x040601a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG0_R1 = 0x040605a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG0_R2 = 0x040609a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG0_R3 = 0x04060da0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG0_R4 = 0x040611a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG0_R5 = 0x040615a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG0_R6 = 0x040619a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG0_R7 = 0x04061da0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG0_R8 = 0x040621a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG0_R0 = 0x040641a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG0_R1 = 0x040645a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG0_R2 = 0x040649a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG0_R3 = 0x04064da0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG0_R4 = 0x040651a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG0_R5 = 0x040655a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG0_R6 = 0x040659a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG0_R7 = 0x04065da0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG0_R8 = 0x040661a0ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG1_R0 = 0x040401a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG1_R1 = 0x040405a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG1_R2 = 0x040409a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG1_R3 = 0x04040da4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG1_R4 = 0x040411a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG1_R5 = 0x040415a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG1_R6 = 0x040419a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG1_R7 = 0x04041da4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG1_R8 = 0x040421a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG1_R0 = 0x040441a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG1_R1 = 0x040445a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG1_R2 = 0x040449a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG1_R3 = 0x04044da4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG1_R4 = 0x040451a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG1_R5 = 0x040455a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG1_R6 = 0x040459a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG1_R7 = 0x04045da4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG1_R8 = 0x040461a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG1_R0 = 0x040481a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG1_R1 = 0x040485a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG1_R2 = 0x040489a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG1_R3 = 0x04048da4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG1_R4 = 0x040491a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG1_R5 = 0x040495a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG1_R6 = 0x040499a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG1_R7 = 0x04049da4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG1_R8 = 0x0404a1a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG1_R0 = 0x0404c1a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG1_R1 = 0x0404c5a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG1_R2 = 0x0404c9a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG1_R3 = 0x0404cda4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG1_R4 = 0x0404d1a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG1_R5 = 0x0404d5a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG1_R6 = 0x0404d9a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG1_R7 = 0x0404dda4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG1_R8 = 0x0404e1a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG1_R0 = 0x040501a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG1_R1 = 0x040505a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG1_R2 = 0x040509a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG1_R3 = 0x04050da4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG1_R4 = 0x040511a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG1_R5 = 0x040515a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG1_R6 = 0x040519a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG1_R7 = 0x04051da4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG1_R8 = 0x040521a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG1_R0 = 0x040541a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG1_R1 = 0x040545a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG1_R2 = 0x040549a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG1_R3 = 0x04054da4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG1_R4 = 0x040551a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG1_R5 = 0x040555a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG1_R6 = 0x040559a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG1_R7 = 0x04055da4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG1_R8 = 0x040561a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG1_R0 = 0x040581a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG1_R1 = 0x040585a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG1_R2 = 0x040589a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG1_R3 = 0x04058da4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG1_R4 = 0x040591a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG1_R5 = 0x040595a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG1_R6 = 0x040599a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG1_R7 = 0x04059da4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG1_R8 = 0x0405a1a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG1_R0 = 0x0405c1a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG1_R1 = 0x0405c5a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG1_R2 = 0x0405c9a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG1_R3 = 0x0405cda4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG1_R4 = 0x0405d1a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG1_R5 = 0x0405d5a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG1_R6 = 0x0405d9a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG1_R7 = 0x0405dda4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG1_R8 = 0x0405e1a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG1_R0 = 0x040601a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG1_R1 = 0x040605a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG1_R2 = 0x040609a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG1_R3 = 0x04060da4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG1_R4 = 0x040611a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG1_R5 = 0x040615a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG1_R6 = 0x040619a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG1_R7 = 0x04061da4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG1_R8 = 0x040621a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG1_R0 = 0x040641a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG1_R1 = 0x040645a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG1_R2 = 0x040649a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG1_R3 = 0x04064da4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG1_R4 = 0x040651a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG1_R5 = 0x040655a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG1_R6 = 0x040659a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG1_R7 = 0x04065da4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG1_R8 = 0x040661a4ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG2_R0 = 0x040401a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG2_R1 = 0x040405a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG2_R2 = 0x040409a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG2_R3 = 0x04040da8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG2_R4 = 0x040411a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG2_R5 = 0x040415a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG2_R6 = 0x040419a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG2_R7 = 0x04041da8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG2_R8 = 0x040421a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG2_R0 = 0x040441a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG2_R1 = 0x040445a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG2_R2 = 0x040449a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG2_R3 = 0x04044da8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG2_R4 = 0x040451a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG2_R5 = 0x040455a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG2_R6 = 0x040459a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG2_R7 = 0x04045da8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG2_R8 = 0x040461a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG2_R0 = 0x040481a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG2_R1 = 0x040485a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG2_R2 = 0x040489a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG2_R3 = 0x04048da8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG2_R4 = 0x040491a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG2_R5 = 0x040495a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG2_R6 = 0x040499a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG2_R7 = 0x04049da8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG2_R8 = 0x0404a1a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG2_R0 = 0x0404c1a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG2_R1 = 0x0404c5a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG2_R2 = 0x0404c9a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG2_R3 = 0x0404cda8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG2_R4 = 0x0404d1a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG2_R5 = 0x0404d5a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG2_R6 = 0x0404d9a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG2_R7 = 0x0404dda8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG2_R8 = 0x0404e1a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG2_R0 = 0x040501a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG2_R1 = 0x040505a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG2_R2 = 0x040509a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG2_R3 = 0x04050da8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG2_R4 = 0x040511a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG2_R5 = 0x040515a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG2_R6 = 0x040519a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG2_R7 = 0x04051da8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG2_R8 = 0x040521a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG2_R0 = 0x040541a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG2_R1 = 0x040545a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG2_R2 = 0x040549a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG2_R3 = 0x04054da8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG2_R4 = 0x040551a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG2_R5 = 0x040555a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG2_R6 = 0x040559a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG2_R7 = 0x04055da8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG2_R8 = 0x040561a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG2_R0 = 0x040581a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG2_R1 = 0x040585a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG2_R2 = 0x040589a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG2_R3 = 0x04058da8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG2_R4 = 0x040591a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG2_R5 = 0x040595a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG2_R6 = 0x040599a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG2_R7 = 0x04059da8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG2_R8 = 0x0405a1a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG2_R0 = 0x0405c1a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG2_R1 = 0x0405c5a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG2_R2 = 0x0405c9a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG2_R3 = 0x0405cda8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG2_R4 = 0x0405d1a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG2_R5 = 0x0405d5a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG2_R6 = 0x0405d9a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG2_R7 = 0x0405dda8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG2_R8 = 0x0405e1a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG2_R0 = 0x040601a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG2_R1 = 0x040605a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG2_R2 = 0x040609a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG2_R3 = 0x04060da8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG2_R4 = 0x040611a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG2_R5 = 0x040615a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG2_R6 = 0x040619a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG2_R7 = 0x04061da8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG2_R8 = 0x040621a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG2_R0 = 0x040641a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG2_R1 = 0x040645a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG2_R2 = 0x040649a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG2_R3 = 0x04064da8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG2_R4 = 0x040651a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG2_R5 = 0x040655a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG2_R6 = 0x040659a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG2_R7 = 0x04065da8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG2_R8 = 0x040661a8ull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG3_R0 = 0x040401acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG3_R1 = 0x040405acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG3_R2 = 0x040409acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG3_R3 = 0x04040dacull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG3_R4 = 0x040411acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG3_R5 = 0x040415acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG3_R6 = 0x040419acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG3_R7 = 0x04041dacull;
+static const uint64_t EXP_DDR4_PHY_DBYTE0_RXPBDLYTG3_R8 = 0x040421acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG3_R0 = 0x040441acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG3_R1 = 0x040445acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG3_R2 = 0x040449acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG3_R3 = 0x04044dacull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG3_R4 = 0x040451acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG3_R5 = 0x040455acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG3_R6 = 0x040459acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG3_R7 = 0x04045dacull;
+static const uint64_t EXP_DDR4_PHY_DBYTE1_RXPBDLYTG3_R8 = 0x040461acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG3_R0 = 0x040481acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG3_R1 = 0x040485acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG3_R2 = 0x040489acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG3_R3 = 0x04048dacull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG3_R4 = 0x040491acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG3_R5 = 0x040495acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG3_R6 = 0x040499acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG3_R7 = 0x04049dacull;
+static const uint64_t EXP_DDR4_PHY_DBYTE2_RXPBDLYTG3_R8 = 0x0404a1acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG3_R0 = 0x0404c1acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG3_R1 = 0x0404c5acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG3_R2 = 0x0404c9acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG3_R3 = 0x0404cdacull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG3_R4 = 0x0404d1acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG3_R5 = 0x0404d5acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG3_R6 = 0x0404d9acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG3_R7 = 0x0404ddacull;
+static const uint64_t EXP_DDR4_PHY_DBYTE3_RXPBDLYTG3_R8 = 0x0404e1acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG3_R0 = 0x040501acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG3_R1 = 0x040505acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG3_R2 = 0x040509acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG3_R3 = 0x04050dacull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG3_R4 = 0x040511acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG3_R5 = 0x040515acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG3_R6 = 0x040519acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG3_R7 = 0x04051dacull;
+static const uint64_t EXP_DDR4_PHY_DBYTE4_RXPBDLYTG3_R8 = 0x040521acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG3_R0 = 0x040541acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG3_R1 = 0x040545acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG3_R2 = 0x040549acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG3_R3 = 0x04054dacull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG3_R4 = 0x040551acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG3_R5 = 0x040555acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG3_R6 = 0x040559acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG3_R7 = 0x04055dacull;
+static const uint64_t EXP_DDR4_PHY_DBYTE5_RXPBDLYTG3_R8 = 0x040561acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG3_R0 = 0x040581acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG3_R1 = 0x040585acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG3_R2 = 0x040589acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG3_R3 = 0x04058dacull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG3_R4 = 0x040591acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG3_R5 = 0x040595acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG3_R6 = 0x040599acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG3_R7 = 0x04059dacull;
+static const uint64_t EXP_DDR4_PHY_DBYTE6_RXPBDLYTG3_R8 = 0x0405a1acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG3_R0 = 0x0405c1acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG3_R1 = 0x0405c5acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG3_R2 = 0x0405c9acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG3_R3 = 0x0405cdacull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG3_R4 = 0x0405d1acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG3_R5 = 0x0405d5acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG3_R6 = 0x0405d9acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG3_R7 = 0x0405ddacull;
+static const uint64_t EXP_DDR4_PHY_DBYTE7_RXPBDLYTG3_R8 = 0x0405e1acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG3_R0 = 0x040601acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG3_R1 = 0x040605acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG3_R2 = 0x040609acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG3_R3 = 0x04060dacull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG3_R4 = 0x040611acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG3_R5 = 0x040615acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG3_R6 = 0x040619acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG3_R7 = 0x04061dacull;
+static const uint64_t EXP_DDR4_PHY_DBYTE8_RXPBDLYTG3_R8 = 0x040621acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG3_R0 = 0x040641acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG3_R1 = 0x040645acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG3_R2 = 0x040649acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG3_R3 = 0x04064dacull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG3_R4 = 0x040651acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG3_R5 = 0x040655acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG3_R6 = 0x040659acull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG3_R7 = 0x04065dacull;
+static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG3_R8 = 0x040661acull;
+
 #endif