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author | Mark Pizzutillo <Mark.Pizzutillo@ibm.com> | 2019-06-18 15:12:45 -0500 |
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committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2019-06-26 10:10:05 -0500 |
commit | c88e93047c9a7e9ffbe819e94850939d57c3e1bd (patch) | |
tree | db1fe343336d15db3e1395311c52f80219b0c63a /src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils | |
parent | 6a075926870a46819e91d64cadb6060bd237e46d (diff) | |
download | talos-hostboot-c88e93047c9a7e9ffbe819e94850939d57c3e1bd.tar.gz talos-hostboot-c88e93047c9a7e9ffbe819e94850939d57c3e1bd.zip |
Update pmic_enable to bypass attribute checks for boot from EEPROM
When running pmic_enable in manual mode, eff_config isn't ran, so
the procedure would error out when trying to read any eff attributes.
Manual mode is able to run without them, so the code was modified
such that manual mode checks are done first in the procedure (before
any attribute checks occur).
Change-Id: I4d5bde234553ebeec21e062fe769b37fd3cba0db
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/79290
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/79359
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils')
-rw-r--r-- | src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_enable_utils.H | 55 |
1 files changed, 21 insertions, 34 deletions
diff --git a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_enable_utils.H b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_enable_utils.H index 0d6f5a692..527cc24e9 100644 --- a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_enable_utils.H +++ b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_enable_utils.H @@ -748,8 +748,7 @@ fapi_try_exit: template <mss::pmic::module_height H> fapi2::ReturnCode enable_chip(const fapi2::Target<fapi2::TargetType::TARGET_TYPE_PMIC>& i_pmic_target, const fapi2::Target<fapi2::TargetType::TARGET_TYPE_DIMM>& i_dimm_target, - const uint16_t i_vendor_id, - const mss::pmic::enable_mode i_mode); + const uint16_t i_vendor_id); /// /// @brief enable procedure for IDT PMIC and 1U or 2U DIMM @@ -764,45 +763,33 @@ template <> inline fapi2::ReturnCode enable_chip<mss::pmic::module_height::HEIGHT_1U>( const fapi2::Target<fapi2::TARGET_TYPE_PMIC>& i_pmic_target, const fapi2::Target<fapi2::TargetType::TARGET_TYPE_DIMM>& i_dimm_target, - const uint16_t i_vendor_id, - const mss::pmic::enable_mode i_mode) + const uint16_t i_vendor_id) { - if (i_mode == mss::pmic::enable_mode::SPD) - { - FAPI_INF("Setting PMIC settings from SPD"); + FAPI_INF("Setting PMIC %s settings from SPD", mss::c_str(i_pmic_target)); - // Make sure it is TI or IDT - FAPI_ASSERT((i_vendor_id == mss::pmic::vendor::IDT || - i_vendor_id == mss::pmic::vendor::TI), - fapi2::PMIC_CHIP_NOT_RECOGNIZED() - .set_TARGET(i_pmic_target) - .set_VENDOR_ID(i_vendor_id), - "Unknown PMIC: %s with vendor ID 0x%04hhX", - mss::c_str(i_pmic_target), - uint8_t(i_vendor_id) ); + // Make sure it is TI or IDT + FAPI_ASSERT((i_vendor_id == mss::pmic::vendor::IDT || + i_vendor_id == mss::pmic::vendor::TI), + fapi2::PMIC_CHIP_NOT_RECOGNIZED() + .set_TARGET(i_pmic_target) + .set_VENDOR_ID(i_vendor_id), + "Unknown PMIC: %s with vendor ID 0x%04hhX", + mss::c_str(i_pmic_target), + uint8_t(i_vendor_id) ); - if (i_vendor_id == mss::pmic::vendor::IDT) - { - FAPI_TRY(mss::pmic::bias_with_spd_settings<mss::pmic::vendor::IDT>(i_pmic_target, i_dimm_target), - "enable_chip<IDT, 1U/2U>: Error biasing PMIC %s with SPD settings", - mss::c_str(i_pmic_target)); - } - else // assert done in pmic_enable.C that vendor is IDT or TI - { - FAPI_TRY(mss::pmic::bias_with_spd_settings<mss::pmic::vendor::TI>(i_pmic_target, i_dimm_target), - "enable_chip<TI, 1U/2U>: Error biasing PMIC %s with SPD settings", - mss::c_str(i_pmic_target)); - } + if (i_vendor_id == mss::pmic::vendor::IDT) + { + FAPI_TRY(mss::pmic::bias_with_spd_settings<mss::pmic::vendor::IDT>(i_pmic_target, i_dimm_target), + "enable_chip<IDT, 1U/2U>: Error biasing PMIC %s with SPD settings", + mss::c_str(i_pmic_target)); } - else // manual mode + else // assert done in pmic_enable.C that vendor is IDT or TI { - FAPI_INF("Using built-in PMIC settings (defaults or from pmic_update)"); + FAPI_TRY(mss::pmic::bias_with_spd_settings<mss::pmic::vendor::TI>(i_pmic_target, i_dimm_target), + "enable_chip<TI, 1U/2U>: Error biasing PMIC %s with SPD settings", + mss::c_str(i_pmic_target)); } - // Execute VR Enable command - FAPI_TRY((mss::pmic::start_vr_enable(i_pmic_target)), - "enable_chip: Failed to start VR Enable for %s", mss::c_str(i_pmic_target)); - return fapi2::FAPI2_RC_SUCCESS; fapi_try_exit: |