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authorClaus Michael Olsen <cmolsen@us.ibm.com>2017-07-16 09:51:43 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2018-04-05 09:31:43 -0400
commite286748a94bde253ec0d0d5bfae7d1df99393546 (patch)
tree2d13581564bea3b6607aa1caff632291ddc59d7e /src/import/chips/common
parent3661916096ea58e7a99f031a46982106d593a0b2 (diff)
downloadtalos-hostboot-e286748a94bde253ec0d0d5bfae7d1df99393546.tar.gz
talos-hostboot-e286748a94bde253ec0d0d5bfae7d1df99393546.zip
Code restruct: ring_apply
- Consolidating the three <ppe>_image_ring_generation functions into a single shared, and renamed, ring_section_generation function, - Moving several data centric functions into common_ringId API, - Use of sizeof(<type or var>) instead of hardcoded assumptions about structure or data type sizes, - Renaming of variables which makes sense in the context of the scope of this commit, such as: - ringBuffer renamed to ringSection - ringBufSize renamed to ringSectionSize and type changed to uint32_t - Removes the backward compatibility to TORV3/V4 and now only works with latest TOR version, i.e. 6 at this point. About the Hw_ImageBuild_Prereq: - 51511 must have fully propagated into all repos and drivers used in FSP CI tests before this commit (43175) can be merged. 43175 removes the TORV3/V4 backwards compatibility to support TOR ring sections that have TOR level DD coordination. Key_Cronus_Test=XIP_REGRESS Change-Id: I0af25fa623c1c523eb0297e475066497787f3d15 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43175 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52211 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/common')
-rw-r--r--src/import/chips/common/utils/imageProcs/common_ringId.C60
-rw-r--r--src/import/chips/common/utils/imageProcs/common_ringId.H31
2 files changed, 68 insertions, 23 deletions
diff --git a/src/import/chips/common/utils/imageProcs/common_ringId.C b/src/import/chips/common/utils/imageProcs/common_ringId.C
index 8ee9441f1..3528ca557 100644
--- a/src/import/chips/common/utils/imageProcs/common_ringId.C
+++ b/src/import/chips/common/utils/imageProcs/common_ringId.C
@@ -34,7 +34,7 @@ namespace CEN_RID
};
#include <p9_infrastruct_help.H>
-// These strings must adhere precisely to the enum of ppeType.
+// These strings must adhere precisely to the enum of PpeType.
const char* ppeTypeName[] = { "SBE",
"CME",
"SGPE"
@@ -251,6 +251,64 @@ int ringid_get_raw_ring_file_path( uint32_t i_magic,
#endif // End of ifndef __HOSTBOOT_MODULE
+
+int ringid_get_noof_ring_ids( ChipType_t i_chipType,
+ RingId_t* o_numRingIds)
+{
+ int rc = INFRASTRUCT_RC_SUCCESS;
+
+ switch (i_chipType)
+ {
+ case CT_P9N:
+ case CT_P9C:
+ case CT_P9A:
+ *o_numRingIds = P9_RID::NUM_RING_IDS;
+ break;
+
+ case CT_CEN:
+ *o_numRingIds = CEN_RID::NUM_RING_IDS;
+ break;
+
+ default:
+ MY_ERR("ringid_get_noof_ring_ids(): Unsupported chipType (=%d) supplied",
+ i_chipType);
+ rc = TOR_INVALID_CHIPTYPE;
+ break;
+ }
+
+ return rc;
+}
+
+
+int ringid_get_ring_list( ChipType_t i_chipType,
+ RingId_t i_ringId,
+ GenRingIdList** o_ringIdList)
+{
+ int rc = INFRASTRUCT_RC_SUCCESS;
+
+ switch (i_chipType)
+ {
+ case CT_P9N:
+ case CT_P9C:
+ case CT_P9A:
+ *o_ringIdList = P9_RID::_ringid_get_ring_list(i_ringId);
+ break;
+
+ case CT_CEN:
+ *o_ringIdList = CEN_RID::_ringid_get_ring_list(i_ringId);
+ break;
+
+ default:
+ MY_ERR("ringid_get_ring_list(): Unsupported chipType (=%d) supplied",
+ i_chipType);
+ rc = TOR_INVALID_CHIPTYPE;
+ break;
+ }
+
+ return rc;
+}
+
+
int ringid_get_noof_chiplets( ChipType_t i_chipType,
uint32_t i_torMagic,
uint8_t* o_numChiplets )
diff --git a/src/import/chips/common/utils/imageProcs/common_ringId.H b/src/import/chips/common/utils/imageProcs/common_ringId.H
index a317ac4b1..7b60d5aed 100644
--- a/src/import/chips/common/utils/imageProcs/common_ringId.H
+++ b/src/import/chips/common/utils/imageProcs/common_ringId.H
@@ -29,8 +29,6 @@
#include <stdint.h>
#include <stddef.h>
-#define TORV3_SUPPORT
-
///////////////////////////////////////////////////////////////////////////////
// Declare assumptions - Begin //
// //
@@ -87,29 +85,14 @@ typedef struct
uint32_t magic; // =TOR_MAGIC_xyz
uint8_t version; // =TOR_VERSION
ChipType_t chipType; // Value from ChipType enum
-#ifdef TORV3_SUPPORT
- uint8_t ddLevel; // =0xff if MAGIC_HW, >0 all other MAGICs
- uint8_t numDdLevels; // >0 if MAGIC_HW, =1 all other MAGICs
-#else
uint8_t ddLevel; // Actual DD level of ringSection
uint8_t undefined;
-#endif
uint32_t size; // Size of ringSection.
} TorHeader_t;
//
// Subsequent TOR fields (listed in order they appear in TOR ringSections)
//
-#ifdef TORV3_SUPPORT
-typedef struct
-{
- uint32_t offset;
- uint32_t size;
- uint8_t ddLevel;
- uint8_t reserved[3];
-} TorDdBlock_t;
-#endif
-
typedef struct
{
uint32_t offset;
@@ -258,11 +241,8 @@ enum RingType
enum RingBlockType
{
GET_SINGLE_RING = 0x00,
-#ifdef TORV3_SUPPORT
- GET_DD_LEVEL_RINGS = 0x01,
-#endif
- GET_PPE_LEVEL_RINGS = 0x02,
- PUT_SINGLE_RING = 0x03
+ GET_PPE_LEVEL_RINGS = 0x01,
+ PUT_SINGLE_RING = 0x02
};
typedef struct
@@ -351,10 +331,17 @@ int ringid_get_raw_ring_file_path( uint32_t i_magic,
char* io_directory );
#endif
+int ringid_get_noof_ring_ids( ChipType_t i_chipType,
+ RingId_t* o_numRingIds);
+
int ringid_get_noof_chiplets( ChipType_t i_chipType,
uint32_t i_torMagic,
uint8_t* o_numChiplets );
+int ringid_get_ring_list( ChipType_t i_chipType,
+ RingId_t i_ringId,
+ GenRingIdList** o_ringIdList);
+
int ringid_get_properties( ChipType_t i_chipType,
uint32_t i_torMagic,
uint8_t i_torVersion,
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