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author | Ben Gass <bgass@us.ibm.com> | 2018-10-03 15:02:17 -0500 |
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committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2018-10-15 13:06:13 -0500 |
commit | 4fe67dfccf8104334e234f610acb78f5cdddda40 (patch) | |
tree | bc98cb37e3c19dd53b55fc2010cffa9c5e40998f /src/import/chips/centaur | |
parent | 1720267b190ad77594742fa76a61c0b13b323598 (diff) | |
download | talos-hostboot-4fe67dfccf8104334e234f610acb78f5cdddda40.tar.gz talos-hostboot-4fe67dfccf8104334e234f610acb78f5cdddda40.zip |
initCompiler updates
Fixes to handle when spys move locations within
scom registers.
Change-Id: Iadf2c44c27f68f82ed9bc590f22155e0749a37f6
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66943
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Claus M. Olsen <cmolsen@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66953
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/centaur')
-rw-r--r-- | src/import/chips/centaur/procedures/hwp/initfiles/centaur_ddrphy_scom.C | 34 | ||||
-rw-r--r-- | src/import/chips/centaur/procedures/hwp/initfiles/centaur_mba_scom.C | 33 |
2 files changed, 67 insertions, 0 deletions
diff --git a/src/import/chips/centaur/procedures/hwp/initfiles/centaur_ddrphy_scom.C b/src/import/chips/centaur/procedures/hwp/initfiles/centaur_ddrphy_scom.C index db0f1f046..b2614b35c 100644 --- a/src/import/chips/centaur/procedures/hwp/initfiles/centaur_ddrphy_scom.C +++ b/src/import/chips/centaur/procedures/hwp/initfiles/centaur_ddrphy_scom.C @@ -10668,6 +10668,22 @@ fapi2::ReturnCode centaur_ddrphy_scom(const fapi2::Target<fapi2::TARGET_TYPE_MBA { } + if (l_def_is_ddr4) + { + l_scom_buffer.insert<48, 4, 60, uint64_t>(literal_0b0001 ); + } + else if (l_def_not_ddr4) + { + l_scom_buffer.insert<48, 4, 60, uint64_t>(literal_0b0000 ); + } + + if (l_def_not_ddr4) + { + } + else if (l_def_is_ddr4) + { + } + if (l_def_not_ddr4) { l_scom_buffer.insert<62, 1, 63, uint64_t>(literal_0b0 ); @@ -22535,6 +22551,24 @@ fapi2::ReturnCode centaur_ddrphy_scom(const fapi2::Target<fapi2::TARGET_TYPE_MBA l_scom_buffer.insert<54, 1, 63, uint64_t>(literal_0b1 ); } + if (l_def_is_ddr4) + { + } + else if (l_def_not_ddr4) + { + } + + if (l_def_not_ddr4) + { + l_scom_buffer.insert<50, 1, 63, uint64_t>(literal_0b0 ); + l_scom_buffer.insert<54, 1, 63, uint64_t>(literal_0b0 ); + } + else if (l_def_is_ddr4) + { + l_scom_buffer.insert<50, 1, 63, uint64_t>(literal_0b1 ); + l_scom_buffer.insert<54, 1, 63, uint64_t>(literal_0b1 ); + } + if (literal_1) { } diff --git a/src/import/chips/centaur/procedures/hwp/initfiles/centaur_mba_scom.C b/src/import/chips/centaur/procedures/hwp/initfiles/centaur_mba_scom.C index 459c81468..d36392f12 100644 --- a/src/import/chips/centaur/procedures/hwp/initfiles/centaur_mba_scom.C +++ b/src/import/chips/centaur/procedures/hwp/initfiles/centaur_mba_scom.C @@ -6397,6 +6397,39 @@ fapi2::ReturnCode centaur_mba_scom(const fapi2::Target<fapi2::TARGET_TYPE_MBA>& l_scom_buffer.insert<9, 11, 53, uint64_t>(l_def_mba23_refresh_interval ); } + if (literal_1) + { + l_scom_buffer.insert<0, 1, 63, uint64_t>(literal_0b0 ); + } + + if (literal_1) + { + } + + if (literal_1) + { + l_scom_buffer.insert<20, 10, 53, uint64_t>(literal_0b00000000000 ); + } + + if (literal_1) + { + l_scom_buffer.insert<4, 1, 63, uint64_t>(literal_0b0 ); + } + + if (literal_1) + { + l_scom_buffer.insert<5, 4, 60, uint64_t>(literal_0b0111 ); + } + + if ((l_TGT0_ATTR_CHIP_UNIT_POS == literal_0)) + { + l_scom_buffer.insert<9, 11, 53, uint64_t>(l_def_mba01_refresh_interval ); + } + else if ((l_TGT0_ATTR_CHIP_UNIT_POS == literal_1)) + { + l_scom_buffer.insert<9, 11, 53, uint64_t>(l_def_mba23_refresh_interval ); + } + if (((((l_def_ddr4_1600_13_12_11 == literal_1) || (l_def_ddr4_1600_14_13_12 == literal_1)) || (l_def_ddr4_1600_14_13_12R == literal_1)) || (l_def_IS3A_IS3B == literal_1))) { |