P9 Centaur Erepair Update

- Updated Centaur Procedures to reference EDI registers

Change-Id: I138e13da1bd6f684a2c9be5989b9a3620ae953ae
CQ: SW439818
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63312
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63318
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>

3 files changed, 28 insertions, 27 deletions

diff --git a/src/import/chips/centaur/procedures/hwp/io/p9_io_cen_pdwn_lanes.C b/src/import/chips/centaur/procedures/hwp/io/p9_io_cen_pdwn_lanes.C
index 4a24e3cbf..52407c7a1 100644
--- a/src/import/chips/centaur/procedures/hwp/io/p9_io_cen_pdwn_lanes.C
+++ b/src/import/chips/centaur/procedures/hwp/io/p9_io_cen_pdwn_lanes.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -116,7 +116,7 @@ fapi2::ReturnCode rx_pdwn_lanes(
     const std::vector< uint8_t >&                   i_bad_lanes)
 {
     const uint8_t GRP0 = 0;
-    FAPI_DBG("rx_pdwn_lanes: Enter Size(%d)", i_bad_lanes.size());
+    FAPI_IMP("rx_pdwn_lanes: Enter Size(%d)", i_bad_lanes.size());
     char target_string[fapi2::MAX_ECMD_STRING_LEN];
     fapi2::toString(i_target, target_string, fapi2::MAX_ECMD_STRING_LEN);
 
@@ -131,11 +131,13 @@ fapi2::ReturnCode rx_pdwn_lanes(
                      GRP0,
                      i_bad_lanes[index]);
 
-            FAPI_TRY(io::rmw(EDIP_RX_LANE_DIG_PDWN, i_target, GRP0, i_bad_lanes[index], 1),
-                     "Failed rmw rx dig pdwn reg");
+            FAPI_TRY(io::rmw(EDI_RX_LANE_PDWN, i_target, GRP0, i_bad_lanes[index], 1),
+                     "Failed rmw rx pdwn reg");
+
+            // Set rx_wt_lane_disabled for this lane; see SW244284, SW280992
+            FAPI_TRY(io::rmw(EDI_RX_WT_LANE_DISABLED, i_target, GRP0, i_bad_lanes[index], 1),
+                     "Failed rmw rx wt lane disabled reg");
 
-            FAPI_TRY(io::rmw(EDIP_RX_LANE_ANA_PDWN, i_target, GRP0, i_bad_lanes[index], 1),
-                     "Failed rmw rx ana pdwn reg");
 
         }
     }
@@ -170,15 +172,15 @@ fapi2::ReturnCode tx_pdwn_lanes(
 
     if(!i_bad_lanes.empty())
     {
-        FAPI_TRY(io::read(EDIP_TX_MSBSWAP, i_target, GRP0, LN0, l_data),
-                 "Failed read edip_tx_msbswap");
-        l_msbswap = io::get(EDIP_TX_MSBSWAP, l_data);
+        FAPI_TRY(io::read(EDI_TX_MSBSWAP, i_target, GRP0, LN0, l_data),
+                 "Failed read edi_tx_msbswap");
+        l_msbswap = io::get(EDI_TX_MSBSWAP, l_data);
 
         if(l_msbswap == 0x1)
         {
-            FAPI_TRY(io::read(EDIP_TX_END_LANE_ID, i_target, GRP0, LN0, l_data));
-            l_end_lane = io::get(EDIP_TX_END_LANE_ID, l_data);
-            FAPI_DBG("edip_tx_msbswap: tx_end_lane_id(%d).", l_end_lane);
+            FAPI_TRY(io::read(EDI_TX_END_LANE_ID, i_target, GRP0, LN0, l_data));
+            l_end_lane = io::get(EDI_TX_END_LANE_ID, l_data);
+            FAPI_DBG("edi_tx_msbswap: tx_end_lane_id(%d).", l_end_lane);
         }
 
         for(uint8_t index = 0; index < i_bad_lanes.size(); ++index)
@@ -188,7 +190,7 @@ fapi2::ReturnCode tx_pdwn_lanes(
             if(l_msbswap == 0x1)
             {
                 l_lane = l_end_lane - i_bad_lanes[index];
-                FAPI_DBG("edip_tx_msbswap: tx_end_lane_id(%d) lane(%d -> %d).",
+                FAPI_DBG("edi_tx_msbswap: tx_end_lane_id(%d) lane(%d -> %d).",
                          l_end_lane, i_bad_lanes[index], l_lane);
             }
 
@@ -199,7 +201,7 @@ fapi2::ReturnCode tx_pdwn_lanes(
                      GRP0,
                      l_lane);
 
-            FAPI_TRY(io::rmw(EDIP_TX_LANE_PDWN, i_target, GRP0, l_lane, 1));
+            FAPI_TRY(io::rmw(EDI_TX_LANE_PDWN, i_target, GRP0, l_lane, 1));
 
         }
     }
diff --git a/src/import/chips/centaur/procedures/hwp/io/p9_io_cen_read_erepair.C b/src/import/chips/centaur/procedures/hwp/io/p9_io_cen_read_erepair.C
index 6c5f2f5f8..c23a16b3c 100644
--- a/src/import/chips/centaur/procedures/hwp/io/p9_io_cen_read_erepair.C
+++ b/src/import/chips/centaur/procedures/hwp/io/p9_io_cen_read_erepair.C
@@ -83,26 +83,25 @@ fapi2::ReturnCode p9_io_cen_read_erepair(
 
     o_bad_lanes.clear();
 
-    // TODO CHANGE TO EDI REGISTERS
-    FAPI_TRY(io::read(EDIP_RX_GLBSM_STAT9_E_PG, i_target, GRP0, LN0, l_data),
+    FAPI_TRY(io::read(EDI_RX_BAD_LANE_ENC_GCRMSG_PG, i_target, GRP0, LN0, l_data),
              "Reading Bad Lane Code Failed.");
 
-    FAPI_DBG("Bad Lane Code: %d", io::get(EDIP_RX_BAD_LANE_CODE, l_data));
+    FAPI_DBG("Bad Lane Code: %d", io::get(EDI_RX_BAD_LANE_CODE_GCRMSG, l_data));
 
-    switch(io::get(EDIP_RX_BAD_LANE_CODE, l_data))
+    switch(io::get(EDI_RX_BAD_LANE_CODE_GCRMSG, l_data))
     {
         case BAD_LANES_3PLUS:
             FAPI_DBG("Bad Lane: Three or more bad lanes found.");
 
         // We will intentionally fall through to collect bad lane 1 & 2.
         case BAD_LANES_2:
-            FAPI_DBG("Bad Lane 2: %d", io::get(EDIP_RX_BAD_LANE2, l_data));
-            o_bad_lanes.push_back((uint8_t)io::get(EDIP_RX_BAD_LANE2, l_data));
+            FAPI_DBG("Bad Lane 2: %d", io::get(EDI_RX_BAD_LANE2_GCRMSG, l_data));
+            o_bad_lanes.push_back((uint8_t)io::get(EDI_RX_BAD_LANE2_GCRMSG, l_data));
 
         // We will intentionally fall through to collect bad lane 1.
         case BAD_LANES_1:
-            FAPI_DBG("Bad Lane 1: %d", io::get(EDIP_RX_BAD_LANE1, l_data));
-            o_bad_lanes.push_back((uint8_t)io::get(EDIP_RX_BAD_LANE1, l_data));
+            FAPI_DBG("Bad Lane 1: %d", io::get(EDI_RX_BAD_LANE1_GCRMSG, l_data));
+            o_bad_lanes.push_back((uint8_t)io::get(EDI_RX_BAD_LANE1_GCRMSG, l_data));
             break;
 
         case BAD_LANES_0:
diff --git a/src/import/chips/centaur/procedures/hwp/io/p9_io_cen_restore_erepair.C b/src/import/chips/centaur/procedures/hwp/io/p9_io_cen_restore_erepair.C
index 07fb738e8..6932cfea3 100644
--- a/src/import/chips/centaur/procedures/hwp/io/p9_io_cen_restore_erepair.C
+++ b/src/import/chips/centaur/procedures/hwp/io/p9_io_cen_restore_erepair.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -136,17 +136,17 @@ fapi2::ReturnCode set_rx_bad_lane_vectors(
         //   to GCR registers only being 16 bits wide.
         if(i_bad_lanes[index] < IO_GCR_REG_WIDTH)
         {
-            FAPI_TRY(io::read(EDIP_RX_LANE_BAD_VEC_0_15, i_target, GRP0, LN0, l_data));
+            FAPI_TRY(io::read(EDI_RX_LANE_BAD_VEC_0_15, i_target, GRP0, LN0, l_data));
             l_data |= (0x8000 >> bad_lane);
-            FAPI_TRY(io::write(EDIP_RX_LANE_BAD_VEC_0_15, i_target, GRP0, LN0, l_data));
+            FAPI_TRY(io::write(EDI_RX_LANE_BAD_VEC_0_15, i_target, GRP0, LN0, l_data));
         }
         else
         {
             bad_lane -= IO_GCR_REG_WIDTH;
 
-            FAPI_TRY(io::read(EDIP_RX_LANE_BAD_VEC_16_23, i_target, GRP0, LN0, l_data));
+            FAPI_TRY(io::read(EDI_RX_LANE_BAD_VEC_16_31, i_target, GRP0, LN0, l_data));
             l_data |= (0x8000 >> bad_lane);
-            FAPI_TRY(io::write(EDIP_RX_LANE_BAD_VEC_16_23, i_target, GRP0, LN0, l_data));
+            FAPI_TRY(io::write(EDI_RX_LANE_BAD_VEC_16_31, i_target, GRP0, LN0, l_data));
         }
 
     }