Adds centaur dynamic VDDR code

Change-Id: Ie6f0471da550f386b3558b274affad02d4f1b673
cmvc-coreq: 1052555
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56593
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Michael D. Pardeik <pardeik@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56667
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>

3 files changed, 87 insertions, 83 deletions

diff --git a/src/import/chips/centaur/procedures/xml/attribute_info/centaur_ec_attributes.xml b/src/import/chips/centaur/procedures/xml/attribute_info/centaur_ec_attributes.xml
index 80656eb1d..d87aae99b 100644
--- a/src/import/chips/centaur/procedures/xml/attribute_info/centaur_ec_attributes.xml
+++ b/src/import/chips/centaur/procedures/xml/attribute_info/centaur_ec_attributes.xml
@@ -489,7 +489,6 @@ The getMBvpdSlopeInterceptData Attribute Accessor, if it does not find a matchin
     </chipEcFeature>
   </attribute>
 
-<!--
   <attribute>
     <id>ATTR_CEN_CENTAUR_EC_FEATURE_DISABLE_VDDR_DYNAMIC_VID</id>
     <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
@@ -506,7 +505,6 @@ The getMBvpdSlopeInterceptData Attribute Accessor, if it does not find a matchin
       </chip>
     </chipEcFeature>
   </attribute>
--->
 
   <!-- ********************************************************************* -->
 
diff --git a/src/import/chips/centaur/procedures/xml/attribute_info/memory_attributes.xml b/src/import/chips/centaur/procedures/xml/attribute_info/memory_attributes.xml
index 012be2b73..5c1ad1fb9 100644
--- a/src/import/chips/centaur/procedures/xml/attribute_info/memory_attributes.xml
+++ b/src/import/chips/centaur/procedures/xml/attribute_info/memory_attributes.xml
@@ -27,8 +27,8 @@
 <!-- @file memory_attributes.xml -->
 <!-- @brief Attribute xml for memory attributes -->
 <!-- -->
-<!-- *HWP HWP Owner: Luke Mulkey <lwmulkey@us.ibm.com> -->
-<!-- *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com> -->
+<!-- *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> -->
+<!-- *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> -->
 <!-- *HWP FW Owner: Bill Hoffa <wghoffa@us.ibm.com> -->
 <!-- *HWP Team: Memory -->
 <!-- *HWP Level: 2 -->
@@ -3147,66 +3147,6 @@ Will be set at an MBA level with one policy to be used</description>
 
 <!--
 <attribute>
-    <id>ATTR_CEN_MSS_AVDD_OFFSET_DISABLE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Used for to determine whether to apply an offset to AVDD. Supplied by MRW.</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 1, ENABLE = 0</enum>
-    <platInit/>
-    <odmVisable/>
-</attribute>
--->
-
-<!--
-<attribute>
-    <id>ATTR_CEN_MSS_VDD_OFFSET_DISABLE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Used for to determine whether to apply an offset to VDD. Supplied by MRW.</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 1, ENABLE = 0</enum>
-    <platInit/>
-    <odmVisable/>
-</attribute>
--->
-
-<!--
-<attribute>
-    <id>ATTR_CEN_MSS_VCS_OFFSET_DISABLE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Used for to determine whether to apply an offset to VCS. Supplied by MRW.</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 1, ENABLE = 0</enum>
-    <platInit/>
-    <odmVisable/>
-</attribute>
--->
-
-<!--
-<attribute>
-    <id>ATTR_CEN_MSS_VPP_OFFSET_DISABLE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Used for to determine whether to apply an offset to VCS. Supplied by MRW.</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 1, ENABLE = 0</enum>
-    <platInit/>
-    <odmVisable/>
-</attribute>
--->
-
-<!--
-<attribute>
-    <id>ATTR_CEN_MSS_VDDR_OFFSET_DISABLE</id>
-    <targetType>TARGET_TYPE_SYSTEM</targetType>
-    <description>Used for to determine whether to apply an offset to VDDR. Supplied by MRW.</description>
-    <valueType>uint8</valueType>
-    <enum>DISABLE = 1, ENABLE = 0</enum>
-    <platInit/>
-    <odmVisable/>
-</attribute>
--->
-
-<!--
-<attribute>
     <id>ATTR_CEN_MSS_AVDD_SLOPE_ACTIVE</id>
     <targetType>TARGET_TYPE_SYSTEM</targetType>
     <description>Slope value used to determine the dynamic VID AVDD adjustment for ACTIVE parts. In uV/Centaur.</description>
@@ -3326,7 +3266,6 @@ Will be set at an MBA level with one policy to be used</description>
 </attribute>
 -->
 
-<!--
 <attribute>
     <id>ATTR_CEN_MSS_DDR3_VDDR_SLOPE</id>
     <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
@@ -3334,10 +3273,9 @@ Will be set at an MBA level with one policy to be used</description>
     <valueType>uint32</valueType>
     <platInit/>
     <odmVisable/>
+    <default>0x000000FA</default>
 </attribute>
--->
 
-<!--
 <attribute>
     <id>ATTR_CEN_MSS_DDR3_VDDR_INTERCEPT</id>
     <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
@@ -3345,10 +3283,9 @@ Will be set at an MBA level with one policy to be used</description>
     <valueType>uint32</valueType>
     <platInit/>
     <odmVisable/>
+    <default>0x00000556</default>
 </attribute>
--->
 
-<!--
 <attribute>
     <id>ATTR_CEN_MSS_DDR4_VDDR_SLOPE</id>
     <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
@@ -3356,10 +3293,9 @@ Will be set at an MBA level with one policy to be used</description>
     <valueType>uint32</valueType>
     <platInit/>
     <odmVisable/>
+    <default>0x000000FA</default>
 </attribute>
--->
 
-<!--
 <attribute>
     <id>ATTR_CEN_MSS_DDR4_VDDR_INTERCEPT</id>
     <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
@@ -3367,8 +3303,8 @@ Will be set at an MBA level with one policy to be used</description>
     <valueType>uint32</valueType>
     <platInit/>
     <odmVisable/>
+    <default>0x000004C4</default>
 </attribute>
--->
 
 <attribute>
     <id>ATTR_CEN_MSS_VOLT_OVERRIDE</id>
@@ -3390,7 +3326,7 @@ Will be set at an MBA level with one policy to be used</description>
     <odmVisable/>
 </attribute>
 
-<!--
+
 <attribute>
     <id>ATTR_CEN_MRW_MCS_PREFETCH_RETRY_THRESHOLD</id>
     <targetType>TARGET_TYPE_SYSTEM</targetType>
@@ -3400,8 +3336,9 @@ Will be set at an MBA level with one policy to be used</description>
     <odmVisable/>
     <odmChangeable/>
 </attribute>
--->
 
+
+<!-- Dynamic voltage attributes below are commented out as they are unneeded for the current code -->
 <!--
 <attribute>
     <id>ATTR_CEN_MSS_AVDD_OFFSET</id>
@@ -3446,7 +3383,6 @@ Will be set at an MBA level with one policy to be used</description>
 </attribute>
 -->
 
-<!--
 <attribute>
     <id>ATTR_CEN_MSS_VDDR_OFFSET</id>
     <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
@@ -3455,7 +3391,6 @@ Will be set at an MBA level with one policy to be used</description>
     <writeable/>
     <odmVisable/>
 </attribute>
--->
 
 <!--
 <attribute>
@@ -3504,7 +3439,6 @@ Will be set at an MBA level with one policy to be used</description>
 </attribute>
 -->
 
-<!--
 <attribute>
     <id>ATTR_CEN_MRW_DDR3_VDDR_MAX_LIMIT</id>
     <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
@@ -3512,10 +3446,9 @@ Will be set at an MBA level with one policy to be used</description>
     <valueType>uint32</valueType>
     <platInit/>
     <odmVisable/>
+    <default>0x00000591</default>
 </attribute>
--->
 
-<!--
 <attribute>
     <id>ATTR_CEN_MRW_DDR4_VDDR_MAX_LIMIT</id>
     <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
@@ -3523,8 +3456,8 @@ Will be set at an MBA level with one policy to be used</description>
     <valueType>uint32</valueType>
     <platInit/>
     <odmVisable/>
+    <default>0x000004f6</default>
 </attribute>
--->
 
 <attribute>
     <id>ATTR_MRW_MEM_SENSOR_CACHE_ADDR_MAP</id>
@@ -3566,4 +3499,5 @@ Will be set at an MBA level with one policy to be used</description>
     <persistRuntime/>
 </attribute>
 -->
+
 </attributes>
diff --git a/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_volt_errors.xml b/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_volt_errors.xml
index 76cfb5643..189bfa36f 100644
--- a/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_volt_errors.xml
+++ b/src/import/chips/centaur/procedures/xml/error_info/p9c_memory_mss_volt_errors.xml
@@ -5,7 +5,7 @@
 <!--                                                                        -->
 <!-- OpenPOWER HostBoot Project                                             -->
 <!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2016,2017                        -->
+<!-- Contributors Listed Below - COPYRIGHT 2016,2018                        -->
 <!-- [+] International Business Machines Corp.                              -->
 <!--                                                                        -->
 <!--                                                                        -->
@@ -27,8 +27,8 @@
 <!-- @file p9c_memory_mss_volt_errors.xml -->
 <!-- @brief Error xml for mss volt errors-->
 <!-- -->
-<!-- *HWP HWP Owner: Luke Mulkey <lwmulkey@us.ibm.com> -->
-<!-- *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com> -->
+<!-- *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> -->
+<!-- *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> -->
 <!-- *HWP FW Owner: Bill Hoffa <wghoffa@us.ibm.com> -->
 <!-- *HWP Team: Memory -->
 <!-- *HWP Level: 1 -->
@@ -117,5 +117,77 @@
     </callout>
   </hwpError>
 
+  <hwpError>
+    <rc>RC_CEN_MSS_VDDR_FUNCTIONAL_DIMM_VPD_READ_ERROR</rc>
+    <description>Unable to read the VPD from a non-functional dimm.</description>
+    <ffdc>DIMM_TARGET</ffdc>
+    <ffdc>MBA_TARGET</ffdc>
+    <callout>
+      <target>MBA_TARGET</target>
+      <priority>HIGH</priority>
+    </callout>
+    <callout>
+      <target>DIMM_TARGET</target>
+      <priority>HIGH</priority>
+    </callout>
+    <deconfigure>
+      <target>MBA_TARGET</target>
+    </deconfigure>
+  </hwpError>
+
+  <hwpError>
+    <rc>RC_CEN_MSS_VOLT_VDDR_OFFSET_DRAM_GEN_MISCOMPARE</rc>
+    <description>One or more DIMMs has a different generation of DRAM technology level.</description>
+    <ffdc>DRAM_GEN_MISCOMPARE</ffdc>
+    <ffdc>DRAM_GEN_START</ffdc>
+    <ffdc>MBA_TARGET</ffdc>
+    <ffdc>DIMM_TARGET</ffdc>
+  </hwpError>
+
+  <hwpError>
+    <rc>RC_CEN_MSS_VOLT_VDDR_FUNCTIONAL_CENTAUR_NOT_FOUND</rc>
+    <description>Code did not find a functional centaur.</description>
+    <ffdc>CEN_TARGET</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
+  </hwpError>
+
+  <hwpError>
+    <rc>RC_CEN_MSS_VOLT_VDDR_DRAM_GEN_NOT_FOUND</rc>
+    <description>Code did not find a DIMM with a readable attribute for DRAM_GEN.</description>
+    <ffdc>CEN_TARGET</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
+  </hwpError>
+
+  <hwpError>
+    <rc>RC_CEN_MSS_VOLT_VDDR_OFFSET_VALUE_ERROR</rc>
+    <ffdc>VDDR_UTIL_ACTIVE</ffdc>
+    <ffdc>VDDR_SLOPE</ffdc>
+    <ffdc>VDDR_INTERCEPT</ffdc>
+    <ffdc>CEN_TARGET</ffdc>
+    <ffdc>VDDR_MAX_LIMIT</ffdc>
+    <description>One or more dynamic VDDR attributes is 0.</description>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
+  </hwpError>
+
+  <hwpError>
+    <rc>RC_CEN_MSS_VOLT_VDDR_OFFSET_VPD_VALUE_ERROR</rc>
+    <description>one or more VPD voltage attributes is 0.</description>
+    <ffdc>VPD_MASTER_POWER_SLOPE</ffdc>
+    <ffdc>VPD_MASTER_POWER_INTERCEPT</ffdc>
+    <ffdc>CEN_TARGET</ffdc>
+    <deconfigure>
+      <target>CEN_TARGET</target>
+    </deconfigure>
+  </hwpError>
+
 </hwpErrors>