Remove patches for instruction start.

    Task 43959

Change-Id: I6990f8c35a17da764c5905a3fd4ebba9183571a3
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1773
Tested-by: Jenkins Server
Reviewed-by: Van H. Lee <vanlee@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

3 files changed, 0 insertions, 141 deletions

diff --git a/src/build/citest/etc/patches/p8_inst.act.patch b/src/build/citest/etc/patches/p8_inst.act.patch
deleted file mode 100644
index 45277789f..000000000
--- a/src/build/citest/etc/patches/p8_inst.act.patch
+++ /dev/null
@@ -1,130 +0,0 @@
---- p8_inst.act.old	2012-08-30 16:03:15.000000000 -0500
-+++ p8_inst.act	2012-08-30 16:09:54.000000000 -0500
-@@ -231,6 +231,7 @@
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013002)] OP=[BIT,OFF] BIT=[50] #RUN=0b0010
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013002)] OP=[BIT,ON]  BIT=[51] #RUN=0b0010
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013002)] OP=[BIT,OFF] BIT=[52] #RUN=0b0010
-+  EFFECT: TARGET=[REG(MYCHIPLET,0x013002)] OP=[BIT,ON]  BIT=[12] #PTC_RAS_STAT_INST_COMP
- }
- 
- CAUSE_EFFECT CHIPLETS ex {
-@@ -244,6 +245,7 @@
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013012)] OP=[BIT,OFF] BIT=[50] #RUN=0b0010
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013012)] OP=[BIT,ON]  BIT=[51] #RUN=0b0010
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013012)] OP=[BIT,OFF] BIT=[52] #RUN=0b0010
-+  EFFECT: TARGET=[REG(MYCHIPLET,0x013012)] OP=[BIT,ON]  BIT=[12] #PTC_RAS_STAT_INST_COMP  
- }
- 
- CAUSE_EFFECT CHIPLETS ex {
-@@ -257,6 +259,7 @@
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013022)] OP=[BIT,OFF] BIT=[50] #RUN=0b0010
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013022)] OP=[BIT,ON]  BIT=[51] #RUN=0b0010
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013022)] OP=[BIT,OFF] BIT=[52] #RUN=0b0010
-+  EFFECT: TARGET=[REG(MYCHIPLET,0x013022)] OP=[BIT,ON]  BIT=[12] #PTC_RAS_STAT_INST_COMP  
- }
- 
- CAUSE_EFFECT CHIPLETS ex {
-@@ -270,6 +273,7 @@
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013032)] OP=[BIT,OFF] BIT=[50] #RUN=0b0010
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013032)] OP=[BIT,ON]  BIT=[51] #RUN=0b0010
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013032)] OP=[BIT,OFF] BIT=[52] #RUN=0b0010
-+  EFFECT: TARGET=[REG(MYCHIPLET,0x013032)] OP=[BIT,ON]  BIT=[12] #PTC_RAS_STAT_INST_COMP
- }
- 
- CAUSE_EFFECT CHIPLETS ex {
-@@ -283,6 +287,7 @@
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013042)] OP=[BIT,OFF] BIT=[50] #RUN=0b0010
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013042)] OP=[BIT,ON]  BIT=[51] #RUN=0b0010
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013042)] OP=[BIT,OFF] BIT=[52] #RUN=0b0010
-+  EFFECT: TARGET=[REG(MYCHIPLET,0x013042)] OP=[BIT,ON]  BIT=[12] #PTC_RAS_STAT_INST_COMP
- }
- 
- CAUSE_EFFECT CHIPLETS ex {
-@@ -296,6 +301,7 @@
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013052)] OP=[BIT,OFF] BIT=[50] #RUN=0b0010
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013052)] OP=[BIT,ON]  BIT=[51] #RUN=0b0010
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013052)] OP=[BIT,OFF] BIT=[52] #RUN=0b0010
-+  EFFECT: TARGET=[REG(MYCHIPLET,0x013052)] OP=[BIT,ON]  BIT=[12] #PTC_RAS_STAT_INST_COMP
- }
- 
- CAUSE_EFFECT CHIPLETS ex {
-@@ -309,6 +315,7 @@
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013062)] OP=[BIT,OFF] BIT=[50] #RUN=0b0010
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013062)] OP=[BIT,ON]  BIT=[51] #RUN=0b0010
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013062)] OP=[BIT,OFF] BIT=[52] #RUN=0b0010
-+  EFFECT: TARGET=[REG(MYCHIPLET,0x013062)] OP=[BIT,ON]  BIT=[12] #PTC_RAS_STAT_INST_COMP  
- }
- 
- CAUSE_EFFECT CHIPLETS ex {
-@@ -322,6 +329,7 @@
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013072)] OP=[BIT,OFF] BIT=[50] #RUN=0b0010
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013072)] OP=[BIT,ON]  BIT=[51] #RUN=0b0010
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013072)] OP=[BIT,OFF] BIT=[52] #RUN=0b0010
-+  EFFECT: TARGET=[REG(MYCHIPLET,0x013072)] OP=[BIT,ON]  BIT=[12] #PTC_RAS_STAT_INST_COMP  
- }
- 
- ##### Active #####
-@@ -508,6 +516,7 @@
-   # maintmode=1, running=0
-   CAUSE: TARGET=[THREADSTATE(MYCHIPLET,0x0)] OP=[EQUALTO,BUF,MASK] DATA=[LITERAL(32,10000000)] MASK=[LITERAL(32,30000000)]
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013002)] OP=[BIT,ON] BIT=[21]  #core_is_in_maintenance_mode
-+  EFFECT: TARGET=[REG(MYCHIPLET,0x013002)] OP=[BIT,OFF] BIT=[12] #PTC_RAS_STAT_INST_COMP
-   ELSE: TARGET=[REG(MYCHIPLET,0x013002)] OP=[BIT,OFF] BIT=[21]  #core_is_in_maintenance_mode
- }
- 
-@@ -518,6 +527,7 @@
-   # maintmode=1, running=0
-   CAUSE: TARGET=[THREADSTATE(MYCHIPLET,0x1)] OP=[EQUALTO,BUF,MASK] DATA=[LITERAL(32,10000000)] MASK=[LITERAL(32,30000000)]
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013012)] OP=[BIT,ON] BIT=[21]  #core_is_in_maintenance_mode
-+  EFFECT: TARGET=[REG(MYCHIPLET,0x013012)] OP=[BIT,OFF] BIT=[12] #PTC_RAS_STAT_INST_COMP    
-   ELSE: TARGET=[REG(MYCHIPLET,0x013012)] OP=[BIT,OFF] BIT=[21]  #core_is_in_maintenance_mode
- }
- 
-@@ -528,6 +538,7 @@
-   # maintmode=1, running=0
-   CAUSE: TARGET=[THREADSTATE(MYCHIPLET,0x2)] OP=[EQUALTO,BUF,MASK] DATA=[LITERAL(32,10000000)] MASK=[LITERAL(32,30000000)]
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013022)] OP=[BIT,ON] BIT=[21]  #core_is_in_maintenance_mode
-+  EFFECT: TARGET=[REG(MYCHIPLET,0x013022)] OP=[BIT,OFF] BIT=[12] #PTC_RAS_STAT_INST_COMP  
-   ELSE: TARGET=[REG(MYCHIPLET,0x013022)] OP=[BIT,OFF] BIT=[21]  #core_is_in_maintenance_mode
- }
- 
-@@ -538,6 +549,7 @@
-   # maintmode=1, running=0
-   CAUSE: TARGET=[THREADSTATE(MYCHIPLET,0x3)] OP=[EQUALTO,BUF,MASK] DATA=[LITERAL(32,10000000)] MASK=[LITERAL(32,30000000)]
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013032)] OP=[BIT,ON] BIT=[21]  #core_is_in_maintenance_mode
-+  EFFECT: TARGET=[REG(MYCHIPLET,0x013032)] OP=[BIT,OFF] BIT=[12] #PTC_RAS_STAT_INST_COMP    
-   ELSE: TARGET=[REG(MYCHIPLET,0x013032)] OP=[BIT,OFF] BIT=[21]  #core_is_in_maintenance_mode
- }
- 
-@@ -548,6 +560,7 @@
-   # maintmode=1, running=0
-   CAUSE: TARGET=[THREADSTATE(MYCHIPLET,0x4)] OP=[EQUALTO,BUF,MASK] DATA=[LITERAL(32,10000000)] MASK=[LITERAL(32,30000000)]
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013042)] OP=[BIT,ON] BIT=[21]  #core_is_in_maintenance_mode
-+  EFFECT: TARGET=[REG(MYCHIPLET,0x013042)] OP=[BIT,OFF] BIT=[12] #PTC_RAS_STAT_INST_COMP    
-   ELSE: TARGET=[REG(MYCHIPLET,0x013042)] OP=[BIT,OFF] BIT=[21]  #core_is_in_maintenance_mode
- }
- 
-@@ -558,6 +571,7 @@
-   # maintmode=1, running=0
-   CAUSE: TARGET=[THREADSTATE(MYCHIPLET,0x5)] OP=[EQUALTO,BUF,MASK] DATA=[LITERAL(32,10000000)] MASK=[LITERAL(32,30000000)]
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013052)] OP=[BIT,ON] BIT=[21]  #core_is_in_maintenance_mode
-+  EFFECT: TARGET=[REG(MYCHIPLET,0x013052)] OP=[BIT,OFF] BIT=[12] #PTC_RAS_STAT_INST_COMP    
-   ELSE: TARGET=[REG(MYCHIPLET,0x013052)] OP=[BIT,OFF] BIT=[21]  #core_is_in_maintenance_mode
- }
- 
-@@ -568,6 +582,7 @@
-   # maintmode=1, running=0
-   CAUSE: TARGET=[THREADSTATE(MYCHIPLET,0x6)] OP=[EQUALTO,BUF,MASK] DATA=[LITERAL(32,10000000)] MASK=[LITERAL(32,30000000)]
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013062)] OP=[BIT,ON] BIT=[21]  #core_is_in_maintenance_mode
-+  EFFECT: TARGET=[REG(MYCHIPLET,0x013062)] OP=[BIT,OFF] BIT=[12] #PTC_RAS_STAT_INST_COMP    
-   ELSE: TARGET=[REG(MYCHIPLET,0x013062)] OP=[BIT,OFF] BIT=[21]  #core_is_in_maintenance_mode
- }
- 
-@@ -578,6 +593,7 @@
-   # maintmode=1, running=0
-   CAUSE: TARGET=[THREADSTATE(MYCHIPLET,0x7)] OP=[EQUALTO,BUF,MASK] DATA=[LITERAL(32,10000000)] MASK=[LITERAL(32,30000000)]
-   EFFECT: TARGET=[REG(MYCHIPLET,0x013072)] OP=[BIT,ON] BIT=[21]  #core_is_in_maintenance_mode
-+  EFFECT: TARGET=[REG(MYCHIPLET,0x013072)] OP=[BIT,OFF] BIT=[12] #PTC_RAS_STAT_INST_COMP  
-   ELSE: TARGET=[REG(MYCHIPLET,0x013072)] OP=[BIT,OFF] BIT=[21]  #core_is_in_maintenance_mode
- }
- 
diff --git a/src/build/citest/etc/patches/patchlist.txt b/src/build/citest/etc/patches/patchlist.txt
index b16f1ec2f..e0cbde4d1 100644
--- a/src/build/citest/etc/patches/patchlist.txt
+++ b/src/build/citest/etc/patches/patchlist.txt
@@ -5,8 +5,3 @@ Brief description of the problem or reason for patch
 -Files: list of files		
 -Coreq: list of associated changes, e.g. workarounds.presimsetup
 
-New actions for real proc_thread_control
--RTC: Task 43959 will remove the patches
--CMVC: D851143 is integrating the changes
--Files: p8_inst.act.patch
--Coreq: there are related changes in workarounds.postsimsetup
diff --git a/src/build/citest/etc/workarounds.postsimsetup b/src/build/citest/etc/workarounds.postsimsetup
index 0fd3b3d67..5a07ef344 100755
--- a/src/build/citest/etc/workarounds.postsimsetup
+++ b/src/build/citest/etc/workarounds.postsimsetup
@@ -26,9 +26,3 @@
 ##    to setup the sandbox
 ##
 
-### Updates to handle instruction states (Remove with RTC:43959)
-echo "+++ Update cec-chip files for inst-start fix."
-mkdir -p $sb/simu/data/cec-chip/
-cp $bb/src/simu/data/cec-chip/p8_inst.act $sb/simu/data/cec-chip/p8_inst.act
-patch -p0 $sb/simu/data/cec-chip/p8_inst.act $HOSTBOOTROOT/src/build/citest/etc/patches/p8_inst.act.patch
-###