diff options
| author | Mike Baiocchi <baiocchi@us.ibm.com> | 2013-06-11 14:30:01 -0500 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2013-07-08 10:38:26 -0500 |
| commit | 32526fcbef7d67fbb3d6ab23fc60181b834ed21d (patch) | |
| tree | 72b5305fae334b9579e9f1a7d899fe8752bb9e1c /src/build | |
| parent | e60a4810ddce203fd6a2cb5c3a3f1483fa18d6c4 (diff) | |
| download | talos-hostboot-32526fcbef7d67fbb3d6ab23fc60181b834ed21d.tar.gz talos-hostboot-32526fcbef7d67fbb3d6ab23fc60181b834ed21d.zip | |
Base Support for Secure ROM verification
This change adds the basic structure needed to call and
implement a verifcation of a signed container via the
loaded/initliaized Secure ROM device.
Change-Id: Ieada4eb0b557fc556cd12647a698bbfa16aba278
RTC:64764
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4958
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/build')
| -rw-r--r-- | src/build/citest/etc/bbuild | 2 | ||||
| -rw-r--r-- | src/build/citest/etc/patches/p8_master.por | 2 | ||||
| -rw-r--r-- | src/build/citest/etc/patches/patchlist.txt | 11 | ||||
| -rwxr-xr-x | src/build/citest/etc/workarounds.postsimsetup | 20 |
4 files changed, 34 insertions, 1 deletions
diff --git a/src/build/citest/etc/bbuild b/src/build/citest/etc/bbuild index 64438aa26..f63192b1a 100644 --- a/src/build/citest/etc/bbuild +++ b/src/build/citest/etc/bbuild @@ -1 +1 @@ -/esw/fips810/Builds/b0605a_1323.810 +/esw/fips810/Builds/b0617a_1325.810 diff --git a/src/build/citest/etc/patches/p8_master.por b/src/build/citest/etc/patches/p8_master.por new file mode 100644 index 000000000..8fae70244 --- /dev/null +++ b/src/build/citest/etc/patches/p8_master.por @@ -0,0 +1,2 @@ +# Set Secure ROM address in TBROM_BASE_REG scom register +REG(0x02020017)=0x0003FFFF C0000000 #TBROM_BASE_REG Scom Register diff --git a/src/build/citest/etc/patches/patchlist.txt b/src/build/citest/etc/patches/patchlist.txt index c605c55de..538335cb5 100644 --- a/src/build/citest/etc/patches/patchlist.txt +++ b/src/build/citest/etc/patches/patchlist.txt @@ -19,3 +19,14 @@ Add action for L3 purge register. -CMVC: 876083 -Files: p8_ex_l3purge.act -Coreq: None + +Add POR setting for TBROM scom register +-RTC: 72729 +-CMVC: 885548, 885681, 886545, 887736 +-Files + src/build/citest/etc/workarounds.postsimsetup + src/build/citest/etc/patches/patchlist.txt + src/build/citest/etc/patches/p8_master.por + Indirectly: p8_slave.por, s1_master.por, s1_slave.por +-Coreq: None + diff --git a/src/build/citest/etc/workarounds.postsimsetup b/src/build/citest/etc/workarounds.postsimsetup index 54a80b8a5..191f06aed 100755 --- a/src/build/citest/etc/workarounds.postsimsetup +++ b/src/build/citest/etc/workarounds.postsimsetup @@ -40,3 +40,23 @@ cat $HOSTBOOTROOT/src/build/citest/etc/patches/p8_ex_l3purge.act >> \ $sb/simu/data/cec-chip/p8_ex.act cat $HOSTBOOTROOT/src/build/citest/etc/patches/p8_ex_l3purge.act >> \ $sb/simu/data/cec-chip/s1_ex.act + + +echo "+++ Updating POR files for Secure ROM Support (removed with RTC 72729)" +mkdir -p $sb/simu/data/cec-chip/ +grep -v 0x02020017 $BACKING_BUILD/src/simu/data/cec-chip/p8_master.por > \ + $sb/simu/data/cec-chip/p8_master.por +grep -v 0x02020017 $BACKING_BUILD/src/simu/data/cec-chip/p8_slave.por > \ + $sb/simu/data/cec-chip/p8_slave.por +grep -v 0x02020017 $BACKING_BUILD/src/simu/data/cec-chip/s1_master.por > \ + $sb/simu/data/cec-chip/s1_master.por +grep -v 0x02020017 $BACKING_BUILD/src/simu/data/cec-chip/s1_slave.por > \ + $sb/simu/data/cec-chip/s1_slave.por +cat $HOSTBOOTROOT/src/build/citest/etc/patches/p8_master.por >> \ + $sb/simu/data/cec-chip/p8_master.por +cat $HOSTBOOTROOT/src/build/citest/etc/patches/p8_master.por >> \ + $sb/simu/data/cec-chip/p8_slave.por +cat $HOSTBOOTROOT/src/build/citest/etc/patches/p8_master.por >> \ + $sb/simu/data/cec-chip/s1_master.por +cat $HOSTBOOTROOT/src/build/citest/etc/patches/p8_master.por >> \ + $sb/simu/data/cec-chip/s1_slave.por |
