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author | Christian Geddes <crgeddes@us.ibm.com> | 2019-08-26 15:58:17 -0500 |
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committer | Daniel M Crowell <dcrowell@us.ibm.com> | 2019-09-11 10:52:05 -0500 |
commit | bafe5de9d8b538d978d9955386b5f1fd0ae1d82b (patch) | |
tree | 958349eb32e7451d9395ecb45db38ed5bc77e624 /src/build/tools/build-cppcheck | |
parent | 8e9808de50f0115153b3b49703a159f9a915fb10 (diff) | |
download | talos-hostboot-bafe5de9d8b538d978d9955386b5f1fd0ae1d82b.tar.gz talos-hostboot-bafe5de9d8b538d978d9955386b5f1fd0ae1d82b.zip |
Account for Explorer's DMB_REVISION format in its SPD
We have been told that the field we are reading to figure out the
EC level of the OCMB via its SPD (offset 0x200) is going to say
0xA0 for the first version of the card, at IBM we would call this
EC 0x10. The Explorer manufacture has stated that they will increment
the 1st nibble when they do match card revisions, and the 2nd nibble
on minor revisions. This commit adds the logic to convert the
manufacture's revision format into IBM's EC level format. It also
updates the prebuilt cache we use in simics for axone to have the
expected 0xA0 value for the explorer SPD stored in the prebuilt cache
Change-Id: I10e9523a8fbea847e3124c256fab7bee850cb29d
RTC: 214627
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82873
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/build/tools/build-cppcheck')
0 files changed, 0 insertions, 0 deletions