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| author | Dan Crowell <dcrowell@us.ibm.com> | 2016-11-04 10:32:12 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-12-13 16:56:09 -0500 |
| commit | b4e35e636bedf9f8785a49708ffe5d68aed97971 (patch) | |
| tree | 71fb8d2e5cb67fac9b06035a0f6ba7d391e6941e /src/build/debug | |
| parent | ae79b20d3d72c1f54191696756430d3412445817 (diff) | |
| download | talos-hostboot-b4e35e636bedf9f8785a49708ffe5d68aed97971.tar.gz talos-hostboot-b4e35e636bedf9f8785a49708ffe5d68aed97971.zip | |
Fix simics continuous trace to handle non-zero HRMOR
Changes needed to boot from a HRMOR that is not part of the
lowest memory range that we define. For example, booting from
proc1 that starts at 4TB.
Change-Id: I6625b3b34830ac9f85b1eae8be52499ffd1eb432
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32258
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/build/debug')
| -rwxr-xr-x | src/build/debug/simics-debug-framework.py | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/src/build/debug/simics-debug-framework.py b/src/build/debug/simics-debug-framework.py index 6d1c6f834..49b75fee6 100755 --- a/src/build/debug/simics-debug-framework.py +++ b/src/build/debug/simics-debug-framework.py @@ -591,10 +591,13 @@ def magic_instruction_callback(user_arg, cpu, arg): if arg == 7055: # MAGIC_CONTINUOUS_TRACE hb_tracBinaryBuffer = cpu.r4 hb_tracBinaryBufferSz = cpu.r5 - per_node = 0x200000000000 + per_node = 0x200000000000 #32TB + per_chip = 0x40000000000 #4TB hb_hrmor = cpu.hrmor node_num = hb_hrmor//per_node + chip_num = hb_hrmor//per_chip mem_object = None + #print ">> hrmor=%X" % hb_hrmor # Find the entry in the memory map that includes our # base memory region. Can't assume object is "ram" @@ -603,7 +606,7 @@ def magic_instruction_callback(user_arg, cpu, arg): for entry in mem_map_entries: # 0=base, 1=name, 5=mirrored target, 6=priority #print ">> %d:%s" % (entry[0], entry[1]) - if (entry[0] == (node_num*per_node)) or (entry[0] == hb_hrmor): + if (entry[0] == hb_hrmor) or ((entry[0] >= (chip_num*per_chip)) and (entry[0] <= ((chip_num+1)*per_chip))): target = entry[5] priority = entry[6] # Check if there is a target that needs to be investigated that @@ -620,6 +623,7 @@ def magic_instruction_callback(user_arg, cpu, arg): break elif priority < low_priority: mem_object = simics.SIM_object_name(entry[1]) + base_addr = entry[0] #print "Found entry %s for hrmor %d" % (mem_object, hb_hrmor) #break @@ -631,7 +635,7 @@ def magic_instruction_callback(user_arg, cpu, arg): # Figure out if we are running out of the cache or mainstore # Add the HRMOR if we're running from memory if 'cache' not in mem_object: - hb_tracBinaryBuffer = hb_tracBinaryBuffer + hb_hrmor - per_node*node_num + hb_tracBinaryBuffer = hb_tracBinaryBuffer + hb_hrmor - per_node*node_num - base_addr tracbin = ["hbTracBINARY","hbTracBINARY1","hbTracBINARY2","hbTracBINARY3"] tracmerg = ["hbTracMERG","hbTracMERG1","hbTracMERG2","hbTracMERG3"] @@ -656,6 +660,7 @@ def magic_instruction_callback(user_arg, cpu, arg): cmd3 = "(get-master-proc %d).proc_fsi2host_mbox->regs[95][1] = 0"%(node_num) saveCommand = "%s; %s; %s"%(cmd1,cmd2,cmd3) + #print "Command=%s" % (saveCommand) SIM_run_alone(run_command, saveCommand ) @@ -686,3 +691,4 @@ SIM_hap_add_callback_range( "Core_Magic_Instruction", magic_instruction_callback # Run the registration automatically whenever this script is loaded. register_hb_debug_framework_tools() + |

