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authorDan Crowell <dcrowell@us.ibm.com>2012-02-07 09:49:21 -0600
committerDaniel M. Crowell <dcrowell@us.ibm.com>2012-02-28 13:06:28 -0600
commitca733abd8cc5ff4e05e1bf958239c9b06710632c (patch)
tree34c3f527282e31cf3b9ba8bc46648a4f84762dad /src/build/citest
parentdf05b815a80fc2475aa0396ae140903beaa9dde1 (diff)
downloadtalos-hostboot-ca733abd8cc5ff4e05e1bf958239c9b06710632c.tar.gz
talos-hostboot-ca733abd8cc5ff4e05e1bf958239c9b06710632c.zip
RTC Story 36901 - Use LPC Memory
This includes a hack to allow access to our fake PNOR data via the ECCB scom registers. This hack will be removed once Simics provides a real ECCB model. Changes to INTR testcase were needed due to bugs exposed by the timing changes when enabling this new code. Note that the default operating mode will remain LPC_MEM because the current version of the ECCB model causes the IPL to take close to 10 minutes to complete. Change-Id: Icc236bffd52ba8214ec920f9a496adec138e54d9 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/692 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/build/citest')
-rw-r--r--src/build/citest/etc/patches/p8_pnor.act45
-rw-r--r--src/build/citest/etc/patches/patchlist.txt7
-rwxr-xr-xsrc/build/citest/etc/workarounds.presimsetup29
3 files changed, 69 insertions, 12 deletions
diff --git a/src/build/citest/etc/patches/p8_pnor.act b/src/build/citest/etc/patches/p8_pnor.act
new file mode 100644
index 000000000..86d7b040b
--- /dev/null
+++ b/src/build/citest/etc/patches/p8_pnor.act
@@ -0,0 +1,45 @@
+#####
+# LPC Actions through ECCB
+
+# Catch LPC Read to flash
+CAUSE_EFFECT {
+ LABEL=[LPC Read]
+ WATCH=[REG(0x000B0020)] #ECCB Control Reg (FW)
+ # look for a read command
+ CAUSE: TARGET=[REG(0x000B0020)] OP=[EQUALTO,BUF,MASK] DATA=[LITERAL(64,D4010100 F0000000)] MASK=[LITERAL(64,FFFFFFFF F0000000)]
+ # push the address into a dummy reg
+ EFFECT: TARGET=[REG(0xDDDD0000)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x000B0020)] MASK=[LITERAL(64,00000000 0FFFFFFF)]
+ # move the address into our PNOR space (5 MB)
+ EFFECT: TARGET=[REG(0xDDDD0000)] OP=[INCREMENT,MASK] INCVAL=[5242880] MASK=[LITERAL(64,00000000 FFFFFFFF)]
+ # write the data from mainstore into another dummy reg
+ EFFECT: TARGET=[MODULE(readMainstore, 0xDDDD0000)] OP=[MODULECALL] DATA=[REG(0xDDDD0001)]
+ # Copy 32-bits into the ECCB Data Reg (FW)
+ EFFECT: TARGET=[REG(0x000B0023)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0xDDDD0001)] MASK=[LITERAL(64,FFFFFFFF 00000000)]
+ # Copy the data into the ECCB Status Reg (FW) bits 6:37
+ EFFECT: TARGET=[REG(0x000B0022)] OP=[EQUALTO,BUF,MASK,SHIFT] DATA=[REG(0xDDDD0001)] MASK=[LITERAL(64,03FFFFFF FC000000)] SHIFT=[6]
+ #ECCB Status Reg (FW) done bit
+ EFFECT: TARGET=[REG(0x000B0022)] OP=[BIT,ON] BIT=[52]
+}
+
+
+# Catch LPC Write to flash
+CAUSE_EFFECT {
+ LABEL=[LPC Write]
+ WATCH=[REG(0x000B0020)] #ECCB Control Reg (FW)
+ # look for a read command
+ CAUSE: TARGET=[REG(0x000B0020)] OP=[EQUALTO,BUF,MASK] DATA=[LITERAL(64,D4000100 F0000000)] MASK=[LITERAL(64,FFFFFFFF F0000000)]
+ # push the address into a dummy reg
+ EFFECT: TARGET=[REG(0xDDDD0000)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x000B0020)] MASK=[LITERAL(64,00000000 0FFFFFFF)]
+ # move the address into our PNOR space (5 MB)
+ EFFECT: TARGET=[REG(0xDDDD0000)] OP=[INCREMENT,MASK] INCVAL=[5242880] MASK=[LITERAL(64,00000000 FFFFFFFF)]
+ # copy the data from mainstore into the dummy reg since it reads 64-bits but we only write 32
+ EFFECT: TARGET=[MODULE(readMainstore, 0xDDDD0000)] OP=[MODULECALL] DATA=[REG(0xDDDD0001)]
+ # Copy 32-bits from the ECCB Data Reg (FW) into a dummy reg
+ EFFECT: TARGET=[REG(0xDDDD0001)] OP=[EQUALTO,BUF,MASK] DATA=[REG(0x000B0023)] MASK=[LITERAL(64,FFFFFFFF 00000000)]
+ # write the data from the dummy reg into mainstore
+ EFFECT: TARGET=[MODULE(writeMainstore, 0xDDDD0000)] OP=[MODULECALL] DATA=[REG(0xDDDD0001)]
+ #ECCB Status Reg (FW) done bit
+ EFFECT: TARGET=[REG(0x000B0022)] OP=[BIT,ON] BIT=[52]
+}
+
+
diff --git a/src/build/citest/etc/patches/patchlist.txt b/src/build/citest/etc/patches/patchlist.txt
new file mode 100644
index 000000000..4ad66ac3f
--- /dev/null
+++ b/src/build/citest/etc/patches/patchlist.txt
@@ -0,0 +1,7 @@
+Enable ECCB-based LPC/PNOR access (temporary)
+-RTC: Story 37972 will be used to remove the patches
+-CQ: No fips defect because these changes are not permanent
+-Files: p8_pnor.act
+-Coreq: associated changes are also in workarounds.presimsetup
+
+
diff --git a/src/build/citest/etc/workarounds.presimsetup b/src/build/citest/etc/workarounds.presimsetup
index 21c704c8f..b7653947e 100755
--- a/src/build/citest/etc/workarounds.presimsetup
+++ b/src/build/citest/etc/workarounds.presimsetup
@@ -43,24 +43,29 @@ sed -i -e's/SETENV GFW_P8_VENICE_L3_MB_SIZE.*/SETENV GFW_P8_VENICE_L3_MB_SIZE 8/
#Note: Leave this here as an example
-#echo "+++ Update to new simics build."
+#echo "+++ Update to new simics build for ECCB support."
#mkdir -p $sb/simu/data
#egrep -v "WSALIAS HOSTBOOT_LEVEL FIPSLEVEL|WSALIAS HOSTBOOT_LEVEL SIMICSLEVEL" $BACKING_BUILD/src/simu/data/simicsInfo > $sb/simu/data/simicsInfo
-#echo "WSALIAS HOSTBOOT_LEVEL FIPSLEVEL env/gfwa/simics-4.2.0/simics-4.2.82/fips/fld36/fi111110b700.42" >> $sb/simu/data/simicsInfo
-#echo "WSALIAS HOSTBOOT_LEVEL SIMICSLEVEL env/vtechb/simics-4.2.0/simics-4.2.82/bin" >> $sb/simu/data/simicsInfo
+#echo "WSALIAS HOSTBOOT_LEVEL FIPSLEVEL env/gfwb/simics-4.2.0/simics-4.2.83/fips/fld36/fi120201a700.42" >> $sb/simu/data/simicsInfo
+#echo "WSALIAS HOSTBOOT_LEVEL SIMICSLEVEL env/vtechb/simics-4.2.0/simics-4.2.83/bin" >> $sb/simu/data/simicsInfo
-echo "+++ Add some logic regs for Simics workaround."
+echo "+++ Add some scom regs and actions for ECCB fakeout."
mkdir -p $sb/simu/data/cec-chip/
-cp --update $BACKING_BUILD/src/simu/data/cec-chip/centaur.chip $sb/simu/data/cec-chip/centaur.chip.orig
-grep -v DONE $sb/simu/data/cec-chip/centaur.chip.orig > $sb/simu/data/cec-chip/centaur.chip
-echo "INTERNALREGS # List all scom registers" >> $sb/simu/data/cec-chip/centaur.chip
-echo " 0xFF00000F, 64 # Simics workaround" >> $sb/simu/data/cec-chip/centaur.chip
-echo "END" >> $sb/simu/data/cec-chip/centaur.chip
-echo "DONE" >> $sb/simu/data/cec-chip/centaur.chip
+cp --update $BACKING_BUILD/src/simu/data/cec-chip/p8.chip $sb/simu/data/cec-chip/p8.chip.orig
+grep -v DONE $sb/simu/data/cec-chip/p8.chip.orig > $sb/simu/data/cec-chip/p8.chip
+echo "ACTIONS=p8_pnor.act #workarounds.presimsetup" >> $sb/simu/data/cec-chip/p8.chip
+echo "SCOMREGS #workarounds.presimsetup" >> $sb/simu/data/cec-chip/p8.chip
+echo " 0xDDDD0000,64 # dummy to hold pnor address" >> $sb/simu/data/cec-chip/p8.chip
+echo " 0xDDDD0001,64 # dummy to hold pnor data" >> $sb/simu/data/cec-chip/p8.chip
+echo "END" >> $sb/simu/data/cec-chip/p8.chip
+echo "DONE" >> $sb/simu/data/cec-chip/p8.chip
+cp $HOSTBOOTROOT/src/build/citest/etc/patches/p8_pnor.act $sb/simu/data/cec-chip/
+#fixme
+
echo "+++ Update to new phyp and mambo level."
mkdir -p $sb/simu/data
cp --update $BACKING_BUILD/src/simu/data/simicsInfo $sb/simu/data/simicsInfo
sed -i -e's/^WSALIAS HOSTBOOT_LEVEL MAMBOLEVEL.*/WSALIAS HOSTBOOT_LEVEL MAMBOLEVEL env\/mamboa\/2011_11_10__4.2/' $sb/simu/data/simicsInfo
-sed -i -e's/^WSALIAS HOSTBOOT_LEVEL PHYPLEVEL.*/WSALIAS HOSTBOOT_LEVEL PHYPLEVEL env\/phypa\/simics-4.2.0\/simics-4.2.82\/ph111111a700.42/' $sb/simu/data/simicsInfo
-sed -i -e's/^WSALIAS HOSTBOOT_LEVEL PHYP_PATCH_LEVEL.*/WSALIAS HOSTBOOT_LEVEL PHYP_PATCH_LEVEL env\/phypa\/simics-4.2.0\/simics-4.2.82\/patches\/ph111111a700.42/' $sb/simu/data/simicsInfo
+sed -i -e's/^WSALIAS HOSTBOOT_LEVEL PHYPLEVEL.*/WSALIAS HOSTBOOT_LEVEL PHYPLEVEL env\/phypa\/simics-4.2.0\/simics-4.2.83\/ph120201a700.42/' $sb/simu/data/simicsInfo
+sed -i -e's/^WSALIAS HOSTBOOT_LEVEL PHYP_PATCH_LEVEL.*/WSALIAS HOSTBOOT_LEVEL PHYP_PATCH_LEVEL env\/phypa\/simics-4.2.0\/simics-4.2.82\/patches\/ph120201a700.42/' $sb/simu/data/simicsInfo
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