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author | Dan Crowell <dcrowell@us.ibm.com> | 2011-11-30 17:12:05 -0600 |
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committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2011-12-01 13:43:45 -0600 |
commit | 4a353d7840f632640e78cafc7052e2e5a99ad564 (patch) | |
tree | cb80b7cb21fc2d8b6779427eaba119b14246dede /src/build/citest | |
parent | 1de45373ef02d33ae6a97c583db3b6d1db9bce1c (diff) | |
download | talos-hostboot-4a353d7840f632640e78cafc7052e2e5a99ad564.tar.gz talos-hostboot-4a353d7840f632640e78cafc7052e2e5a99ad564.zip |
Removed workarounds to update Simics level and moved default
build to b1129a_1149.760. I also fixed up a bug in the scom
testcase that was seen in some configs.
Verified against SALERNO, VENICE and VENICE 2-chip models.
Change-Id: I5c6c71a1c8f782b4d1a9c0f13faa9dc2ded4d911
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/521
Tested-by: Jenkins Server
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/build/citest')
-rw-r--r-- | src/build/citest/etc/bbuild | 2 | ||||
-rwxr-xr-x | src/build/citest/etc/workarounds.presimsetup | 32 |
2 files changed, 9 insertions, 25 deletions
diff --git a/src/build/citest/etc/bbuild b/src/build/citest/etc/bbuild index 040a17205..cb4953f9f 100644 --- a/src/build/citest/etc/bbuild +++ b/src/build/citest/etc/bbuild @@ -1 +1 @@ -/esw/fips760/Builds/b1101a_1147.760 +/esw/fips760/Builds/b1129a_1149.760 diff --git a/src/build/citest/etc/workarounds.presimsetup b/src/build/citest/etc/workarounds.presimsetup index e35dbf2f3..738b83211 100755 --- a/src/build/citest/etc/workarounds.presimsetup +++ b/src/build/citest/etc/workarounds.presimsetup @@ -33,8 +33,6 @@ cp --update $BACKING_BUILD/src/simu/configs/P8_SALERNO.config $sb/simu/configs sed -i -e's/SETENV GFW_P8_SALERNO_L3_MB_SIZE.*/SETENV GFW_P8_SALERNO_L3_MB_SIZE 8/' $sb/simu/configs/P8_SALERNO.config # Backing build already contains 910431. Leave this workaround here for future scomdef files #sed -i -e's/SETENV GFW_P8_SALERNO_MODEL_EC.*/SETENV GFW_P8_SALERNO_MODEL_EC 910431/' $sb/simu/configs/P8_SALERNO.config -echo "SETENV GFW_SIMICS_ENV_TEST_MODE no" >> $sb/simu/configs/P8_SALERNO.config -echo "SETENV GFW_P8_SALERNO_ENABLE_P8_PROC no" >> $sb/simu/configs/P8_SALERNO.config echo "+++ Copy desired VENICE config file to sandbox and modify L3 to 8MB." mkdir -p $sb/simu/configs @@ -42,33 +40,19 @@ cp --update $BACKING_BUILD/src/simu/configs/P8_VENICE.config $sb/simu/configs sed -i -e's/SETENV GFW_P8_VENICE_L3_MB_SIZE.*/SETENV GFW_P8_VENICE_L3_MB_SIZE 8/' $sb/simu/configs/P8_VENICE.config # Backing build already contains 910431. Leave this workaround here for future scomdef files #sed -i -e's/SETENV GFW_P8_VENICE_MODEL_EC.*/SETENV GFW_P8_VENICE_MODEL_EC 910431/' $sb/simu/configs/P8_VENICE.config -echo "SETENV GFW_SIMICS_ENV_TEST_MODE no" >> $sb/simu/configs/P8_VENICE.config -echo "SETENV GFW_P8_VENICE_ENABLE_P8_PROC no" >> $sb/simu/configs/P8_VENICE.config -echo "+++ Update Chip EC levels (SW106529)." -sed -i -e's/SETENV GFW_P8_VENICE_PROC_EC.*/SETENV GFW_P8_VENICE_PROC_EC 10/' $sb/simu/configs/P8_VENICE.config -sed -i -e's/SETENV GFW_P8_VENICE_CENTAUR_EC.*/SETENV GFW_P8_VENICE_CENTAUR_EC 10/' $sb/simu/configs/P8_VENICE.config -sed -i -e's/SETENV GFW_P8_SALERNO_PROC_EC.*/SETENV GFW_P8_SALERNO_PROC_EC 10/' $sb/simu/configs/P8_SALERNO.config +#echo "+++ Update to new simics build." +#mkdir -p $sb/simu/data +#egrep -v "WSALIAS HOSTBOOT_LEVEL FIPSLEVEL|WSALIAS HOSTBOOT_LEVEL SIMICSLEVEL" $BACKING_BUILD/src/simu/data/simicsInfo > $sb/simu/data/simicsInfo +#echo "WSALIAS HOSTBOOT_LEVEL FIPSLEVEL env/gfwa/simics-4.2.0/simics-4.2.82/fips/fld36/fi111110b700.42" >> $sb/simu/data/simicsInfo +#echo "WSALIAS HOSTBOOT_LEVEL SIMICSLEVEL env/vtechb/simics-4.2.0/simics-4.2.82/bin" >> $sb/simu/data/simicsInfo -echo "+++ Add some scom regs to centaur.chip (SW106529)." +echo "+++ Add some logic regs for Simics workaround." mkdir -p $sb/simu/data/cec-chip/ cp --update $BACKING_BUILD/src/simu/data/cec-chip/centaur.chip $sb/simu/data/cec-chip/centaur.chip.orig grep -v DONE $sb/simu/data/cec-chip/centaur.chip.orig > $sb/simu/data/cec-chip/centaur.chip -echo "SCOMREGS # List all scom registers" >> $sb/simu/data/cec-chip/centaur.chip -echo " 0x00012345 #fake register for testing" >> $sb/simu/data/cec-chip/centaur.chip -echo " 0x02011672 #MBU.MBS.MCBISTS01.SCOMFIR.MCBCMA1Q" >> $sb/simu/data/cec-chip/centaur.chip -echo " 0x02011403 #MBU.MBS.MBS_FIR_MASK_REG" >> $sb/simu/data/cec-chip/centaur.chip +echo "INTERNALREGS # List all scom registers" >> $sb/simu/data/cec-chip/centaur.chip +echo " 0xFF00000F, 64 # Simics workaround" >> $sb/simu/data/cec-chip/centaur.chip echo "END" >> $sb/simu/data/cec-chip/centaur.chip echo "DONE" >> $sb/simu/data/cec-chip/centaur.chip - -echo "+++ Update to new simics build." -mkdir -p $sb/simu/data -egrep -v "WSALIAS HOSTBOOT_LEVEL FIPSLEVEL|WSALIAS HOSTBOOT_LEVEL SIMICSLEVEL" $BACKING_BUILD/src/simu/data/simicsInfo > $sb/simu/data/simicsInfo -echo "WSALIAS HOSTBOOT_LEVEL FIPSLEVEL env/gfwa/simics-4.2.0/simics-4.2.82/fips/fld36/fi111110b700.42" >> $sb/simu/data/simicsInfo -echo "WSALIAS HOSTBOOT_LEVEL SIMICSLEVEL env/vtechb/simics-4.2.0/simics-4.2.82/bin" >> $sb/simu/data/simicsInfo - -echo "+++ New simics build (fi111013b700.42) needs some new files." -mkdir -p $sb/simu/data/cec-chip -cp $BACKING_BUILD/src/simu/data/cec-chip/p8.por $sb/simu/data/cec-chip/p8_master.por - |