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| author | Bill Hoffa <wghoffa@us.ibm.com> | 2017-01-07 13:05:18 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-01-10 09:23:25 -0500 |
| commit | d6b88a8338f42b7bde2ccc4c8a798827ac99bf79 (patch) | |
| tree | d131efa65d300722670c4193aa09a3bdc785f655 /src/build/citest/etc/workarounds.postsimsetup | |
| parent | 84e573c5ac3b02a30e8feb41061466fd1788b061 (diff) | |
| download | talos-hostboot-d6b88a8338f42b7bde2ccc4c8a798827ac99bf79.tar.gz talos-hostboot-d6b88a8338f42b7bde2ccc4c8a798827ac99bf79.zip | |
Revert Bbuild file for regression testing
Change-Id: I7d39c809e75285e5c013f7ed3f3420496b2b5048
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34534
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/build/citest/etc/workarounds.postsimsetup')
| -rwxr-xr-x | src/build/citest/etc/workarounds.postsimsetup | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/build/citest/etc/workarounds.postsimsetup b/src/build/citest/etc/workarounds.postsimsetup index 371e19450..f48bdd024 100755 --- a/src/build/citest/etc/workarounds.postsimsetup +++ b/src/build/citest/etc/workarounds.postsimsetup @@ -33,3 +33,11 @@ #mkdir -p $sb/simu/data/cec-chip/ #cp $BACKING_BUILD/src/simu/data/cec-chip/base_cec_chip_file $sb/simu/data/cec-chip #patch -p0 $sb/simu/data/cec-chip/base_cec_chip_file $PROJECT_ROOT/src/build/citest/etc/patches/my_patch_File + +## Need SIMIC action file changes for Ia5b6fb14cdfcb8a04f49846d346ced8e2ba4719e +echo "Applying additional action file changes" +sbex -r fips910 -t 1012603 +echo "+++ Removing L3_0 PURGE REGISTER from p9n.act" +mkdir -p $sb/simu/data/cec-chip/ +cp $BACKING_BUILD/src/simu/data/cec-chip/p9n.act $sb/simu/data/cec-chip +patch -p0 $sb/simu/data/cec-chip/p9n.act $PROJECT_ROOT/src/build/citest/etc/patches/p9n.patch |
