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| author | spashabk-in <shakeebbk@in.ibm.com> | 2017-08-23 09:55:47 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-08-24 10:41:33 -0400 |
| commit | 14dad979f89f3257fd3fcd23c2705d31f896dca3 (patch) | |
| tree | 9707a4abab31b2a27e8201b3038fba49351fd3fe /src/build/citest/etc/workarounds.postsimsetup | |
| parent | 90c6e1f5768f7f18950fbb87a4617a22536629c2 (diff) | |
| download | talos-hostboot-14dad979f89f3257fd3fcd23c2705d31f896dca3.tar.gz talos-hostboot-14dad979f89f3257fd3fcd23c2705d31f896dca3.zip | |
Create and allow for PNOR SBE Partition to have DD1.0, DD2.0 and DD2.1 Images
Include DD2.1 image in SBE pnor partition
Extend pnor layout SBE section size
cmvc-prereq: 1032604
Change-Id: Ic0ac2144e59f5a12b41731f28f96f413110f1948
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45044
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/build/citest/etc/workarounds.postsimsetup')
| -rwxr-xr-x | src/build/citest/etc/workarounds.postsimsetup | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/build/citest/etc/workarounds.postsimsetup b/src/build/citest/etc/workarounds.postsimsetup index 6095b331a..90c2aab35 100755 --- a/src/build/citest/etc/workarounds.postsimsetup +++ b/src/build/citest/etc/workarounds.postsimsetup @@ -33,4 +33,9 @@ #cp $BACKING_BUILD/src/simu/data/cec-chip/base_cec_chip_file $sb/simu/data/cec-chip #patch -p0 $sb/simu/data/cec-chip/base_cec_chip_file $PROJECT_ROOT/src/build/citest/etc/patches/my_patch_File #pull in new actions in p9_memory.act RTC 171066 +#pull in SBE makefile change for DD2.1 +sbex -t 1032604 +cd $sb/sbei/sbfw/ +mk -a && mk install_all +cd - |
