diff options
| author | Dean Sanner <dsanner@us.ibm.com> | 2016-08-17 13:31:10 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-08-29 16:12:45 -0400 |
| commit | 40b68e6b9dd2234498c0dfe636f0bb54726ce644 (patch) | |
| tree | 86e91fadd6fe9afca7ffb1317122969f17649d9f /src/bootloader | |
| parent | 04ce36e292a276f01c3d4ff6f59929d21e29bf32 (diff) | |
| download | talos-hostboot-40b68e6b9dd2234498c0dfe636f0bb54726ce644.tar.gz talos-hostboot-40b68e6b9dd2234498c0dfe636f0bb54726ce644.zip | |
Don't use CI ops to store into L3
Change-Id: I96db8ed45e652388ca1da49c9aa20cf8649b1ab0
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28420
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/bootloader')
| -rw-r--r-- | src/bootloader/bootloader.C | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/bootloader/bootloader.C b/src/bootloader/bootloader.C index 8a129b7f3..1ea288451 100644 --- a/src/bootloader/bootloader.C +++ b/src/bootloader/bootloader.C @@ -213,9 +213,9 @@ namespace Bootloader{ : "r" (l_srcAddr) // input, %1 : ); // no impacts - // Cache-inhibited store byte. - // stbcix BOP1,Ref_G0,BOP2 - asm volatile("stbcix %0,0,%1" + // Store byte. + // stbx BOP1,Ref_G0,BOP2 + asm volatile("stbx %0,0,%1" :: "r" (l_targetGPR) , "r" (l_destAddr)); } else if(i_ld_st_size == WORDSIZE) @@ -227,9 +227,9 @@ namespace Bootloader{ : "r" (l_srcAddr) // input, %1 : ); // no impacts - // Cache-inhibited store word. - // stwcix BOP1,Ref_G0,BOP2 - asm volatile("stwcix %0,0,%1" + // store word. + // stwx BOP1,Ref_G0,BOP2 + asm volatile("stwx %0,0,%1" :: "r" (l_targetGPR) , "r" (l_destAddr)); } else @@ -241,9 +241,9 @@ namespace Bootloader{ : "r" (l_srcAddr) // input, %1 : ); // no impacts - // Cache-inhibited store double word. - // stdcix BOP1,Ref_G0,BOP2 - asm volatile("stdcix %0,0,%1" + // Store double word. + // stdx BOP1,Ref_G0,BOP2 + asm volatile("stdx %0,0,%1" :: "r" (l_targetGPR) , "r" (l_destAddr)); } } |
