Alink Hot Repair Fix

Change-Id: Ie6fc10cefe5084af41a14c5edfd31d4cdc6f591d
CQ: HW446279
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/61067
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Gary A. Peterson <garyp@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/61247
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>

3 files changed, 94 insertions, 33 deletions

diff --git a/src/import/chips/p9/procedures/hwp/io/p9_io_obus_image_build.C b/src/import/chips/p9/procedures/hwp/io/p9_io_obus_image_build.C
index cfc8c7f67..8e385cf66 100644
--- a/src/import/chips/p9/procedures/hwp/io/p9_io_obus_image_build.C
+++ b/src/import/chips/p9/procedures/hwp/io/p9_io_obus_image_build.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -41,7 +41,7 @@
 #include "p9_xip_image.h"
 
 //---------------------------------------------------------------------------
-fapi2::ReturnCode extractPpeImgObus(void* const iImagePtr, uint8_t*& oObusImgPtr, uint32_t& oSize)
+fapi2::ReturnCode extractPpeImgObus(void* const iImagePtr, const int iSectionId, uint8_t*& oObusImgPtr, uint32_t& oSize)
 {
     FAPI_IMP("Entering getObusImageFromHwImage.");
     P9XipSection ppeSection;
@@ -60,7 +60,7 @@ fapi2::ReturnCode extractPpeImgObus(void* const iImagePtr, uint8_t*& oObusImgPtr
     oObusImgPtr = ppeSection.iv_offset + (uint8_t*)(iImagePtr);
 
     // From the I/O Section, lets pull the IOO Nvlink Image.
-    FAPI_TRY(p9_xip_get_section(oObusImgPtr, P9_XIP_SECTION_IOPPE_IOO_NV, &ppeSection));
+    FAPI_TRY(p9_xip_get_section(oObusImgPtr, iSectionId, &ppeSection));
 
     // Point to the IOO PPE Image of the I/O PPE Section
     oObusImgPtr = ppeSection.iv_offset + (uint8_t*)(oObusImgPtr);
@@ -102,41 +102,81 @@ fapi2::ReturnCode p9_io_obus_image_build(CONST_OBUS& iTgt, void* const iHwImageP
     uint64_t data      = 0;
     uint8_t* pObusImg = NULL;
     uint32_t imgSize   = 0;
+    uint8_t configMode = 0;
+    int xipSectionId = 0;
+    bool loadImage = false;
+    fapi2::ATTR_CHIP_EC_FEATURE_HW446279_Type l_ATTR_CHIP_EC_FEATURE_HW446279;
 
-    FAPI_TRY(extractPpeImgObus(iHwImagePtr, pObusImg, imgSize), "Extract PPE Image Failed.");
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_OPTICS_CONFIG_MODE, iTgt, configMode),
+             "Error from FAPI_ATTR_GET(ATTR_OPTICS_CONFIG_MODE)");
 
-    // PPE Reset
-    FAPI_TRY(scomWrite(iTgt, XCR_NONE, HARD_RESET), "Hard Reset Failed.");
-
-    // Set PPE Base Address
-    FAPI_TRY(scomWrite(iTgt, MEM_ARB_CSAR, SRAM_BASE_ADDR), "Set Base Address Failed.");
-
-    // Set PPE into Autoincrement Mode
-    FAPI_TRY(scomWrite(iTgt, MEM_ARB_SCR, AUTOINC_EN), "Auto-Increment Enable Failed.");
+    if(fapi2::ENUM_ATTR_OPTICS_CONFIG_MODE_NV == configMode)
+    {
 
-    for(uint32_t i = 0; i < imgSize; i += 8)
+        FAPI_IMP("NV IMAGE.");
+        xipSectionId = P9_XIP_SECTION_IOPPE_IOO_NV;
+        //
+        // As of now there is no intended use of the nv ppe image.
+        //
+        //loadImage = true;
+    }
+    else if(fapi2::ENUM_ATTR_OPTICS_CONFIG_MODE_SMP == configMode)
     {
-        data = (((uint64_t) * (pObusImg + i + 0) << 56) & 0xFF00000000000000ull) |
-               (((uint64_t) * (pObusImg + i + 1) << 48) & 0x00FF000000000000ull) |
-               (((uint64_t) * (pObusImg + i + 2) << 40) & 0x0000FF0000000000ull) |
-               (((uint64_t) * (pObusImg + i + 3) << 32) & 0x000000FF00000000ull) |
-               (((uint64_t) * (pObusImg + i + 4) << 24) & 0x00000000FF000000ull) |
-               (((uint64_t) * (pObusImg + i + 5) << 16) & 0x0000000000FF0000ull) |
-               (((uint64_t) * (pObusImg + i + 6) <<  8) & 0x000000000000FF00ull) |
-               (((uint64_t) * (pObusImg + i + 7) <<  0) & 0x00000000000000FFull);
-
-        // Write Data, as the address will be autoincremented.
-        FAPI_TRY(scomWrite(iTgt, MEM_ARB_CSDR, data), "Data Write Failed.");
+        FAPI_IMP("ABUS IMAGE.");
+        xipSectionId = P9_XIP_SECTION_IOPPE_IOO_ABUS;
+        auto l_chip = iTgt.getParent<fapi2::TARGET_TYPE_PROC_CHIP>();
+        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW446279, l_chip, l_ATTR_CHIP_EC_FEATURE_HW446279));
+
+        if(l_ATTR_CHIP_EC_FEATURE_HW446279)
+        {
+            FAPI_IMP("ABUS IMAGE LOAD.");
+            loadImage = true;
+        }
     }
+    else // fapi2::ENUM_ATTR_OPTICS_CONFIG_MODE_CAPI
+    {
+        FAPI_IMP("p9_io_obus_image_build:: Skipping I/O Image Load for CAPI interface.");
+    }
+
+    if(loadImage)
+    {
+        FAPI_IMP("LOADING...");
 
-    // Disable Auto Increment
-    FAPI_TRY(scomWrite(iTgt, MEM_ARB_SCR, AUTOINC_DIS), "Auto-Increment Disable Failed.");
+        FAPI_TRY(extractPpeImgObus(iHwImagePtr, xipSectionId, pObusImg, imgSize), "Extract PPE Image Failed.");
 
-    // PPE Reset
-    FAPI_TRY(scomWrite(iTgt, XCR_NONE, HARD_RESET), "Hard Reset Failed.");
+        // PPE Reset
+        FAPI_TRY(scomWrite(iTgt, XCR_NONE, HARD_RESET), "Hard Reset Failed.");
 
-    // PPE Resume From Halt
-    FAPI_TRY(scomWrite(iTgt, XCR_NONE, RESUME_FROM_HALT), "Resume From Halt Failed.");
+        // Set PPE Base Address
+        FAPI_TRY(scomWrite(iTgt, MEM_ARB_CSAR, SRAM_BASE_ADDR), "Set Base Address Failed.");
+
+        // Set PPE into Autoincrement Mode
+        FAPI_TRY(scomWrite(iTgt, MEM_ARB_SCR, AUTOINC_EN), "Auto-Increment Enable Failed.");
+
+        for(uint32_t i = 0; i < imgSize; i += 8)
+        {
+            data = (((uint64_t) * (pObusImg + i + 0) << 56) & 0xFF00000000000000ull) |
+                   (((uint64_t) * (pObusImg + i + 1) << 48) & 0x00FF000000000000ull) |
+                   (((uint64_t) * (pObusImg + i + 2) << 40) & 0x0000FF0000000000ull) |
+                   (((uint64_t) * (pObusImg + i + 3) << 32) & 0x000000FF00000000ull) |
+                   (((uint64_t) * (pObusImg + i + 4) << 24) & 0x00000000FF000000ull) |
+                   (((uint64_t) * (pObusImg + i + 5) << 16) & 0x0000000000FF0000ull) |
+                   (((uint64_t) * (pObusImg + i + 6) <<  8) & 0x000000000000FF00ull) |
+                   (((uint64_t) * (pObusImg + i + 7) <<  0) & 0x00000000000000FFull);
+
+            // Write Data, as the address will be autoincremented.
+            FAPI_TRY(scomWrite(iTgt, MEM_ARB_CSDR, data), "Data Write Failed.");
+        }
+
+        // Disable Auto Increment
+        FAPI_TRY(scomWrite(iTgt, MEM_ARB_SCR, AUTOINC_DIS), "Auto-Increment Disable Failed.");
+
+        // PPE Reset
+        FAPI_TRY(scomWrite(iTgt, XCR_NONE, HARD_RESET), "Hard Reset Failed.");
+
+        // PPE Resume From Halt
+        FAPI_TRY(scomWrite(iTgt, XCR_NONE, RESUME_FROM_HALT), "Resume From Halt Failed.");
+    }
 
 fapi_try_exit:
     FAPI_IMP("Exit p9_io_obus_image_build.");
diff --git a/src/import/chips/p9/procedures/hwp/io/p9_io_xbus_image_build.C b/src/import/chips/p9/procedures/hwp/io/p9_io_xbus_image_build.C
index e5481a2d8..17dce8306 100644
--- a/src/import/chips/p9/procedures/hwp/io/p9_io_xbus_image_build.C
+++ b/src/import/chips/p9/procedures/hwp/io/p9_io_xbus_image_build.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -85,7 +85,9 @@ fapi2::ReturnCode scomWrite(CONST_PROC& iTgt, const uint64_t iAddr, const uint64
 fapi2::ReturnCode p9_io_xbus_image_build(CONST_PROC& iTgt, void* const iHwImagePtr)
 {
     FAPI_IMP("Entering p9_io_xbus_image_build.");
-
+    /*
+     * Currently a NOP as we do not have a POR to use the xbus image.
+     *
     const uint64_t SRAM_BASE_ADDR   = 0xFFFF000000000000ull;
     const uint64_t AUTOINC_EN       = 0x8000000000000000ull;
     const uint64_t AUTOINC_DIS      = 0x0000000000000000ull;
@@ -148,7 +150,8 @@ fapi2::ReturnCode p9_io_xbus_image_build(CONST_PROC& iTgt, void* const iHwImageP
         FAPI_INF("No functional xbus units found. Skipping Xbus PPE Load...");
     }
 
-fapi_try_exit:
+    fapi_try_exit:
+    */
     FAPI_IMP("Exit p9_io_xbus_image_build.");
     return fapi2::current_err;
 }
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
index 8284d42e7..3fec59c66 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
@@ -730,6 +730,24 @@
   </attribute>
   <!-- ********************************************************************* -->
   <attribute>
+    <id>ATTR_CHIP_EC_FEATURE_HW446279</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+      HW446279 SMP Abus Cable Failure
+    </description>
+    <chipEcFeature>
+      <chip>
+        <name>ENUM_ATTR_NAME_CUMULUS</name>
+        <ec>
+          <value>0x13</value>
+          <test>LESS_THAN</test>
+        </ec>
+      </chip>
+    </chipEcFeature>
+  </attribute>
+
+  <!-- ********************************************************************* -->
+  <attribute>
     <id>ATTR_CHIP_EC_FEATURE_HW430944</id>
     <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
     <description>