Add eff_config functionality needed for RIT, fix cas_latency bug & attr files

Change-Id: I508ea4b156ff26ff7c652e28510a535b90030434
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23796
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Tested-by: Hostboot CI
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23799
Tested-by: FSP CI Jenkins
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

22 files changed, 3850 insertions, 2371 deletions

diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/mrs_load_ddr4.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/mrs_load_ddr4.C
index 3dbda3a3c..53f508fd8 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/mrs_load_ddr4.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/mrs_load_ddr4.C
@@ -87,12 +87,12 @@ static fapi2::ReturnCode ddr4_mrs00(const fapi2::Target<TARGET_TYPE_DIMM>& i_tar
     fapi2::buffer<uint8_t> l_cl;
     fapi2::buffer<uint8_t> l_wr;
 
-    FAPI_TRY( mss::eff_dram_burst_length(i_target, l_burst_length) );
-    FAPI_TRY( mss::eff_dram_read_burst_type(i_target, l_read_burst_type) );
-    FAPI_TRY( mss::eff_dram_cas_latency(i_target, l_cas_latency) );
+    FAPI_TRY( mss::eff_dram_bl(i_target, l_burst_length) );
+    FAPI_TRY( mss::eff_dram_rbt(i_target, l_read_burst_type) );
+    FAPI_TRY( mss::eff_dram_cl(i_target, l_cas_latency) );
     FAPI_TRY( mss::eff_dram_dll_reset(i_target, l_dll_reset) );
     FAPI_TRY( mss::eff_dram_tm(i_target, l_test_mode) );
-    FAPI_TRY( mss::eff_dram_write_recovery(i_target, l_write_recovery) );
+    FAPI_TRY( mss::eff_dram_twr(i_target, l_write_recovery) );
 
     FAPI_DBG("MR0 Attributes: BL: 0x%x, RBT: 0x%x, CL: 0x%x(0x%x), TM: 0x%x, DLL_RESET: 0x%x, WR: 0x%x(0x%x)",
              l_burst_length, l_read_burst_type, l_cas_latency, cl_map[l_cas_latency],
@@ -511,7 +511,7 @@ static fapi2::ReturnCode ddr4_mrs04(const fapi2::Target<TARGET_TYPE_DIMM>& i_tar
     static const uint8_t cs_cmd_latency_map[9] = { 0b000, 0, 0, 0b001, 0b010, 0b011, 0b100, 0, 0b101 };
 
     uint8_t l_max_pd_mode = 0;
-    uint8_t l_temp_ref_range = 0;
+    uint8_t l_temp_refresh_range = 0;
     uint8_t l_temp_ref_mode = 0;
     uint8_t l_vref_mon = 0;
     uint8_t l_cs_cmd_latency = 0;
@@ -524,9 +524,9 @@ static fapi2::ReturnCode ddr4_mrs04(const fapi2::Target<TARGET_TYPE_DIMM>& i_tar
     fapi2::buffer<uint8_t> l_cs_cmd_latency_buffer;
 
     FAPI_TRY( mss::eff_max_powerdown_mode(i_target, l_max_pd_mode) );
-    FAPI_TRY( mss::mrw_temp_ref_range(l_temp_ref_range) );
-    FAPI_TRY( mss::eff_temp_ref_mode(i_target, l_temp_ref_mode) );
-    FAPI_TRY( mss::eff_int_vref_mon(i_target, l_vref_mon) );
+    FAPI_TRY( mss::mrw_temp_refresh_range(l_temp_refresh_range) );
+    FAPI_TRY( mss::eff_temp_refresh_mode(i_target, l_temp_ref_mode) );
+    FAPI_TRY( mss::eff_internal_vref_monitor(i_target, l_vref_mon) );
     FAPI_TRY( mss::eff_cs_cmd_latency(i_target, l_cs_cmd_latency) );
     FAPI_TRY( mss::eff_self_ref_abort(i_target, l_ref_abort) );
     FAPI_TRY( mss::eff_rd_preamble_train(i_target, l_rd_pre_train_mode) );
@@ -536,15 +536,15 @@ static fapi2::ReturnCode ddr4_mrs04(const fapi2::Target<TARGET_TYPE_DIMM>& i_tar
 
     l_cs_cmd_latency_buffer = cs_cmd_latency_map[l_cs_cmd_latency];
 
-    FAPI_INF("MR4 rank %d attributes: MAX_PD: 0x%x, TEMP_REF_RANGE: 0x%x, TEMP_REF_MODE: 0x%x "
+    FAPI_INF("MR4 rank %d attributes: MAX_PD: 0x%x, TEMP_REFRESH_RANGE: 0x%x, TEMP_REF_MODE: 0x%x "
              "VREF_MON: 0x%x, CSL: 0x%x(0x%x), REF_ABORT: 0x%x, RD_PTM: 0x%x, RD_PRE: 0x%x, "
              "WR_PRE: 0x%x, PPR: 0x%x", i_rank,
-             l_max_pd_mode, l_temp_ref_range, l_temp_ref_mode, l_vref_mon,
+             l_max_pd_mode, l_temp_refresh_range, l_temp_ref_mode, l_vref_mon,
              l_cs_cmd_latency, uint8_t(l_cs_cmd_latency_buffer), l_ref_abort,
              l_rd_pre_train_mode, l_rd_preamble, l_wr_preamble, l_ppr);
 
     io_inst.arr0.writeBit<A1>(l_max_pd_mode);
-    io_inst.arr0.writeBit<A2>(l_temp_ref_range);
+    io_inst.arr0.writeBit<A2>(l_temp_refresh_range);
     io_inst.arr0.writeBit<A3>(l_temp_ref_mode);
     io_inst.arr0.writeBit<A4>(l_vref_mon);
 
@@ -570,7 +570,7 @@ static fapi2::ReturnCode ddr4_mrs04_decode(const ccs::instruction_t<TARGET_TYPE_
         const uint64_t i_rank)
 {
     uint8_t l_max_pd_mode = i_inst.arr0.getBit<A1>();
-    uint8_t l_temp_ref_range = i_inst.arr0.getBit<A2>();
+    uint8_t l_temp_refresh_range = i_inst.arr0.getBit<A2>();
     uint8_t l_temp_ref_mode = i_inst.arr0.getBit<A3>();
     uint8_t l_vref_mon = i_inst.arr0.getBit<A4>();
 
@@ -583,10 +583,10 @@ static fapi2::ReturnCode ddr4_mrs04_decode(const ccs::instruction_t<TARGET_TYPE_
     uint8_t l_wr_preamble = i_inst.arr0.getBit<A12>();
     uint8_t l_ppr = i_inst.arr0.getBit<A13>();
 
-    FAPI_INF("MR4 rank %d decode: MAX_PD: 0x%x, TEMP_REF_RANGE: 0x%x, TEMP_REF_MODE: 0x%x "
+    FAPI_INF("MR4 rank %d decode: MAX_PD: 0x%x, TEMP_REFRESH_RANGE: 0x%x, TEMP_REF_MODE: 0x%x "
              "VREF_MON: 0x%x, CSL: 0x%x, REF_ABORT: 0x%x, RD_PTM: 0x%x, RD_PRE: 0x%x, "
              "WR_PRE: 0x%x, PPR: 0x%x", i_rank,
-             l_max_pd_mode, l_temp_ref_range, l_temp_ref_mode, l_vref_mon,
+             l_max_pd_mode, l_temp_refresh_range, l_temp_ref_mode, l_vref_mon,
              uint8_t(l_cs_cmd_latency_buffer), l_ref_abort,
              l_rd_pre_train_mode, l_rd_preamble, l_wr_preamble, l_ppr);
 
@@ -726,9 +726,9 @@ static fapi2::ReturnCode ddr4_mrs06(const fapi2::Target<TARGET_TYPE_DIMM>& i_tar
     fapi2::buffer<uint8_t> l_tccd_l_buffer;
     fapi2::buffer<uint8_t> l_vrefdq_train_value_buffer;
 
-    FAPI_TRY( mss::vref_dq_train_value(i_target, l_vrefdq_train_value) );
-    FAPI_TRY( mss::vref_dq_train_range(i_target, l_vrefdq_train_range) );
-    FAPI_TRY( mss::vref_dq_train_enable(i_target, l_vrefdq_train_enable) );
+    FAPI_TRY( mss::eff_vref_dq_train_value(i_target, l_vrefdq_train_value) );
+    FAPI_TRY( mss::eff_vref_dq_train_range(i_target, l_vrefdq_train_range) );
+    FAPI_TRY( mss::eff_vref_dq_train_enable(i_target, l_vrefdq_train_enable) );
     FAPI_TRY( mss::eff_dram_tccd_l(i_target, l_tccd_l) );
 
     l_tccd_l_buffer = tccd_l_map[l_tccd_l];
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rcd_load_ddr4.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rcd_load_ddr4.C
index a568fed6f..37c942e1f 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rcd_load_ddr4.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rcd_load_ddr4.C
@@ -64,17 +64,17 @@ fapi2::ReturnCode rcd_load_ddr4( const fapi2::Target<TARGET_TYPE_DIMM>& i_target
     {
         {  0, eff_dimm_ddr4_rc00, tMRD  }, {  1, eff_dimm_ddr4_rc01, tMRD  }, {  2, eff_dimm_ddr4_rc02, tSTAB },
         {  3, eff_dimm_ddr4_rc03, tMRD_L}, {  4, eff_dimm_ddr4_rc04, tMRD_L}, {  5, eff_dimm_ddr4_rc05, tMRD_L},
-        {  6, eff_dimm_ddr4_rc67, tMRD  }, {  8, eff_dimm_ddr4_rc08, tMRD  }, {  9, eff_dimm_ddr4_rc09, tMRD  },
+        {  6, eff_dimm_ddr4_rc06_07, tMRD  }, {  8, eff_dimm_ddr4_rc08, tMRD  }, {  9, eff_dimm_ddr4_rc09, tMRD  },
         { 10, eff_dimm_ddr4_rc10, tSTAB }, { 11, eff_dimm_ddr4_rc11, tMRD  }, { 12, eff_dimm_ddr4_rc12, tMRD  },
         { 13, eff_dimm_ddr4_rc13, tMRD  }, { 14, eff_dimm_ddr4_rc14, tMRD  }, { 15, eff_dimm_ddr4_rc15, tMRD  },
     };
 
     static std::vector< rcd_data > l_rcd_8bit_data =
     {
-        {  1, eff_dimm_ddr4_rc1x, tMRD  }, {  2, eff_dimm_ddr4_rc2x, tMRD  }, {  3, eff_dimm_ddr4_rc3x, tSTAB },
-        {  4, eff_dimm_ddr4_rc4x, tMRD  }, {  5, eff_dimm_ddr4_rc5x, tMRD  }, {  6, eff_dimm_ddr4_rc6x, tMRD  },
-        {  7, eff_dimm_ddr4_rc7x, tMRD  }, {  8, eff_dimm_ddr4_rc8x, tMRD  }, {  9, eff_dimm_ddr4_rc9x, tMRD  },
-        { 10, eff_dimm_ddr4_rcax, tMRD  }, { 11, eff_dimm_ddr4_rcbx, tMRD_L}
+        {  1, eff_dimm_ddr4_rc_1x, tMRD  }, {  2, eff_dimm_ddr4_rc_2x, tMRD  }, {  3, eff_dimm_ddr4_rc_3x, tSTAB },
+        {  4, eff_dimm_ddr4_rc_4x, tMRD  }, {  5, eff_dimm_ddr4_rc_5x, tMRD  }, {  6, eff_dimm_ddr4_rc_6x, tMRD  },
+        {  7, eff_dimm_ddr4_rc_7x, tMRD  }, {  8, eff_dimm_ddr4_rc_8x, tMRD  }, {  9, eff_dimm_ddr4_rc_9x, tMRD  },
+        { 10, eff_dimm_ddr4_rc_ax, tMRD  }, { 11, eff_dimm_ddr4_rc_bx, tMRD_L}
     };
 
     fapi2::buffer<uint8_t> l_value;
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C
index c8527a890..d7eaa90bd 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C
@@ -1,4 +1,3 @@
-
 /* IBM_PROLOG_BEGIN_TAG                                                   */
 /* This is an automatically generated prolog.                             */
 /*                                                                        */
@@ -31,6 +30,8 @@
 #include <mss.H>
 #include <eff_config/eff_config.H>
 #include <eff_config/timing.H>
+#include <lib/dimm/rank.H>
+#include <lib/utils/conversions.H>
 
 using fapi2::TARGET_TYPE_MCA;
 using fapi2::TARGET_TYPE_MCS;
@@ -43,32 +44,31 @@ namespace mss
 ///
 /// @brief Determines & sets effective config for DRAM generation from SPD
 /// @param[in] i_target FAPI2 target
-/// @param[in] i_pDecoder shared pointer to decoder factory
 /// @return fapi2::FAPI2_RC_SUCCESS if okay
 ///
 fapi2::ReturnCode eff_config::dram_gen(const fapi2::Target<TARGET_TYPE_DIMM>& i_target,
-                                       const std::shared_ptr<spd::decoder>& i_pDecoder)
+                                       const std::vector<uint8_t>& i_spd_data )
 {
-    uint8_t l_decoder_val = 0;
-    uint8_t l_mcs_attrs[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {0};
-
-    // Targets
     const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
-    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
-
-    // Current index
-    const auto l_port_num = index(l_mca);
-    const auto l_dimm_num = index(i_target);
 
-    FAPI_TRY( i_pDecoder->dram_device_type(i_target, l_decoder_val) );
+    uint8_t l_decoder_val = 0;
+    FAPI_TRY( spd::dram_device_type(i_target, i_spd_data, l_decoder_val) );
 
     // Get & update MCS attribute
-    FAPI_TRY( eff_dram_gen(l_mcs, &l_mcs_attrs[0][0]) );
-    l_mcs_attrs[l_port_num][l_dimm_num] = l_decoder_val;
-    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_GEN, l_mcs, l_mcs_attrs) );
+    {
+        const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) );
+        const auto l_dimm_num = index(i_target);
+
+        uint8_t l_mcs_attrs[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+        FAPI_TRY( eff_dram_gen(l_mcs, &l_mcs_attrs[0][0]) );
+
+        l_mcs_attrs[l_port_num][l_dimm_num] = l_decoder_val;
+        FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_GEN, l_mcs, l_mcs_attrs) );
+    }
 
 fapi_try_exit:
     return fapi2::current_err;
+
 }// dram_gen
 
 
@@ -80,54 +80,216 @@ fapi_try_exit:
 fapi2::ReturnCode eff_config::dimm_type(const fapi2::Target<TARGET_TYPE_DIMM>& i_target,
                                         const std::vector<uint8_t>& i_spd_data )
 {
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+
     uint8_t l_decoder_val = 0;
-    uint8_t l_mcs_attrs[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {0};
+    FAPI_TRY( spd::base_module_type(i_target, i_spd_data, l_decoder_val) );
 
-    // Targets
+    // Get & update MCS attribute
+    {
+        const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) );
+        const auto l_dimm_num = index(i_target);
+
+        uint8_t l_mcs_attrs[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+        FAPI_TRY( eff_dimm_type(l_mcs, &l_mcs_attrs[0][0]) );
+
+        l_mcs_attrs[l_port_num][l_dimm_num] = l_decoder_val;
+        FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_TYPE, l_mcs, l_mcs_attrs) );
+    }
+
+fapi_try_exit:
+    return fapi2::current_err;
+
+}// dimm_type
+
+///
+/// @brief Determines & sets effective config for dram width
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dram_width(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
     const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
-    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
 
-    // Current index
-    const auto l_port_num = index(l_mca);
-    const auto l_dimm_num = index(i_target);
+    uint8_t l_decoder_val = 0;
+    FAPI_TRY( iv_pDecoder->device_width(i_target, l_decoder_val) );
 
-    FAPI_TRY( spd::base_module_type(i_target, i_spd_data, l_decoder_val) );
+    // Get & update MCS attribute
+    {
+        const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) );
+        const auto l_dimm_num = index(i_target);
+
+        uint8_t l_mcs_attrs[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+        FAPI_TRY( eff_dram_width(l_mcs, &l_mcs_attrs[0][0]) );
+
+        // TK - RIT skeleton. Need to finish - BRS
+        l_mcs_attrs[l_port_num][l_dimm_num] = 0x04;
+        FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_WIDTH, l_mcs, l_mcs_attrs) );
+    }
+
+fapi_try_exit:
+    return fapi2::current_err;
+
+}
+
+///
+/// @brief Determines & sets effective config for dram density
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dram_density(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+
+    uint8_t l_decoder_val = 0;
+    FAPI_TRY( iv_pDecoder->sdram_density(i_target, l_decoder_val) );
 
     // Get & update MCS attribute
-    FAPI_TRY( eff_dimm_type(l_mcs, &l_mcs_attrs[0][0]) );
-    l_mcs_attrs[l_port_num][l_dimm_num] = l_decoder_val;
-    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_TYPE, l_mcs, l_mcs_attrs) );
+    {
+        const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) );
+        const auto l_dimm_num = index(i_target);
+
+        uint8_t l_mcs_attrs[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+        FAPI_TRY( eff_dram_density(l_mcs, &l_mcs_attrs[0][0]) );
+
+        // TK - RIT skeleton. Need to finish - BRS
+        l_mcs_attrs[l_port_num][l_dimm_num] = 0x04;
+        FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_DENSITY, l_mcs, l_mcs_attrs) );
+    }
 
 fapi_try_exit:
     return fapi2::current_err;
-}// dimm_type
+
+}
 
 ///
-/// @brief Determines & sets effective config for Hybrid memory type from SPD
+/// @brief Determines & sets effective config for number of ranks per dimm
 /// @param[in] i_target FAPI2 target
-/// @param[in] i_pDecoder shared pointer to decoder factory
 /// @return fapi2::FAPI2_RC_SUCCESS if okay
 ///
-fapi2::ReturnCode eff_config::hybrid_memory_type(const fapi2::Target<TARGET_TYPE_DIMM>& i_target,
-        const std::shared_ptr<spd::decoder>& i_pDecoder)
+fapi2::ReturnCode eff_config::ranks_per_dimm(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
 {
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+
     uint8_t l_decoder_val = 0;
-    uint8_t l_mcs_attrs[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {0};
+    FAPI_TRY( iv_pDecoder->num_package_ranks_per_dimm(i_target, l_decoder_val) );
 
-    // Targets
+    // Get & update MCS attribute
+    {
+        const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) );
+        const auto l_dimm_num = index(i_target);
+
+        uint8_t l_attrs_ranks_per_dimm[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+        FAPI_TRY(eff_num_ranks_per_dimm(l_mcs, &l_attrs_ranks_per_dimm[0][0]));
+
+        // TK - RIT skeleton. Need to finish - BRS
+        l_attrs_ranks_per_dimm[l_port_num][l_dimm_num] = 0x2;
+        FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_NUM_RANKS_PER_DIMM, l_mcs, l_attrs_ranks_per_dimm) );
+    }
+
+fapi_try_exit:
+    return fapi2::current_err;
+
+
+}
+
+///
+/// @brief Determines & sets effective config for number of master ranks per dimm
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::master_ranks_per_dimm(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
     const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
     const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
 
-    // Current index
-    const auto l_port_num = index(l_mca);
+    uint8_t l_attrs_master_ranks_per_dimm[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+    FAPI_TRY(eff_num_master_ranks_per_dimm(l_mcs, &l_attrs_master_ranks_per_dimm[0][0]));
+
+    l_attrs_master_ranks_per_dimm[index(l_mca)][index(i_target)] = 0x02;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM, l_mcs, l_attrs_master_ranks_per_dimm) );
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for stack type
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::primary_stack_type(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    uint8_t l_decoder_val = 0;
+    FAPI_TRY( iv_pDecoder->prim_sdram_signal_loading(i_target, l_decoder_val) );
+
+    // Get & update MCS attribute
+    {
+        const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+        const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) );
+        const auto l_dimm_num = index(i_target);
+
+        uint8_t l_mcs_attrs[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+        FAPI_TRY( eff_prim_stack_type(l_mcs, &l_mcs_attrs[0][0]) );
+
+        l_mcs_attrs[l_port_num][l_dimm_num] = l_decoder_val;
+        FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_PRIM_STACK_TYPE, l_mcs, l_mcs_attrs) );
+    }
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for dimm size
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+/// @warn Dependent on the following attributes already set:
+/// @warn eff_dram_density, eff_sdram_width, eff_ranks_per_dimm
+///
+fapi2::ReturnCode eff_config::dimm_size(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+
+    // Get & update MCS attribute
+    const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) );
     const auto l_dimm_num = index(i_target);
 
-    FAPI_TRY(i_pDecoder->hybrid_media(i_target, l_decoder_val));
+    uint32_t l_attrs_dimm_size[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+    FAPI_TRY( eff_dimm_size(l_mcs, &l_attrs_dimm_size[0][0]) );
+
+    l_attrs_dimm_size[l_port_num][l_dimm_num] = 0x10;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_SIZE, l_mcs, l_attrs_dimm_size) );
+
+fapi_try_exit:
+    return fapi2::current_err;
+
+}
+
+///
+/// @brief Determines & sets effective config for Hybrid memory type from SPD
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::hybrid_memory_type(const fapi2::Target<TARGET_TYPE_DIMM>& i_target)
+{
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) );
+    const auto l_dimm_num = index(i_target);
+
+    uint8_t l_decoder_val = 0;
+    FAPI_TRY(iv_pDecoder->hybrid_media(i_target, l_decoder_val));
 
     // Get & update MCS attribute
-    FAPI_TRY( eff_hybrid_memory_type(l_mcs, &l_mcs_attrs[0][0]) );
-    l_mcs_attrs[l_port_num][l_dimm_num] = l_decoder_val;
-    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_HYBRID_MEMORY_TYPE, l_mcs, l_mcs_attrs) );
+    {
+        uint8_t l_mcs_attrs[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+        FAPI_TRY( eff_hybrid_memory_type(l_mcs, &l_mcs_attrs[0][0]) );
+
+        l_mcs_attrs[l_port_num][l_dimm_num] = l_decoder_val;
+        FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_HYBRID_MEMORY_TYPE, l_mcs, l_mcs_attrs) );
+    }
 
 fapi_try_exit:
     return fapi2::current_err;
@@ -146,46 +308,74 @@ fapi2::ReturnCode eff_config::refresh_interval_time(const fapi2::Target<TARGET_T
 
     FAPI_TRY ( mss::mrw_fine_refresh_mode(l_refresh_mode) );
 
+    // Calculates appropriate tREFI based on fine refresh mode
     switch(l_refresh_mode)
     {
         case fapi2::ENUM_ATTR_MRW_FINE_REFRESH_MODE_NORMAL:
-            calc_trefi1(i_target, l_trefi_in_ps);
+            FAPI_TRY( calc_trefi1(i_target, l_trefi_in_ps),
+                      "Failed to calculate tREFI1" );
             break;
 
         case fapi2::ENUM_ATTR_MRW_FINE_REFRESH_MODE_FIXED_2X:
         case fapi2::ENUM_ATTR_MRW_FINE_REFRESH_MODE_FLY_2X:
-            calc_trefi2(i_target, l_trefi_in_ps);
+            FAPI_TRY( calc_trefi2(i_target, l_trefi_in_ps),
+                      "Failed to calculate tREFI2" );
             break;
 
         case fapi2::ENUM_ATTR_MRW_FINE_REFRESH_MODE_FIXED_4X:
         case fapi2::ENUM_ATTR_MRW_FINE_REFRESH_MODE_FLY_4X:
-            calc_trefi4(i_target, l_trefi_in_ps);
+            FAPI_TRY( calc_trefi4(i_target, l_trefi_in_ps),
+                      "Failed to calculate tREFI4" );
+            break;
+
+        default:
+            // Fine Refresh Mode will be a platform attribute set by the MRW,
+            // which they "shouldn't" mess up as long as use "attribute" enums.
+            // if openpower messes this up we can at least catch it
+            FAPI_ASSERT(false,
+                        fapi2::MSS_INVALID_FINE_REFRESH_MODE().
+                        set_FINE_REF_MODE(l_refresh_mode),
+                        "%s Incorrect Fine Refresh Mode received: %d ",
+                        mss::c_str(i_target),
+                        l_refresh_mode);
+
             break;
     }
 
     {
         // Calculate clock period (tCK) from selected freq from mss_freq
         uint64_t l_tCK_in_ps = 0;
-        FAPI_TRY( clock_period(i_target, l_tCK_in_ps) );
+        FAPI_TRY( clock_period(i_target, l_tCK_in_ps),
+                  "Failed to calclate clock period");
+
+        FAPI_DBG("Calculated clock period (tCK): %d", l_tCK_in_ps);
 
         {
             // Calculate refresh cycle time in nCK & set attribute
             const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
             const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) );
 
-            std::vector<uint8_t> l_mcs_attrs_trefi(PORTS_PER_MCS, 0);
-            uint8_t l_trefi_in_nck ;
+            std::vector<uint16_t> l_mcs_attrs_trefi(PORTS_PER_MCS, 0);
+            uint16_t l_trefi_in_nck ;
 
-            // Get & update MCS attribute
-            FAPI_TRY( eff_dram_trefi(l_mcs, &l_mcs_attrs_trefi[0]) );
+            // Retrieve MCS attribute data
+            FAPI_TRY( eff_dram_trefi(l_mcs, l_mcs_attrs_trefi.data()) );
 
+            // Calculate nck
             l_trefi_in_nck = calc_nck(l_trefi_in_ps, l_tCK_in_ps, uint64_t(INVERSE_DDR4_CORRECTION_FACTOR));
-            l_mcs_attrs_trefi[l_port_num] = uint8_t(l_trefi_in_nck);
+            FAPI_DBG("Calculated tREFI (nck): %d", l_trefi_in_ps);
+
+            // Update MCS attribute
+            l_mcs_attrs_trefi[l_port_num] = l_trefi_in_nck;
+
+            // TK - RIT skeleton. Need to finish - BRS
+            // (note old calc resulted in 0x01 which seems really wrong in any event
+            l_mcs_attrs_trefi[l_port_num] = 0x1249;
 
             // casts vector into the type FAPI_ATTR_SET is expecting by deduction
             FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_TREFI,
                                     l_mcs,
-                                    UINT8_VECTOR_TO_1D_ARRAY(l_mcs_attrs_trefi, PORTS_PER_MCS)),
+                                    UINT16_VECTOR_TO_1D_ARRAY(l_mcs_attrs_trefi, PORTS_PER_MCS)),
                       "Failed to set tREFI attribute");
         }
     }
@@ -198,65 +388,2347 @@ fapi_try_exit:
 ///
 /// @brief Determines & sets effective config for refresh cycle time (tRFC)
 /// @param[in] i_target FAPI2 target
-/// @param[in] i_pDecoder shared pointer to decoder factory
 /// @return fapi2::FAPI2_RC_SUCCESS if okay
 ///
-fapi2::ReturnCode eff_config::refresh_cycle_time(const fapi2::Target<TARGET_TYPE_DIMM>& i_target,
-        const std::shared_ptr<spd::decoder>& i_pDecoder)
+fapi2::ReturnCode eff_config::refresh_cycle_time(const fapi2::Target<TARGET_TYPE_DIMM>& i_target)
 {
     uint8_t l_refresh_mode = 0;
     int64_t l_trfc_in_ps = 0;
 
-    FAPI_TRY ( mss::mrw_fine_refresh_mode(l_refresh_mode) );
+    FAPI_TRY ( mss::mrw_fine_refresh_mode(l_refresh_mode),
+               "Failed to get MRW attribute for fine refresh mode" );
 
+    // Selects appropriate tRFC based on fine refresh mode
     switch(l_refresh_mode)
     {
         case fapi2::ENUM_ATTR_MRW_FINE_REFRESH_MODE_NORMAL:
-            i_pDecoder->min_refresh_recovery_delay_time_1(i_target, l_trfc_in_ps);
+            FAPI_TRY( iv_pDecoder->min_refresh_recovery_delay_time_1(i_target, l_trfc_in_ps),
+                      "Failed to decode SPD for tRFC1" );
             break;
 
         case fapi2::ENUM_ATTR_MRW_FINE_REFRESH_MODE_FIXED_2X:
         case fapi2::ENUM_ATTR_MRW_FINE_REFRESH_MODE_FLY_2X:
-            i_pDecoder->min_refresh_recovery_delay_time_2(i_target, l_trfc_in_ps);
+            FAPI_TRY( iv_pDecoder->min_refresh_recovery_delay_time_2(i_target, l_trfc_in_ps),
+                      "Failed to decode SPD for tRFC2" );
             break;
 
         case fapi2::ENUM_ATTR_MRW_FINE_REFRESH_MODE_FIXED_4X:
         case fapi2::ENUM_ATTR_MRW_FINE_REFRESH_MODE_FLY_4X:
-            i_pDecoder->min_refresh_recovery_delay_time_4(i_target, l_trfc_in_ps);
+            FAPI_TRY( iv_pDecoder->min_refresh_recovery_delay_time_4(i_target, l_trfc_in_ps),
+                      "Failed to decode SPD for tRFC4" );
             break;
-    }
+
+        default:
+            // Fine Refresh Mode will be a platform attribute set by the MRW,
+            // which they "shouldn't" mess up as long as use "attribute" enums.
+            // if openpower messes this up we can at least catch it
+            FAPI_ASSERT(false,
+                        fapi2::MSS_INVALID_FINE_REFRESH_MODE().
+                        set_FINE_REF_MODE(l_refresh_mode),
+                        "%s Incorrect Fine Refresh Mode received: %d ",
+                        mss::c_str(i_target),
+                        l_refresh_mode);
+
+            break;
+
+    }// switch
 
     {
         // Calculate clock period (tCK) from selected freq from mss_freq
         int64_t l_tCK_in_ps = 0;
-        FAPI_TRY( clock_period(i_target, l_tCK_in_ps) );
+        FAPI_TRY( clock_period(i_target, l_tCK_in_ps),
+                  "Failed to calculate clock period (tCK)");
 
+        FAPI_DBG("Calculated clock period (tCK): %d", l_tCK_in_ps);
         {
             // Calculate refresh cycle time in nCK & set attribute
             const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
             const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) );
 
-            uint8_t l_trfc_in_nck = 0;
-            std::vector<uint8_t> l_mcs_attrs_trfc(PORTS_PER_MCS, 0);
+
+            uint16_t l_trfc_in_nck = 0;
+            std::vector<uint16_t> l_mcs_attrs_trfc(PORTS_PER_MCS, 0);
 
             // Retrieve MCS attribute data
-            FAPI_TRY( eff_dram_trfc(l_mcs, l_mcs_attrs_trfc.data()) );
+            FAPI_TRY( eff_dram_trfc(l_mcs, l_mcs_attrs_trfc.data()),
+                      "Failed to retrieve tRFC attribute" );
 
             // Calculate nck
             l_trfc_in_nck = calc_nck(l_trfc_in_ps, l_tCK_in_ps, int64_t(INVERSE_DDR4_CORRECTION_FACTOR));
+            FAPI_DBG("Calculated tRFC (nck): %d", l_trfc_in_nck);
 
             // Update MCS attribute
-            l_mcs_attrs_trfc[l_port_num] = uint8_t(l_trfc_in_nck);
+            l_mcs_attrs_trfc[l_port_num] = l_trfc_in_nck;
+
+            // TK - RIT skeleton. Need to finish - BRS
+            l_mcs_attrs_trfc[l_port_num] = 0x1A4;
 
             // casts vector into the type FAPI_ATTR_SET is expecting by deduction
             FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_TRFC,
                                     l_mcs,
-                                    UINT8_VECTOR_TO_1D_ARRAY(l_mcs_attrs_trfc, PORTS_PER_MCS)),
-                      "Failed to set tRFC attribute");
+                                    UINT16_VECTOR_TO_1D_ARRAY(l_mcs_attrs_trfc, PORTS_PER_MCS) ),
+                      "Failed to set tRFC attribute" );
+        }
+    }
+
+fapi_try_exit:
+    return fapi2::current_err;
+
+}
+
+///
+/// @brief Determines & sets effective config for refresh cycle time (logical ranks) (tRFC_DLR)
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::refresh_cycle_time_dlr(const fapi2::Target<TARGET_TYPE_DIMM>& i_target)
+{
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) );
+
+    std::vector<uint8_t> l_mcs_attrs_trfc_dlr(PORTS_PER_MCS, 0);
+
+    // Retrieve MCS attribute data
+    FAPI_TRY( eff_dram_trfc_dlr(l_mcs, l_mcs_attrs_trfc_dlr.data()),
+              "Failed to retrieve tRFC_DLR attribute" );
+
+    // TK - RIT skeleton. Need to finish - BRS
+    l_mcs_attrs_trfc_dlr[l_port_num] = 0x90;
+    FAPI_DBG("Hardwired tRFC_DLR: %d", l_mcs_attrs_trfc_dlr[l_port_num]);
+
+    // Update MCS attribute
+    // casts vector into the type FAPI_ATTR_SET is expecting by deduction
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_TRFC_DLR,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_mcs_attrs_trfc_dlr, PORTS_PER_MCS) ),
+              "Failed to set tRFC_DLR attribute" );
+fapi_try_exit:
+    return fapi2::current_err;
+
+}
+
+///
+/// @brief Determines & sets effective config for dimm rcd mirror mode
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::rcd_mirror_mode(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_mirror_mode[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dimm_rcd_mirror_mode(l_mcs, &l_attrs_mirror_mode[0][0]) );
+    l_attrs_mirror_mode[l_port_num][l_dimm_num] = 0x01;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_RCD_MIRROR_MODE, l_mcs, l_attrs_mirror_mode) );
+
+fapi_try_exit:
+    return fapi2::current_err;
+
+}
+
+///
+/// @brief Determines & sets effective config for dram bank bits
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dram_bank_bits(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_bank_bits[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dram_bank_bits(l_mcs, &l_attrs_bank_bits[0][0]) );
+    l_attrs_bank_bits[l_port_num][l_dimm_num] = 0x04;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_BANK_BITS, l_mcs, l_attrs_bank_bits) );
+
+fapi_try_exit:
+    return fapi2::current_err;
+
+
+}
+
+///
+/// @brief Determines & sets effective config for dram row bits
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dram_row_bits(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_row_bits[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dram_row_bits(l_mcs, &l_attrs_row_bits[0][0]) );
+    l_attrs_row_bits[l_port_num][l_dimm_num] = 0x10;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_ROW_BITS, l_mcs, l_attrs_row_bits) );
+fapi_try_exit:
+    return fapi2::current_err;
+
+
+}
+
+///
+/// @brief Determines & sets effective config for custom dimm
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::custom_dimm(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    uint8_t l_attrs_custom_dimm[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+    FAPI_TRY(eff_custom_dimm(l_mcs, &l_attrs_custom_dimm[0][0]));
+
+    l_attrs_custom_dimm[l_port_num][l_dimm_num] = 0x00;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_CUSTOM_DIMM, l_mcs, l_attrs_custom_dimm) );
+
+fapi_try_exit:
+    return fapi2::current_err;
+
+}
+
+///
+/// @brief Determines & sets effective config for tDQS
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dram_dqs_time(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dqs_time[PORTS_PER_MCS] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_dram_tdqs(l_mcs, &l_attrs_dqs_time[0]) );
+    l_attrs_dqs_time[l_port_num] = 0x01;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_TDQS, l_mcs, l_attrs_dqs_time) );
+
+fapi_try_exit:
+    return fapi2::current_err;
+
+}
+
+///
+/// @brief Determines & sets effective config for ODT RD
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::odt_read(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+
+    uint8_t l_attrs_odt_rd[PORTS_PER_MCS][MAX_DIMM_PER_PORT][MAX_RANK_PER_DIMM] = {};
+    std::vector< uint64_t > l_ranks;
+
+    const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) );
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_odt_rd(l_mcs, &l_attrs_odt_rd[0][0][0]) );
+    FAPI_TRY( mss::ranks(i_target, l_ranks) );
+    FAPI_DBG("seeing %d ranks on %s", l_ranks.size(), mss::c_str(i_target));
+
+    // Initialize all ranks on this DIMM to 0, then write values for ranks which exist.
+    memset(&(l_attrs_odt_rd[l_port_num][l_dimm_num][0]), 0, MAX_RANK_PER_DIMM);
+
+    // Replace with proper ODT calculation.
+    for(const auto& l_rank : l_ranks)
+    {
+        FAPI_DBG("writing odt_rd[%d][%d][%d] for %s", l_port_num, l_dimm_num, index(l_rank), mss::c_str(i_target));
+        l_attrs_odt_rd[l_port_num][l_dimm_num][index(l_rank)] = 0x00;
+    }
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_ODT_RD, l_mcs, l_attrs_odt_rd) );
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for ODT WR
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::odt_write(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+
+    uint8_t l_attrs_odt_wr[PORTS_PER_MCS][MAX_DIMM_PER_PORT][MAX_RANK_PER_DIMM] = {};
+    std::vector< uint64_t > l_ranks;
+
+    const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) );
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_odt_wr(l_mcs, &l_attrs_odt_wr[0][0][0]) );
+    FAPI_TRY( mss::ranks(i_target, l_ranks) );
+    FAPI_DBG("seeing %d ranks on %s", l_ranks.size(), mss::c_str(i_target));
+
+    // Initialize all ranks on this DIMM to 0, then write values for ranks which exist.
+    memset(&(l_attrs_odt_wr[l_port_num][l_dimm_num][0]), 0, MAX_RANK_PER_DIMM);
+
+    for(const auto& l_rank : l_ranks)
+    {
+        uint8_t l_value = 0x0;
+
+        // Complete hackery too keep in sync with the VBU attribute file - probably doesn't
+        // matter at all for sim.
+        if (l_dimm_num == 0)
+        {
+            l_value = (l_rank == 0) ? 0x40 : 0x80;
         }
+
+        FAPI_DBG("writing odt_wr[%d][%d][%d] for %s", l_port_num, l_dimm_num, index(l_rank), mss::c_str(i_target));
+        l_attrs_odt_wr[l_port_num][l_dimm_num][index(l_rank)] = l_value;
+    }
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_ODT_WR, l_mcs, l_attrs_odt_wr) );
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for tCCD_L
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dram_tccd_l(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_tccd_l[PORTS_PER_MCS] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_dram_tccd_l(l_mcs, &l_attrs_tccd_l[0]) );
+
+    l_attrs_tccd_l[l_port_num] = 0x06;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_TCCD_L, l_mcs, l_attrs_tccd_l) );
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for RTT Park
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::rtt_park(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+
+    // Attribute to set num dimm ranks is a pre-requisite
+    uint8_t l_attrs_rtt_park[PORTS_PER_MCS][MAX_DIMM_PER_PORT][MAX_RANK_PER_DIMM] = {};
+    std::vector< uint64_t > l_ranks;
+
+    const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) );
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_rtt_park(l_mcs, &l_attrs_rtt_park[0][0][0]) );
+    FAPI_TRY( mss::ranks(i_target, l_ranks) );
+
+    for(const auto& l_rank : l_ranks)
+    {
+        l_attrs_rtt_park[l_port_num][l_dimm_num][index(l_rank)] = 0x00;
+    }
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_RTT_PARK, l_mcs, l_attrs_rtt_park) );
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+
+///
+/// @brief Determines & sets effective config for DIMM RC00
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dimm_rc00(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dimm_rc00[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dimm_ddr4_rc00(l_mcs, &l_attrs_dimm_rc00[0][0]) );
+    l_attrs_dimm_rc00[l_port_num][l_dimm_num] = 0x00;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC00, l_mcs, l_attrs_dimm_rc00) );
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for DIMM RC01
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dimm_rc01(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dimm_rc01[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dimm_ddr4_rc01(l_mcs, &l_attrs_dimm_rc01[0][0]) );
+    l_attrs_dimm_rc01[l_port_num][l_dimm_num] = 0x00;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC01, l_mcs, l_attrs_dimm_rc01) );
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for DIMM RC02
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dimm_rc02(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dimm_rc02[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dimm_ddr4_rc02(l_mcs, &l_attrs_dimm_rc02[0][0]) );
+    l_attrs_dimm_rc02[l_port_num][l_dimm_num] = 0x00;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC02, l_mcs, l_attrs_dimm_rc02) );
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for DIMM RC03
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dimm_rc03(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dimm_rc03[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dimm_ddr4_rc03(l_mcs, &l_attrs_dimm_rc03[0][0]) );
+    l_attrs_dimm_rc03[l_port_num][l_dimm_num] = 0x06;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC03, l_mcs, l_attrs_dimm_rc03) );
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+
+///
+/// @brief Determines & sets effective config for DIMM RC04
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dimm_rc04(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dimm_rc04[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dimm_ddr4_rc04(l_mcs, &l_attrs_dimm_rc04[0][0]) );
+    l_attrs_dimm_rc04[l_port_num][l_dimm_num] = 0x05;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC04, l_mcs, l_attrs_dimm_rc04) );
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for DIMM RC05
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dimm_rc05(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dimm_rc05[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dimm_ddr4_rc05(l_mcs, &l_attrs_dimm_rc05[0][0]) );
+    l_attrs_dimm_rc05[l_port_num][l_dimm_num] = 0x05;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC05, l_mcs, l_attrs_dimm_rc05) );
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for DIMM RC06_07
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dimm_rc06_07(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dimm_rc06_07[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dimm_ddr4_rc06_07(l_mcs, &l_attrs_dimm_rc06_07[0][0]) );
+    l_attrs_dimm_rc06_07[l_port_num][l_dimm_num] = 0xf;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC06_07, l_mcs, l_attrs_dimm_rc06_07) );
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for DIMM RC08
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dimm_rc08(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dimm_rc08[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dimm_ddr4_rc08(l_mcs, &l_attrs_dimm_rc08[0][0]) );
+    l_attrs_dimm_rc08[l_port_num][l_dimm_num] = 0x3;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC08, l_mcs, l_attrs_dimm_rc08) );
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for DIMM RC09
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dimm_rc09(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dimm_rc09[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dimm_ddr4_rc09(l_mcs, &l_attrs_dimm_rc09[0][0]) );
+    l_attrs_dimm_rc09[l_port_num][l_dimm_num] = 0x00;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC09, l_mcs, l_attrs_dimm_rc09) );
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for DIMM RC10
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dimm_rc10(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dimm_rc10[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dimm_ddr4_rc10(l_mcs, &l_attrs_dimm_rc10[0][0]) );
+    l_attrs_dimm_rc10[l_port_num][l_dimm_num] = 0x00;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC10, l_mcs, l_attrs_dimm_rc10) );
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+
+///
+/// @brief Determines & sets effective config for DIMM RC11
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dimm_rc11(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dimm_rc11[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dimm_ddr4_rc11(l_mcs, &l_attrs_dimm_rc11[0][0]) );
+    l_attrs_dimm_rc11[l_port_num][l_dimm_num] = 0xe;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC11, l_mcs, l_attrs_dimm_rc11) );
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for DIMM RC12
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dimm_rc12(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dimm_rc12[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dimm_ddr4_rc12(l_mcs, &l_attrs_dimm_rc12[0][0]) );
+    l_attrs_dimm_rc12[l_port_num][l_dimm_num] = 0x00;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC12, l_mcs, l_attrs_dimm_rc12) );
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for DIMM RC13
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dimm_rc13(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dimm_rc13[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dimm_ddr4_rc13(l_mcs, &l_attrs_dimm_rc13[0][0]) );
+    l_attrs_dimm_rc13[l_port_num][l_dimm_num] = 0xC;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC13, l_mcs, l_attrs_dimm_rc13) );
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for DIMM RC14
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dimm_rc14(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dimm_rc14[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dimm_ddr4_rc14(l_mcs, &l_attrs_dimm_rc14[0][0]) );
+    l_attrs_dimm_rc14[l_port_num][l_dimm_num] = 0x00;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC14, l_mcs, l_attrs_dimm_rc14) );
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for DIMM RC15
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dimm_rc15(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dimm_rc15[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dimm_ddr4_rc15(l_mcs, &l_attrs_dimm_rc15[0][0]) );
+    l_attrs_dimm_rc15[l_port_num][l_dimm_num] = 0x00;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC15, l_mcs, l_attrs_dimm_rc15) );
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+
+///
+/// @brief Determines & sets effective config for DIMM RC_1x
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dimm_rc1x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dimm_rc_1x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dimm_ddr4_rc_1x(l_mcs, &l_attrs_dimm_rc_1x[0][0]) );
+    l_attrs_dimm_rc_1x[l_port_num][l_dimm_num] = 0x00;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC_1x, l_mcs, l_attrs_dimm_rc_1x) );
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+
+///
+/// @brief Determines & sets effective config for DIMM RC_2x
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dimm_rc2x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dimm_rc_2x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dimm_ddr4_rc_2x(l_mcs, &l_attrs_dimm_rc_2x[0][0]) );
+    l_attrs_dimm_rc_2x[l_port_num][l_dimm_num] = 0x00;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC_2x, l_mcs, l_attrs_dimm_rc_2x) );
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+
+///
+/// @brief Determines & sets effective config for DIMM RC_3x
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dimm_rc3x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dimm_rc_3x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dimm_ddr4_rc_3x(l_mcs, &l_attrs_dimm_rc_3x[0][0]) );
+    l_attrs_dimm_rc_3x[l_port_num][l_dimm_num] = 0x39;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC_3x, l_mcs, l_attrs_dimm_rc_3x) );
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+
+///
+/// @brief Determines & sets effective config for DIMM RC_4x
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dimm_rc4x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dimm_rc_4x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dimm_ddr4_rc_4x(l_mcs, &l_attrs_dimm_rc_4x[0][0]) );
+    l_attrs_dimm_rc_4x[l_port_num][l_dimm_num] = 0x00;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC_4x, l_mcs, l_attrs_dimm_rc_4x) );
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+
+///
+/// @brief Determines & sets effective config for DIMM RC_5x
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dimm_rc5x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dimm_rc_5x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dimm_ddr4_rc_5x(l_mcs, &l_attrs_dimm_rc_5x[0][0]) );
+    l_attrs_dimm_rc_5x[l_port_num][l_dimm_num] = 0x00;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC_5x, l_mcs, l_attrs_dimm_rc_5x) );
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+
+///
+/// @brief Determines & sets effective config for DIMM RC_6x
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dimm_rc6x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dimm_rc_6x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dimm_ddr4_rc_6x(l_mcs, &l_attrs_dimm_rc_6x[0][0]) );
+    l_attrs_dimm_rc_6x[l_port_num][l_dimm_num] = 0x00;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC_6x, l_mcs, l_attrs_dimm_rc_6x) );
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+
+///
+/// @brief Determines & sets effective config for DIMM RC_7x
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dimm_rc7x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dimm_rc_7x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dimm_ddr4_rc_7x(l_mcs, &l_attrs_dimm_rc_7x[0][0]) );
+    l_attrs_dimm_rc_7x[l_port_num][l_dimm_num] = 0x00;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC_7x, l_mcs, l_attrs_dimm_rc_7x) );
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+
+///
+/// @brief Determines & sets effective config for DIMM RC_8x
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dimm_rc8x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dimm_rc_8x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dimm_ddr4_rc_8x(l_mcs, &l_attrs_dimm_rc_8x[0][0]) );
+    l_attrs_dimm_rc_8x[l_port_num][l_dimm_num] = 0x00;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC_8x, l_mcs, l_attrs_dimm_rc_8x) );
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+
+///
+/// @brief Determines & sets effective config for DIMM RC_9x
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dimm_rc9x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dimm_rc_9x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dimm_ddr4_rc_9x(l_mcs, &l_attrs_dimm_rc_9x[0][0]) );
+    l_attrs_dimm_rc_9x[l_port_num][l_dimm_num] = 0x00;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC_9x, l_mcs, l_attrs_dimm_rc_9x) );
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+
+///
+/// @brief Determines & sets effective config for DIMM RC_AX
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dimm_rcax(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dimm_rc_ax[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dimm_ddr4_rc_ax(l_mcs, &l_attrs_dimm_rc_ax[0][0]) );
+    l_attrs_dimm_rc_ax[l_port_num][l_dimm_num] = 0x00;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC_Ax, l_mcs, l_attrs_dimm_rc_ax) );
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+
+///
+/// @brief Determines & sets effective config for DIMM RC_BX
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dimm_rcbx(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dimm_rc_bx[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dimm_ddr4_rc_bx(l_mcs, &l_attrs_dimm_rc_bx[0][0]) );
+    l_attrs_dimm_rc_bx[l_port_num][l_dimm_num] = 0x07;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC_Bx, l_mcs, l_attrs_dimm_rc_bx) );
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for tWR
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dram_twr(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_twr(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_dram_twr(l_mcs, l_attrs_twr.data()) );
+
+    l_attrs_twr[l_port_num] = 0x12;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_TWR,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_twr, PORTS_PER_MCS)),
+              "Failed setting attribute for tWR");
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for burst length (BL)
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::burst_length(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_bl(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_dram_bl(l_mcs, l_attrs_bl.data()) );
+
+    l_attrs_bl[l_port_num] = 0x00;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_BL,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_bl, PORTS_PER_MCS)),
+              "Failed setting attribute for BL");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for RBT
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::read_burst_type(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_rbt[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dram_rbt(l_mcs, &l_attrs_rbt[0][0]) );
+
+    l_attrs_rbt[l_port_num][l_dimm_num] = 0x00;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_RBT, l_mcs, l_attrs_rbt),
+              "Failed setting attribute for RTB");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for TM
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dram_tm(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_tm[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dram_tm(l_mcs, &l_attrs_tm[0][0]) );
+
+    l_attrs_tm[l_port_num][l_dimm_num] = 0x00;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_TM, l_mcs, l_attrs_tm),
+              "Failed setting attribute for BL");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+
+///
+/// @brief Determines & sets effective config for cwl
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dram_cwl(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_cwl(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_dram_cwl(l_mcs, l_attrs_cwl.data()) );
+
+    l_attrs_cwl[l_port_num] = 0x0C;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_CWL,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_cwl, PORTS_PER_MCS)),
+              "Failed setting attribute for cwl");
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+
+///
+/// @brief Determines & sets effective config for lpasr
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dram_lpasr(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_lpasr(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_dram_lpasr(l_mcs, l_attrs_lpasr.data()) );
+
+    l_attrs_lpasr[l_port_num] = 0x00;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_LPASR,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_lpasr, PORTS_PER_MCS)),
+              "Failed setting attribute for LPASR");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for additive latency
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::additive_latency(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_dram_al(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_dram_al(l_mcs, l_attrs_dram_al.data()) );
+
+    l_attrs_dram_al[l_port_num] = 0x00;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_AL,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_dram_al, PORTS_PER_MCS)),
+              "Failed setting attribute for DRAM_AL");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for DLL Reset
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dll_reset(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dll_reset[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dram_dll_reset(l_mcs, &l_attrs_dll_reset[0][0]) );
+
+    l_attrs_dll_reset[l_port_num][l_dimm_num] = 0x01;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_DLL_RESET, l_mcs, l_attrs_dll_reset),
+              "Failed setting attribute for BL");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for DLL Enable
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dll_enable(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dll_enable[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dram_dll_enable(l_mcs, &l_attrs_dll_enable[0][0]) );
+
+    l_attrs_dll_enable[l_port_num][l_dimm_num] = 0x00;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_DLL_ENABLE, l_mcs, l_attrs_dll_enable),
+              "Failed setting attribute for BL");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for RON
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::dram_ron(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dram_ron[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_dram_ron(l_mcs, &l_attrs_dram_ron[0][0]) );
+
+    l_attrs_dram_ron[l_port_num][l_dimm_num] = 0x22;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_RON, l_mcs, l_attrs_dram_ron),
+              "Failed setting attribute for BL");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for RTT NOM
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::rtt_nom(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+
+    uint8_t l_attrs_rtt_nom[PORTS_PER_MCS][MAX_DIMM_PER_PORT][MAX_RANK_PER_DIMM] = {};
+    std::vector< uint64_t > l_ranks;
+
+    const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) );
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( mss::ranks(i_target, l_ranks) );
+    FAPI_TRY( eff_dram_rtt_nom(l_mcs, &l_attrs_rtt_nom[0][0][0]) );
+
+    for(const auto& l_rank : l_ranks)
+    {
+        l_attrs_rtt_nom[l_port_num][l_dimm_num][index(l_rank)] = 0x28;
+    }
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_RTT_NOM, l_mcs, l_attrs_rtt_nom),
+              "Failed setting attribute for BL");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for Write Level Enable
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::write_level_enable(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_wr_lvl_enable(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_dram_wr_lvl_enable(l_mcs, l_attrs_wr_lvl_enable.data()) );
+
+    l_attrs_wr_lvl_enable[l_port_num] = 0x00;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_WR_LVL_ENABLE,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_wr_lvl_enable, PORTS_PER_MCS)),
+              "Failed setting attribute for WR_LVL_ENABLE");
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for Output Buffer
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::output_buffer(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_output_buffer(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_dram_output_buffer(l_mcs, l_attrs_output_buffer.data()) );
+
+    l_attrs_output_buffer[l_port_num] = 0x00;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_OUTPUT_BUFFER,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_output_buffer, PORTS_PER_MCS)),
+              "Failed setting attribute for OUTPUT_BUFFER");
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for Vref DQ Train Value
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::vref_dq_train_value(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+
+    uint8_t l_attrs_vref_dq_train_val[PORTS_PER_MCS][MAX_DIMM_PER_PORT][MAX_RANK_PER_DIMM] = {};
+    std::vector< uint64_t > l_ranks;
+
+    const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) );
+    const auto l_dimm_num = index(i_target);
+
+    // Attribute to set num dimm ranks is a pre-requisite
+    FAPI_TRY( eff_vref_dq_train_value(l_mcs, &l_attrs_vref_dq_train_val[0][0][0]) );
+    FAPI_TRY( mss::ranks(i_target, l_ranks) );
+
+    for(const auto& l_rank : l_ranks)
+    {
+        l_attrs_vref_dq_train_val[l_port_num][l_dimm_num][index(l_rank)] = 0x10;
     }
 
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_VREF_DQ_TRAIN_VALUE, l_mcs, l_attrs_vref_dq_train_val),
+              "Failed setting attribute for ATTR_EFF_VREF_DQ_TRAIN_VALUE");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+
+///
+/// @brief Determines & sets effective config for Vref DQ Train Enable
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::vref_dq_train_enable(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+
+    uint8_t l_attrs_vref_dq_train_enable[PORTS_PER_MCS][MAX_DIMM_PER_PORT][MAX_RANK_PER_DIMM] = {};
+    std::vector< uint64_t > l_ranks;
+
+    const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) );
+    const auto l_dimm_num = index(i_target);
+
+    // Attribute to set num dimm ranks is a pre-requisite
+    FAPI_TRY( eff_vref_dq_train_enable(l_mcs, &l_attrs_vref_dq_train_enable[0][0][0]) );
+    FAPI_TRY( mss::ranks(i_target, l_ranks) );
+
+    for(const auto& l_rank : l_ranks)
+    {
+        l_attrs_vref_dq_train_enable[l_port_num][l_dimm_num][index(l_rank)] = 0x00;
+    }
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_VREF_DQ_TRAIN_ENABLE, l_mcs, l_attrs_vref_dq_train_enable),
+              "Failed setting attribute for ATTR_EFF_VREF_DQ_TRAIN_ENABLE");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+
+///
+/// @brief Determines & sets effective config for Vref DQ Train Range
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::vref_dq_train_range(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+
+    // Attribute to set num dimm ranks is a pre-requisite
+    uint8_t l_attrs_vref_dq_train_range[PORTS_PER_MCS][MAX_DIMM_PER_PORT][MAX_RANK_PER_DIMM] = {};
+    std::vector< uint64_t > l_ranks;
+
+    const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) );
+    const auto l_dimm_num = index(i_target);
+
+    FAPI_TRY( eff_vref_dq_train_range(l_mcs, &l_attrs_vref_dq_train_range[0][0][0]) );
+    FAPI_TRY( mss::ranks(i_target, l_ranks) );
+
+    for(const auto& l_rank : l_ranks)
+    {
+        l_attrs_vref_dq_train_range[l_port_num][l_dimm_num][index(l_rank)] = 0x00;
+    }
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_VREF_DQ_TRAIN_RANGE, l_mcs, l_attrs_vref_dq_train_range),
+              "Failed setting attribute for ATTR_EFF_VREF_DQ_TRAIN_RANGE");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for CA Parity Latency
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::ca_parity_latency(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_ca_parity_latency(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_ca_parity_latency(l_mcs, l_attrs_ca_parity_latency.data()) );
+
+    l_attrs_ca_parity_latency[l_port_num] = 0x00;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_CA_PARITY_LATENCY,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_ca_parity_latency, PORTS_PER_MCS)),
+              "Failed setting attribute for CA_PARITY_LATENCY");
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for CRC Error Clear
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::crc_error_clear(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_crc_error_clear(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_crc_error_clear(l_mcs, l_attrs_crc_error_clear.data()) );
+
+    l_attrs_crc_error_clear[l_port_num] = 0x01;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_CRC_ERROR_CLEAR,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_crc_error_clear, PORTS_PER_MCS)),
+              "Failed setting attribute for CRC_ERROR_CLEAR");
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for CA Parity Error Status
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::ca_parity_error_status(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_ca_parity_error_status(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_ca_parity_error_status(l_mcs, l_attrs_ca_parity_error_status.data()) );
+
+    l_attrs_ca_parity_error_status[l_port_num] = 0x01;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_CA_PARITY_ERROR_STATUS,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_ca_parity_error_status, PORTS_PER_MCS)),
+              "Failed setting attribute for CA_PARITY_ERROR_STATUS");
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for CA Parity
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::ca_parity(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_ca_parity(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_ca_parity(l_mcs, l_attrs_ca_parity.data()) );
+
+    l_attrs_ca_parity[l_port_num] = 0x00;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_CA_PARITY,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_ca_parity, PORTS_PER_MCS)),
+              "Failed setting attribute for CA_PARITY");
 fapi_try_exit:
     return fapi2::current_err;
 }
+
+///
+/// @brief Determines & sets effective config for ODT Input Buffer
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::odt_input_buffer(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_odt_input_buffer(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_odt_input_buff(l_mcs, l_attrs_odt_input_buffer.data()) );
+
+    l_attrs_odt_input_buffer[l_port_num] = 0x01;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_ODT_INPUT_BUFF,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_odt_input_buffer, PORTS_PER_MCS)),
+              "Failed setting attribute for ODT_INPUT_BUFF");
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for data_mask
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::data_mask(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_data_mask(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_data_mask(l_mcs, l_attrs_data_mask.data()) );
+
+    l_attrs_data_mask[l_port_num] = 0x00;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DATA_MASK,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_data_mask, PORTS_PER_MCS)),
+              "Failed setting attribute for DATA_MASK");
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for write_dbi
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::write_dbi(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_write_dbi(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_write_dbi(l_mcs, l_attrs_write_dbi.data()) );
+
+    l_attrs_write_dbi[l_port_num] = 0x00;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_WRITE_DBI,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_write_dbi, PORTS_PER_MCS)),
+              "Failed setting attribute for WRITE_DBI");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for read_dbi
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::read_dbi(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_read_dbi(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_read_dbi(l_mcs, l_attrs_read_dbi.data()) );
+
+    l_attrs_read_dbi[l_port_num] = 0x00;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_READ_DBI,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_read_dbi, PORTS_PER_MCS)),
+              "Failed setting attribute for READ_DBI");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for Post Package Repair
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::post_package_repair(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    uint8_t l_attrs_dram_ppr[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+    const auto l_dimm_num = index(i_target);
+
+    // Port level?
+    FAPI_TRY( eff_dram_ppr(l_mcs, &l_attrs_dram_ppr[0][0]) );
+
+    l_attrs_dram_ppr[l_port_num][l_dimm_num] = 0x00;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_PPR, l_mcs, l_attrs_dram_ppr),
+              "Failed setting attribute for DRAM_PPR");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for rd_preamble_train
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::read_preamble_train(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_rd_preamble_train(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_rd_preamble_train(l_mcs, l_attrs_rd_preamble_train.data()) );
+
+    l_attrs_rd_preamble_train[l_port_num] = 0x00;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_RD_PREAMBLE_TRAIN,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_rd_preamble_train, PORTS_PER_MCS)),
+              "Failed setting attribute for RD_PREAMBLE_TRAIN");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for rd_preamble
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::read_preamble(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_rd_preamble(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_rd_preamble(l_mcs, l_attrs_rd_preamble.data()) );
+
+    l_attrs_rd_preamble[l_port_num] = 0x00;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_RD_PREAMBLE,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_rd_preamble, PORTS_PER_MCS)),
+              "Failed setting attribute for RD_PREAMBLE");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for wr_preamble
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::write_preamble(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_wr_preamble(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_wr_preamble(l_mcs, l_attrs_wr_preamble.data()) );
+
+    l_attrs_wr_preamble[l_port_num] = 0x00;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_WR_PREAMBLE,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_wr_preamble, PORTS_PER_MCS)),
+              "Failed setting attribute for WR_PREAMBLE");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for self_ref_abort
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::self_refresh_abort(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_self_ref_abort(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_self_ref_abort(l_mcs, l_attrs_self_ref_abort.data()) );
+
+    l_attrs_self_ref_abort[l_port_num] = 0x00;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_SELF_REF_ABORT,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_self_ref_abort, PORTS_PER_MCS)),
+              "Failed setting attribute for SELF_REF_ABORT");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+
+///
+/// @brief Determines & sets effective config for cs_cmd_latency
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::cs_to_cmd_addr_latency(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_cs_cmd_latency(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_cs_cmd_latency(l_mcs, l_attrs_cs_cmd_latency.data()) );
+
+    l_attrs_cs_cmd_latency[l_port_num] = 0x00;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_CS_CMD_LATENCY,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_cs_cmd_latency, PORTS_PER_MCS)),
+              "Failed setting attribute for CS_CMD_LATENCY");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for int_vref_mon
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::internal_vref_monitor(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_int_vref_mon(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_internal_vref_monitor(l_mcs, l_attrs_int_vref_mon.data()) );
+
+    l_attrs_int_vref_mon[l_port_num] = 0x00;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_INTERNAL_VREF_MONITOR,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_int_vref_mon, PORTS_PER_MCS)),
+              "Failed setting attribute for INT_VREF_MON");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for powerdown_mode
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::max_powerdown_mode(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_powerdown_mode(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_max_powerdown_mode(l_mcs, l_attrs_powerdown_mode.data()) );
+
+    l_attrs_powerdown_mode[l_port_num] = 0x00;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_MAX_POWERDOWN_MODE,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_powerdown_mode, PORTS_PER_MCS)),
+              "Failed setting attribute for POWERDOWN_MODE");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for mpr_rd_format
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::mpr_read_format(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_mpr_rd_format(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_mpr_rd_format(l_mcs, l_attrs_mpr_rd_format.data()) );
+
+    l_attrs_mpr_rd_format[l_port_num] = 0x00;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_MPR_RD_FORMAT,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_mpr_rd_format, PORTS_PER_MCS)),
+              "Failed setting attribute for MPR_RD_FORMAT");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for CRC write latency
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::crc_wr_latency(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_crc_wr_latency(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_crc_wr_latency(l_mcs, l_attrs_crc_wr_latency.data()) );
+
+    l_attrs_crc_wr_latency[l_port_num] = 0x04;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_CRC_WR_LATENCY,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_crc_wr_latency, PORTS_PER_MCS)),
+              "Failed setting attribute for CRC WRITE LATENCY");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for temperature readout
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::temp_readout(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_temp_readout(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_temp_readout(l_mcs, l_attrs_temp_readout.data()) );
+
+    l_attrs_temp_readout[l_port_num] = 0x00;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_TEMP_READOUT,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_temp_readout, PORTS_PER_MCS)),
+              "Failed setting attribute for TEMP_READOUT");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for per DRAM addressability
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::per_dram_addressability(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_per_dram_access(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_per_dram_access(l_mcs, l_attrs_per_dram_access.data()) );
+
+    l_attrs_per_dram_access[l_port_num] = 0x00;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_PER_DRAM_ACCESS,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_per_dram_access, PORTS_PER_MCS)),
+              "Failed setting attribute for PER_DRAM_ACCESS");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for geardown mode
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::geardown_mode(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_geardown_mode(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_geardown_mode(l_mcs, l_attrs_geardown_mode.data()) );
+
+    l_attrs_geardown_mode[l_port_num] = 0x00;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_GEARDOWN_MODE,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_geardown_mode, PORTS_PER_MCS)),
+              "Failed setting attribute for GEARDOWN_MODE");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for MPR page
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::mpr_page(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_mpr_page(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_mpr_page(l_mcs, l_attrs_mpr_page.data()) );
+
+    l_attrs_mpr_page[l_port_num] = 0x00;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_MPR_PAGE,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_mpr_page, PORTS_PER_MCS)),
+              "Failed setting attribute for MPR_PAGE");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for MPR mode
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::mpr_mode(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_mpr_mode(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_mpr_mode(l_mcs, l_attrs_mpr_mode.data()) );
+
+    l_attrs_mpr_mode[l_port_num] = 0x00;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_MPR_MODE,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_mpr_mode, PORTS_PER_MCS)),
+              "Failed setting attribute for MPR_MODE");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for write CRC
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::write_crc(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint8_t> l_attrs_write_crc(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_write_crc(l_mcs, l_attrs_write_crc.data()) );
+
+    l_attrs_write_crc[l_port_num] = 0x00;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_WRITE_CRC,
+                            l_mcs,
+                            UINT8_VECTOR_TO_1D_ARRAY(l_attrs_write_crc, PORTS_PER_MCS)),
+              "Failed setting attribute for WRITE_CRC");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for RTT Write
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::rtt_write(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+
+    uint8_t l_attrs_rtt_wr[PORTS_PER_MCS][MAX_DIMM_PER_PORT][MAX_RANK_PER_DIMM] = {};
+    std::vector< uint64_t > l_ranks;
+
+    const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) );
+    const auto l_dimm_num = index(i_target);
+
+    // Attribute to set num dimm ranks is a pre-requisite
+    FAPI_TRY( eff_dram_rtt_wr(l_mcs, &l_attrs_rtt_wr[0][0][0]) );
+    FAPI_TRY( mss::ranks(i_target, l_ranks) );
+
+    for(const auto& l_rank : l_ranks)
+    {
+        l_attrs_rtt_wr[l_port_num][l_dimm_num][index(l_rank)] = 0x00;
+    }
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_RTT_WR, l_mcs, l_attrs_rtt_wr),
+              "Failed setting attribute for BL");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for ZQ Calibration
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::zqcal_interval(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint32_t> l_attrs_zqcal_interval(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_zqcal_interval(l_mcs, l_attrs_zqcal_interval.data()) );
+
+    l_attrs_zqcal_interval[l_port_num] = 0x00;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_ZQCAL_INTERVAL,
+                            l_mcs,
+                            UINT32_VECTOR_TO_1D_ARRAY(l_attrs_zqcal_interval, PORTS_PER_MCS)),
+              "Failed setting attribute for ZQCAL_INTERVAL");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Determines & sets effective config for MEMCAL Calibration
+/// @param[in] i_target FAPI2 target
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+///
+fapi2::ReturnCode eff_config::memcal_interval(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    // TK - RIT skeleton. Need to finish - AAM
+    std::vector<uint32_t> l_attrs_memcal_interval(PORTS_PER_MCS, 0);
+
+    // Targets
+    const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+    // Current index
+    const auto l_port_num = index(l_mca);
+
+    FAPI_TRY( eff_memcal_interval(l_mcs, l_attrs_memcal_interval.data()) );
+
+    l_attrs_memcal_interval[l_port_num] = 0x00;
+
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_MEMCAL_INTERVAL,
+                            l_mcs,
+                            UINT32_VECTOR_TO_1D_ARRAY(l_attrs_memcal_interval, PORTS_PER_MCS)),
+              "Failed setting attribute for MEMCAL_INTERVAL");
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
 }// mss
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.H b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.H
index 256d73144..577eea4a2 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.H
@@ -31,7 +31,7 @@
 
 #include <fapi2.H>
 #include <cstdint>
-#include <spd/spd_decoder.H>
+#include <lib/spd/spd_decoder.H>
 
 namespace mss
 {
@@ -42,13 +42,15 @@ namespace mss
 ///
 class eff_config
 {
-        // constructor
+    public:
+        std::shared_ptr<spd::decoder> iv_pDecoder;
+
+        // ctor
         eff_config() = default;
 
-        // destructor
+        // dtor
         ~eff_config() = default;
 
-    public:
         ////////////////////////
         // Methods
         ///////////////////////
@@ -56,11 +58,10 @@ class eff_config
         ///
         /// @brief Determines & sets effective config for DRAM generation from SPD
         /// @param[in] i_target FAPI2 target
-        /// @param[in] i_pDecoder shared pointer to decoder factory
         /// @return fapi2::FAPI2_RC_SUCCESS if okay
         ///
         fapi2::ReturnCode dram_gen(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
-                                   const std::shared_ptr<spd::decoder>& i_pDecoder);
+                                   const std::vector<uint8_t>& i_spd_data);
 
         ///
         /// @brief Determines & sets effective config for DIMM type
@@ -71,27 +72,623 @@ class eff_config
                                     const std::vector<uint8_t>& i_spd_data);
 
         ///
+        /// @brief Determines & sets effective config for primary stack type
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode primary_stack_type(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
         /// @brief Determines & sets effective config for Hybrid memory type from SPD
         /// @param[in] i_target FAPI2 target
-        /// @param[in] i_pDecoder shared pointer to decoder factory
         /// @return fapi2::FAPI2_RC_SUCCESS if okay
         ///
-        fapi2::ReturnCode hybrid_memory_type(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
-                                             const std::shared_ptr<spd::decoder>& i_pDecoder);
+        fapi2::ReturnCode hybrid_memory_type(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
 
+        ///
         /// @brief Determines & sets effective config for refresh interval time (tREFI)
         /// @param[in] i_target FAPI2 target
         /// @return fapi2::FAPI2_RC_SUCCESS if okay
         ///
         fapi2::ReturnCode refresh_interval_time(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
 
+        ///
         /// @brief Determines & sets effective config for refresh cycle time (tRFC)
         /// @param[in] i_target FAPI2 target
-        /// @param[in] i_pDecoder shared pointer to decoder factory
         /// @return fapi2::FAPI2_RC_SUCCESS if okay
         ///
-        fapi2::ReturnCode refresh_cycle_time(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
-                                             const std::shared_ptr<spd::decoder>& i_pDecoder);
+        fapi2::ReturnCode refresh_cycle_time(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for refresh cycle time (logical ranks) (tRFC_DLR)
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode refresh_cycle_time_dlr(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for dram density
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dram_density(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for dram width
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dram_width(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for dimm rcd mirror mode
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode rcd_mirror_mode(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for dimm size
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dimm_size(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for dram bank bits
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dram_bank_bits(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for dram row bits
+        ///  @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dram_row_bits(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for number of ranks per dimm
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode ranks_per_dimm(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for number of master ranks per dimm
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode master_ranks_per_dimm(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for custom dimm
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode custom_dimm(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for tDQS
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dram_dqs_time(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for ODT RD
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode odt_read(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for ODT WR
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode odt_write(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+        ///
+        /// @brief Determines & sets effective config for tCCD_L
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dram_tccd_l(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for RTT Park
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode rtt_park(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for DIMM RC00
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dimm_rc00(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for DIMM RC01
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dimm_rc01(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for DIMM RC02
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dimm_rc02(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for DIMM RC03
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dimm_rc03(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for DIMM RC04
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dimm_rc04(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for DIMM RC05
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dimm_rc05(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for DIMM RC06_07
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dimm_rc06_07(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for DIMM RC08
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dimm_rc08(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for DIMM RC09
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dimm_rc09(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for DIMM RC10
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dimm_rc10(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for DIMM RC11
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dimm_rc11(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for DIMM RC12
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dimm_rc12(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for DIMM RC13
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dimm_rc13(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for DIMM RC14
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dimm_rc14(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for DIMM RC15
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dimm_rc15(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for DIMM RC_1x
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dimm_rc1x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for DIMM RC_2x
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dimm_rc2x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for DIMM RC_3x
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dimm_rc3x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for DIMM RC_4x
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dimm_rc4x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for DIMM RC_5x
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dimm_rc5x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for DIMM RC_6x
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dimm_rc6x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for DIMM RC_7x
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dimm_rc7x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for DIMM RC_8x
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dimm_rc8x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for DIMM RC_9x
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dimm_rc9x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+
+        ///
+        /// @brief Determines & sets effective config for DIMM RC_AX
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dimm_rcax(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+
+        ///
+        /// @brief Determines & sets effective config for DIMM RC_BX
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dimm_rcbx(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for tWR
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dram_twr(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for burst length (BL)
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode burst_length(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for RBT
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode read_burst_type(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for TM
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dram_tm(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for cwl
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dram_cwl(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for lpasr
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dram_lpasr(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+
+        ///
+        /// @brief Determines & sets effective config for additive latency
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode additive_latency(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for DLL Reset
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dll_reset(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for DLL Enable
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dll_enable(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for RON
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode dram_ron(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for RTT NOM
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode rtt_nom(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for Write Level Enable
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode write_level_enable(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for Output Buffer
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode output_buffer(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+
+        ///
+        /// @brief Determines & sets effective config for Vref DQ Train Value
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode vref_dq_train_value(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for Vref DQ Train Enable
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode vref_dq_train_enable(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for Vref DQ Train Range
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode vref_dq_train_range(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for CA Parity Latency
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode ca_parity_latency(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for CA Parity
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode ca_parity(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for CRC Error Clear
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode crc_error_clear(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for CA Parity Error Status
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode ca_parity_error_status(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for ODT Input Buffer
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode odt_input_buffer(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for data_mask
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode data_mask(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for write_dbi
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode write_dbi(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for read_dbi
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode read_dbi(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for Post Package Repair
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode post_package_repair(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for rd_preamble_train
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode read_preamble_train(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for rd_preamble
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode read_preamble(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for wr_preamble
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode write_preamble(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for self_ref_abort
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode self_refresh_abort(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for cs_cmd_latency
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode cs_to_cmd_addr_latency(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for int_vref_mon
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode internal_vref_monitor(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for powerdown_mode
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode max_powerdown_mode(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for mpr_rd_format
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode mpr_read_format(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for CRC write latency
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode crc_wr_latency(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for temperature readout
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode temp_readout(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for per DRAM addressability
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode per_dram_addressability(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for geardown mode
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode geardown_mode(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for geardown mode
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode mpr_page(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for MPR mode
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode mpr_mode(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for write CRC
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode write_crc(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for RTT Write
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode rtt_write(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for ZQ Calibration
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode zqcal_interval(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
+
+        ///
+        /// @brief Determines & sets effective config for MEMCAL Calibration
+        /// @param[in] i_target FAPI2 target
+        /// @return fapi2::FAPI2_RC_SUCCESS if okay
+        ///
+        fapi2::ReturnCode memcal_interval(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
 
 };// eff_config
 
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.H b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.H
index f84fe7575..ec384ae66 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.H
@@ -82,7 +82,7 @@ inline T calc_timing_from_timebase(const T i_timing_mtb,
 template<typename T>
 inline T calc_nck(T timing_in_ps, T tck_in_ps, T inverse_corr_factor)
 {
-    // Preliminary nCK calculation, scaled by 1000
+    // Preliminary nCK calculation, scaled by 1000 per JDEC algorithm
     T temp_nck = timing_in_ps * 1000 / tck_in_ps;
 
     // Apply inverse of correction factor percentage
@@ -98,14 +98,12 @@ inline T calc_nck(T timing_in_ps, T tck_in_ps, T inverse_corr_factor)
 /// @param[out] o_tCK_in_ps application period in ps
 /// @return fapi2::FAPI2_RC_SUCCESS if okay
 ///
-template< typename T>
+template<typename T>
 inline fapi2::ReturnCode clock_period(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
                                       T& o_tCK_in_ps)
 {
     uint64_t l_dimm_transfer_rate = 0;
-
-    FAPI_TRY( freq(find_target<fapi2::TARGET_TYPE_MCBIST>(i_target),
-                   l_dimm_transfer_rate) );
+    FAPI_TRY( freq(find_target<fapi2::TARGET_TYPE_MCBIST>(i_target), l_dimm_transfer_rate) );
 
     o_tCK_in_ps = freq_to_ps(l_dimm_transfer_rate);
 
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/freq/cas_latency.C b/src/import/chips/p9/procedures/hwp/memory/lib/freq/cas_latency.C
index 5d5a0c8b8..62d782971 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/freq/cas_latency.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/freq/cas_latency.C
@@ -37,6 +37,7 @@
 #include <lib/utils/conversions.H>
 #include <lib/utils/fake_spd.H>
 #include <lib/eff_config/timing.H>
+#include <lib/utils/find.H>
 
 using fapi2::TARGET_TYPE_DIMM;
 using fapi2::TARGET_TYPE_MCS;
@@ -57,57 +58,63 @@ namespace mss
 cas_latency::cas_latency(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
                          const std::map<uint32_t, std::shared_ptr<spd::decoder> >& i_caches)
 {
+    iv_dimm_list_empty = false;
     iv_common_CL = UINT64_MAX; // Masks out supported CLs
     iv_largest_taamin = 0;
     iv_proposed_tck = 0;
 
-    for (const auto& l_port : i_target.getChildren<TARGET_TYPE_MCA>())
+    const auto l_dimm_list = find_targets<TARGET_TYPE_DIMM>(i_target);
+
+    if(l_dimm_list.empty())
+    {
+        iv_dimm_list_empty = true;
+        return;
+    }
+
+    for ( const auto& l_dimm : l_dimm_list )
     {
-        for (const auto& l_dimm : l_port.getChildren<TARGET_TYPE_DIMM>())
+        const auto l_dimm_pos = pos(l_dimm);
+
+        // Find decoder factory for this dimm position
+        auto l_it = i_caches.find(l_dimm_pos);
+        FAPI_TRY( check::spd::invalid_cache(l_dimm,
+                                            l_it != i_caches.end(),
+                                            l_dimm_pos),
+                  "Failed to get valid cache");
+
+        {
+            // Retrive timing values from the SPD
+            uint64_t l_tAAmin_in_ps = 0;
+            uint64_t l_tCKmax_in_ps = 0;
+            uint64_t l_tCKmin_in_ps = 0;
+
+            FAPI_TRY( get_taamin(l_dimm, l_it->second, l_tAAmin_in_ps),
+                      "Failed to get tAAmin");
+            FAPI_TRY( get_tckmax(l_dimm, l_it->second, l_tCKmax_in_ps),
+                      "Failed to get tCKmax" );
+            FAPI_TRY( get_tckmin(l_dimm, l_it->second, l_tCKmin_in_ps),
+                      "Failed to get tCKmin");
+
+            // Determine largest tAAmin value
+            iv_largest_taamin = std::max(iv_largest_taamin, l_tAAmin_in_ps);
+
+            // Determine a proposed tCK value that is greater than or equal tCKmin
+            // But less than tCKmax
+            iv_proposed_tck = std::max(iv_proposed_tck, l_tCKmin_in_ps);
+            iv_proposed_tck = std::min(iv_proposed_tck, l_tCKmax_in_ps);
+        }
+
         {
-            const auto& l_dimm_pos = pos(l_dimm);
-
-            // Find decoder factory for this dimm position
-            auto l_it = i_caches.find(l_dimm_pos);
-            FAPI_TRY( check::spd::invalid_cache(l_dimm,
-                                                l_it != i_caches.end(),
-                                                l_dimm_pos),
-                      "Failed to get valid cache");
-
-            {
-                // Retrive timing values from the SPD
-                uint64_t l_tAAmin_in_ps = 0;
-                uint64_t l_tCKmax_in_ps = 0;
-                uint64_t l_tCKmin_in_ps = 0;
-
-                FAPI_TRY( get_taamin(l_dimm, l_it->second, l_tAAmin_in_ps),
-                          "Failed to get tAAmin");
-                FAPI_TRY( get_tckmax(l_dimm, l_it->second, l_tCKmax_in_ps),
-                          "Failed to get tCKmax" );
-                FAPI_TRY( get_tckmin(l_dimm, l_it->second, l_tCKmin_in_ps),
-                          "Failed to get tCKmin");
-
-                // Determine largest tAAmin value
-                iv_largest_taamin = std::max(iv_largest_taamin, l_tAAmin_in_ps);
-
-                // Determine a proposed tCK value that is greater than or equal tCKmin
-                // But less than tCKmax
-                iv_proposed_tck = std::max(iv_proposed_tck, l_tCKmin_in_ps);
-                iv_proposed_tck = std::min(iv_proposed_tck, l_tCKmax_in_ps);
-            }
-
-            {
-                // Retrieve dimm supported cas latencies from SPD
-                uint64_t l_dimm_supported_CL = 0;
-                FAPI_TRY( l_it->second->supported_cas_latencies(l_dimm,
-                          l_dimm_supported_CL),
-                          "Failed to get supported CAS latency");
-
-                // ANDing bitmap from all modules creates a bitmap w/a common CL
-                iv_common_CL &= l_dimm_supported_CL;
-            }
-        }// dimm
-    }// port
+            // Retrieve dimm supported cas latencies from SPD
+            uint64_t l_dimm_supported_CL = 0;
+            FAPI_TRY( l_it->second->supported_cas_latencies(l_dimm,
+                      l_dimm_supported_CL),
+                      "Failed to get supported CAS latency");
+
+            // ANDing bitmap from all modules creates a bitmap w/a common CL
+            iv_common_CL &= l_dimm_supported_CL;
+        }
+    }// dimm
 
     // Why didn't I encapsulate common CL operations and checking in a function
     // like the timing params? Well, I want to check the "final" common CL and
@@ -141,24 +148,31 @@ fapi2::ReturnCode cas_latency::find_CL(const fapi2::Target<fapi2::TARGET_TYPE_MC
                                        uint64_t& o_cas_latency,
                                        uint64_t& o_tCK)
 {
-    // Create a vector filled with common CLs from buffer
-    std::vector<uint64_t> l_supported_CLs = create_common_cl_vector(iv_common_CL);
+    uint64_t l_desired_cas_latency = 0;
 
-    //For a proposed tCK value between tCKmin(all) and tCKmax, determine the desired CAS Latency.
-    uint64_t l_desired_cas_latency = calc_cas_latency(iv_largest_taamin, iv_proposed_tck);
+    if(!iv_dimm_list_empty)
+    {
+        // Create a vector filled with common CLs from buffer
+        std::vector<uint64_t> l_supported_CLs = create_common_cl_vector(iv_common_CL);
 
-    //Chose an actual CAS Latency (CLactual) that is greater than or equal to CLdesired
-    //and is supported by all modules on the memory channel
-    FAPI_TRY( choose_actual_CL(l_supported_CLs, iv_largest_taamin, iv_proposed_tck, l_desired_cas_latency),
-              "Failed choose_actual_CL()");
+        //For a proposed tCK value between tCKmin(all) and tCKmax, determine the desired CAS Latency.
+        l_desired_cas_latency = calc_cas_latency(iv_largest_taamin, iv_proposed_tck);
 
-    // Once the calculation of CLactual is completed, the BIOS must also
-    // verify that this CAS Latency value does not exceed tAAmax.
-    //If not, choose a lower CL value and repeat until a solution is found.
-    FAPI_TRY( validate_valid_CL(l_supported_CLs, iv_largest_taamin, iv_proposed_tck, l_desired_cas_latency),
-              "Failed validate_valid_CL()");
+        //Chose an actual CAS Latency (CLactual) that is greater than or equal to CLdesired
+        //and is supported by all modules on the memory channel
+        FAPI_TRY( choose_actual_CL(l_supported_CLs, iv_largest_taamin, iv_proposed_tck, l_desired_cas_latency),
+                  "Failed choose_actual_CL()");
+
+        // Once the calculation of CLactual is completed, the BIOS must also
+        // verify that this CAS Latency value does not exceed tAAmax.
+        //If not, choose a lower CL value and repeat until a solution is found.
+        FAPI_TRY( validate_valid_CL(l_supported_CLs, iv_largest_taamin, iv_proposed_tck, l_desired_cas_latency),
+                  "Failed validate_valid_CL()");
+    }
 
     // Update output values after all criteria is met
+    // If the MCS has no dimm configured than both
+    // l_desired_latency & iv_proposed_tck is 0 by initialization
     o_cas_latency = l_desired_cas_latency;
     o_tCK = iv_proposed_tck;
 
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/freq/cas_latency.H b/src/import/chips/p9/procedures/hwp/memory/lib/freq/cas_latency.H
index 381a6951e..5a8054fbe 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/freq/cas_latency.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/freq/cas_latency.H
@@ -65,6 +65,7 @@ enum constants : std::uint64_t
 class cas_latency
 {
     public:
+        bool iv_dimm_list_empty;
 
         /////////////////////////
         // Public Member Methods
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
index e84ae92f3..ae412f7e3 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
@@ -83,9 +83,8 @@ fapi_try_exit:
 /// of up to three DIMMs. Set by config file or an attribute writing program.
 /// Consumed by mss_freq. The default of AUTO means mss_freq will find the best
 /// frequencies given the DIMMs plugged in and other rules. Otherwise, this is the
-/// system frequency. firmware notes: Platforms should initialize this attribute to
-/// AUTO
-/// (0)
+/// system
+/// frequency.
 ///
 inline fapi2::ReturnCode freq_override(const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>& i_target, uint64_t& o_value)
 {
@@ -592,1322 +591,6 @@ fapi_try_exit:
 }
 
 ///
-/// @brief ATTR_EFF_PRIMARY_RANK_GROUP0 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_primary_rank_group0(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_PRIMARY_RANK_GROUP0, i_target.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(i_target)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_PRIMARY_RANK_GROUP0: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_PRIMARY_RANK_GROUP0 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D.1)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_primary_rank_group0(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-    auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_PRIMARY_RANK_GROUP0, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(l_mca)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_PRIMARY_RANK_GROUP0: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_PRIMARY_RANK_GROUP0 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (E)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_primary_rank_group0(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
-        uint8_t* o_array)
-{
-    if (o_array == nullptr)
-    {
-        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
-        return fapi2::FAPI2_RC_INVALID_PARAMETER;
-    }
-
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_PRIMARY_RANK_GROUP0, i_target, l_value) );
-    memcpy(o_array, &l_value, 2);
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_PRIMARY_RANK_GROUP0: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_PRIMARY_RANK_GROUP1 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_primary_rank_group1(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_PRIMARY_RANK_GROUP1, i_target.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(i_target)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_PRIMARY_RANK_GROUP1: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_PRIMARY_RANK_GROUP1 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D.1)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_primary_rank_group1(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-    auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_PRIMARY_RANK_GROUP1, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(l_mca)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_PRIMARY_RANK_GROUP1: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_PRIMARY_RANK_GROUP1 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (E)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_primary_rank_group1(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
-        uint8_t* o_array)
-{
-    if (o_array == nullptr)
-    {
-        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
-        return fapi2::FAPI2_RC_INVALID_PARAMETER;
-    }
-
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_PRIMARY_RANK_GROUP1, i_target, l_value) );
-    memcpy(o_array, &l_value, 2);
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_PRIMARY_RANK_GROUP1: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_PRIMARY_RANK_GROUP2 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_primary_rank_group2(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_PRIMARY_RANK_GROUP2, i_target.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(i_target)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_PRIMARY_RANK_GROUP2: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_PRIMARY_RANK_GROUP2 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D.1)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_primary_rank_group2(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-    auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_PRIMARY_RANK_GROUP2, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(l_mca)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_PRIMARY_RANK_GROUP2: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_PRIMARY_RANK_GROUP2 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (E)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_primary_rank_group2(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
-        uint8_t* o_array)
-{
-    if (o_array == nullptr)
-    {
-        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
-        return fapi2::FAPI2_RC_INVALID_PARAMETER;
-    }
-
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_PRIMARY_RANK_GROUP2, i_target, l_value) );
-    memcpy(o_array, &l_value, 2);
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_PRIMARY_RANK_GROUP2: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_PRIMARY_RANK_GROUP3 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_primary_rank_group3(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_PRIMARY_RANK_GROUP3, i_target.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(i_target)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_PRIMARY_RANK_GROUP3: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_PRIMARY_RANK_GROUP3 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D.1)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_primary_rank_group3(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-    auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_PRIMARY_RANK_GROUP3, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(l_mca)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_PRIMARY_RANK_GROUP3: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_PRIMARY_RANK_GROUP3 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (E)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_primary_rank_group3(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
-        uint8_t* o_array)
-{
-    if (o_array == nullptr)
-    {
-        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
-        return fapi2::FAPI2_RC_INVALID_PARAMETER;
-    }
-
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_PRIMARY_RANK_GROUP3, i_target, l_value) );
-    memcpy(o_array, &l_value, 2);
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_PRIMARY_RANK_GROUP3: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_SECONDARY_RANK_GROUP0 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_secondary_rank_group0(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SECONDARY_RANK_GROUP0, i_target.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(i_target)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_SECONDARY_RANK_GROUP0: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_SECONDARY_RANK_GROUP0 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D.1)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_secondary_rank_group0(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-    auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SECONDARY_RANK_GROUP0, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(l_mca)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_SECONDARY_RANK_GROUP0: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_SECONDARY_RANK_GROUP0 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (E)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_secondary_rank_group0(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
-        uint8_t* o_array)
-{
-    if (o_array == nullptr)
-    {
-        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
-        return fapi2::FAPI2_RC_INVALID_PARAMETER;
-    }
-
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SECONDARY_RANK_GROUP0, i_target, l_value) );
-    memcpy(o_array, &l_value, 2);
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_SECONDARY_RANK_GROUP0: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_SECONDARY_RANK_GROUP1 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_secondary_rank_group1(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SECONDARY_RANK_GROUP1, i_target.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(i_target)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_SECONDARY_RANK_GROUP1: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_SECONDARY_RANK_GROUP1 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D.1)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_secondary_rank_group1(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-    auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SECONDARY_RANK_GROUP1, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(l_mca)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_SECONDARY_RANK_GROUP1: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_SECONDARY_RANK_GROUP1 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (E)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_secondary_rank_group1(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
-        uint8_t* o_array)
-{
-    if (o_array == nullptr)
-    {
-        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
-        return fapi2::FAPI2_RC_INVALID_PARAMETER;
-    }
-
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SECONDARY_RANK_GROUP1, i_target, l_value) );
-    memcpy(o_array, &l_value, 2);
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_SECONDARY_RANK_GROUP1: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_SECONDARY_RANK_GROUP2 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_secondary_rank_group2(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SECONDARY_RANK_GROUP2, i_target.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(i_target)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_SECONDARY_RANK_GROUP2: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_SECONDARY_RANK_GROUP2 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D.1)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_secondary_rank_group2(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-    auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SECONDARY_RANK_GROUP2, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(l_mca)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_SECONDARY_RANK_GROUP2: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_SECONDARY_RANK_GROUP2 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (E)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_secondary_rank_group2(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
-        uint8_t* o_array)
-{
-    if (o_array == nullptr)
-    {
-        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
-        return fapi2::FAPI2_RC_INVALID_PARAMETER;
-    }
-
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SECONDARY_RANK_GROUP2, i_target, l_value) );
-    memcpy(o_array, &l_value, 2);
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_SECONDARY_RANK_GROUP2: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_SECONDARY_RANK_GROUP3 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_secondary_rank_group3(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SECONDARY_RANK_GROUP3, i_target.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(i_target)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_SECONDARY_RANK_GROUP3: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_SECONDARY_RANK_GROUP3 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D.1)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_secondary_rank_group3(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-    auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SECONDARY_RANK_GROUP3, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(l_mca)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_SECONDARY_RANK_GROUP3: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_SECONDARY_RANK_GROUP3 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (E)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_secondary_rank_group3(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
-        uint8_t* o_array)
-{
-    if (o_array == nullptr)
-    {
-        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
-        return fapi2::FAPI2_RC_INVALID_PARAMETER;
-    }
-
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_SECONDARY_RANK_GROUP3, i_target, l_value) );
-    memcpy(o_array, &l_value, 2);
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_SECONDARY_RANK_GROUP3: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_TERTIARY_RANK_GROUP0 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_tertiary_rank_group0(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_TERTIARY_RANK_GROUP0, i_target.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(i_target)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_TERTIARY_RANK_GROUP0: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_TERTIARY_RANK_GROUP0 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D.1)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_tertiary_rank_group0(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-    auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_TERTIARY_RANK_GROUP0, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(l_mca)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_TERTIARY_RANK_GROUP0: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_TERTIARY_RANK_GROUP0 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (E)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_tertiary_rank_group0(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
-        uint8_t* o_array)
-{
-    if (o_array == nullptr)
-    {
-        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
-        return fapi2::FAPI2_RC_INVALID_PARAMETER;
-    }
-
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_TERTIARY_RANK_GROUP0, i_target, l_value) );
-    memcpy(o_array, &l_value, 2);
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_TERTIARY_RANK_GROUP0: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_TERTIARY_RANK_GROUP1 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_tertiary_rank_group1(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_TERTIARY_RANK_GROUP1, i_target.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(i_target)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_TERTIARY_RANK_GROUP1: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_TERTIARY_RANK_GROUP1 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D.1)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_tertiary_rank_group1(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-    auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_TERTIARY_RANK_GROUP1, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(l_mca)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_TERTIARY_RANK_GROUP1: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_TERTIARY_RANK_GROUP1 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (E)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_tertiary_rank_group1(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
-        uint8_t* o_array)
-{
-    if (o_array == nullptr)
-    {
-        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
-        return fapi2::FAPI2_RC_INVALID_PARAMETER;
-    }
-
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_TERTIARY_RANK_GROUP1, i_target, l_value) );
-    memcpy(o_array, &l_value, 2);
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_TERTIARY_RANK_GROUP1: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_TERTIARY_RANK_GROUP2 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_tertiary_rank_group2(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_TERTIARY_RANK_GROUP2, i_target.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(i_target)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_TERTIARY_RANK_GROUP2: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_TERTIARY_RANK_GROUP2 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D.1)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_tertiary_rank_group2(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-    auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_TERTIARY_RANK_GROUP2, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(l_mca)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_TERTIARY_RANK_GROUP2: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_TERTIARY_RANK_GROUP2 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (E)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_tertiary_rank_group2(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
-        uint8_t* o_array)
-{
-    if (o_array == nullptr)
-    {
-        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
-        return fapi2::FAPI2_RC_INVALID_PARAMETER;
-    }
-
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_TERTIARY_RANK_GROUP2, i_target, l_value) );
-    memcpy(o_array, &l_value, 2);
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_TERTIARY_RANK_GROUP2: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_TERTIARY_RANK_GROUP3 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_tertiary_rank_group3(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_TERTIARY_RANK_GROUP3, i_target.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(i_target)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_TERTIARY_RANK_GROUP3: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_TERTIARY_RANK_GROUP3 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D.1)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_tertiary_rank_group3(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-    auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_TERTIARY_RANK_GROUP3, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(l_mca)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_TERTIARY_RANK_GROUP3: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_TERTIARY_RANK_GROUP3 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (E)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_tertiary_rank_group3(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
-        uint8_t* o_array)
-{
-    if (o_array == nullptr)
-    {
-        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
-        return fapi2::FAPI2_RC_INVALID_PARAMETER;
-    }
-
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_TERTIARY_RANK_GROUP3, i_target, l_value) );
-    memcpy(o_array, &l_value, 2);
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_TERTIARY_RANK_GROUP3: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_QUATERNARY_RANK_GROUP0 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_quaternary_rank_group0(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_QUATERNARY_RANK_GROUP0, i_target.getParent<fapi2::TARGET_TYPE_MCS>(),
-                            l_value) );
-    o_value = l_value[mss::index(i_target)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_QUATERNARY_RANK_GROUP0: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_QUATERNARY_RANK_GROUP0 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D.1)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_quaternary_rank_group0(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-    auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_QUATERNARY_RANK_GROUP0, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(l_mca)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_QUATERNARY_RANK_GROUP0: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_QUATERNARY_RANK_GROUP0 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (E)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_quaternary_rank_group0(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
-        uint8_t* o_array)
-{
-    if (o_array == nullptr)
-    {
-        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
-        return fapi2::FAPI2_RC_INVALID_PARAMETER;
-    }
-
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_QUATERNARY_RANK_GROUP0, i_target, l_value) );
-    memcpy(o_array, &l_value, 2);
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_QUATERNARY_RANK_GROUP0: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_QUATERNARY_RANK_GROUP1 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_quaternary_rank_group1(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_QUATERNARY_RANK_GROUP1, i_target.getParent<fapi2::TARGET_TYPE_MCS>(),
-                            l_value) );
-    o_value = l_value[mss::index(i_target)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_QUATERNARY_RANK_GROUP1: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_QUATERNARY_RANK_GROUP1 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D.1)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_quaternary_rank_group1(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-    auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_QUATERNARY_RANK_GROUP1, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(l_mca)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_QUATERNARY_RANK_GROUP1: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_QUATERNARY_RANK_GROUP1 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (E)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_quaternary_rank_group1(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
-        uint8_t* o_array)
-{
-    if (o_array == nullptr)
-    {
-        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
-        return fapi2::FAPI2_RC_INVALID_PARAMETER;
-    }
-
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_QUATERNARY_RANK_GROUP1, i_target, l_value) );
-    memcpy(o_array, &l_value, 2);
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_QUATERNARY_RANK_GROUP1: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_QUATERNARY_RANK_GROUP2 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_quaternary_rank_group2(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_QUATERNARY_RANK_GROUP2, i_target.getParent<fapi2::TARGET_TYPE_MCS>(),
-                            l_value) );
-    o_value = l_value[mss::index(i_target)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_QUATERNARY_RANK_GROUP2: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_QUATERNARY_RANK_GROUP2 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D.1)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_quaternary_rank_group2(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-    auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_QUATERNARY_RANK_GROUP2, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(l_mca)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_QUATERNARY_RANK_GROUP2: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_QUATERNARY_RANK_GROUP2 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (E)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_quaternary_rank_group2(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
-        uint8_t* o_array)
-{
-    if (o_array == nullptr)
-    {
-        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
-        return fapi2::FAPI2_RC_INVALID_PARAMETER;
-    }
-
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_QUATERNARY_RANK_GROUP2, i_target, l_value) );
-    memcpy(o_array, &l_value, 2);
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_QUATERNARY_RANK_GROUP2: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_QUATERNARY_RANK_GROUP3 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_quaternary_rank_group3(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_QUATERNARY_RANK_GROUP3, i_target.getParent<fapi2::TARGET_TYPE_MCS>(),
-                            l_value) );
-    o_value = l_value[mss::index(i_target)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_QUATERNARY_RANK_GROUP3: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_QUATERNARY_RANK_GROUP3 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D.1)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_quaternary_rank_group3(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
-        uint8_t& o_value)
-{
-    uint8_t l_value[2];
-    auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_QUATERNARY_RANK_GROUP3, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(l_mca)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_QUATERNARY_RANK_GROUP3: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_QUATERNARY_RANK_GROUP3 getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (E)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-/// creator: mss_eff_cnfg_rank_group consumer: various firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_quaternary_rank_group3(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
-        uint8_t* o_array)
-{
-    if (o_array == nullptr)
-    {
-        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
-        return fapi2::FAPI2_RC_INVALID_PARAMETER;
-    }
-
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_QUATERNARY_RANK_GROUP3, i_target, l_value) );
-    memcpy(o_array, &l_value, 2);
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_QUATERNARY_RANK_GROUP3: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
 /// @brief ATTR_EFF_DIMM_SPARE getter
 /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
 /// @param[out] uint8_t* memory to store the value
@@ -2348,7 +1031,7 @@ fapi_try_exit:
 /// firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dram_burst_length(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t& o_value)
+inline fapi2::ReturnCode eff_dram_bl(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t& o_value)
 {
     uint8_t l_value[2];
 
@@ -2373,7 +1056,7 @@ fapi_try_exit:
 /// firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dram_burst_length(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
+inline fapi2::ReturnCode eff_dram_bl(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
 {
     uint8_t l_value[2];
     auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
@@ -2399,7 +1082,7 @@ fapi_try_exit:
 /// firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dram_burst_length(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_dram_bl(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -2429,7 +1112,7 @@ fapi_try_exit:
 /// various firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dram_cas_latency(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t& o_value)
+inline fapi2::ReturnCode eff_dram_cl(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t& o_value)
 {
     uint8_t l_value[2];
 
@@ -2453,7 +1136,7 @@ fapi_try_exit:
 /// various firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dram_cas_latency(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
+inline fapi2::ReturnCode eff_dram_cl(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
 {
     uint8_t l_value[2];
     auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
@@ -2478,7 +1161,7 @@ fapi_try_exit:
 /// various firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dram_cas_latency(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_dram_cl(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -2673,8 +1356,7 @@ fapi_try_exit:
 /// firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dram_read_burst_type(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
-        uint8_t& o_value)
+inline fapi2::ReturnCode eff_dram_rbt(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
 {
     uint8_t l_value[2][2];
     auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
@@ -2701,8 +1383,7 @@ fapi_try_exit:
 /// firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dram_read_burst_type(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
-        uint8_t* o_array)
+inline fapi2::ReturnCode eff_dram_rbt(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -2734,8 +1415,7 @@ fapi_try_exit:
 /// firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dram_read_burst_type(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
-        uint8_t* o_array)
+inline fapi2::ReturnCode eff_dram_rbt(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -4270,7 +2950,7 @@ fapi_try_exit:
 /// consumer: mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc67(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc06_07(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
 {
     uint8_t l_value[2][2];
     auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
@@ -4297,7 +2977,7 @@ fapi_try_exit:
 /// consumer: mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc67(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc06_07(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -4329,7 +3009,7 @@ fapi_try_exit:
 /// consumer: mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc67(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc06_07(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -5092,7 +3772,7 @@ fapi_try_exit:
 /// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc1x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_1x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
 {
     uint8_t l_value[2][2];
     auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
@@ -5119,7 +3799,7 @@ fapi_try_exit:
 /// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc1x(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_1x(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -5151,7 +3831,7 @@ fapi_try_exit:
 /// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc1x(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_1x(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -5182,7 +3862,7 @@ fapi_try_exit:
 /// mss_eff_cnfg consumer: mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc2x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_2x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
 {
     uint8_t l_value[2][2];
     auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
@@ -5209,7 +3889,7 @@ fapi_try_exit:
 /// mss_eff_cnfg consumer: mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc2x(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_2x(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -5241,7 +3921,7 @@ fapi_try_exit:
 /// mss_eff_cnfg consumer: mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc2x(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_2x(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -5272,7 +3952,7 @@ fapi_try_exit:
 /// mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc3x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_3x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
 {
     uint8_t l_value[2][2];
     auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
@@ -5299,7 +3979,7 @@ fapi_try_exit:
 /// mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc3x(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_3x(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -5331,7 +4011,7 @@ fapi_try_exit:
 /// mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc3x(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_3x(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -5362,7 +4042,7 @@ fapi_try_exit:
 /// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc4x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_4x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
 {
     uint8_t l_value[2][2];
     auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
@@ -5389,7 +4069,7 @@ fapi_try_exit:
 /// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc4x(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_4x(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -5421,7 +4101,7 @@ fapi_try_exit:
 /// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc4x(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_4x(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -5453,7 +4133,7 @@ fapi_try_exit:
 /// mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc5x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_5x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
 {
     uint8_t l_value[2][2];
     auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
@@ -5481,7 +4161,7 @@ fapi_try_exit:
 /// mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc5x(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_5x(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -5514,7 +4194,7 @@ fapi_try_exit:
 /// mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc5x(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_5x(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -5545,7 +4225,7 @@ fapi_try_exit:
 /// mss_eff_cnfg consumer: mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc6x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_6x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
 {
     uint8_t l_value[2][2];
     auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
@@ -5572,7 +4252,7 @@ fapi_try_exit:
 /// mss_eff_cnfg consumer: mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc6x(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_6x(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -5604,7 +4284,7 @@ fapi_try_exit:
 /// mss_eff_cnfg consumer: mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc6x(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_6x(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -5635,7 +4315,7 @@ fapi_try_exit:
 /// mss_eff_cnfg consumer: mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc7x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_7x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
 {
     uint8_t l_value[2][2];
     auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
@@ -5662,7 +4342,7 @@ fapi_try_exit:
 /// mss_eff_cnfg consumer: mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc7x(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_7x(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -5694,7 +4374,7 @@ fapi_try_exit:
 /// mss_eff_cnfg consumer: mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc7x(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_7x(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -5726,7 +4406,7 @@ fapi_try_exit:
 /// mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc8x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_8x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
 {
     uint8_t l_value[2][2];
     auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
@@ -5754,7 +4434,7 @@ fapi_try_exit:
 /// mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc8x(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_8x(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -5787,7 +4467,7 @@ fapi_try_exit:
 /// mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc8x(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_8x(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -5818,7 +4498,7 @@ fapi_try_exit:
 /// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc9x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_9x(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
 {
     uint8_t l_value[2][2];
     auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
@@ -5845,7 +4525,7 @@ fapi_try_exit:
 /// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc9x(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_9x(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -5877,7 +4557,7 @@ fapi_try_exit:
 /// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rc9x(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_9x(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -5908,7 +4588,7 @@ fapi_try_exit:
 /// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rcax(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_ax(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
 {
     uint8_t l_value[2][2];
     auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
@@ -5935,7 +4615,7 @@ fapi_try_exit:
 /// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rcax(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_ax(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -5967,7 +4647,7 @@ fapi_try_exit:
 /// value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rcax(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_ax(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -5998,7 +4678,7 @@ fapi_try_exit:
 /// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rcbx(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_bx(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
 {
     uint8_t l_value[2][2];
     auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
@@ -6025,7 +4705,7 @@ fapi_try_exit:
 /// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rcbx(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_bx(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -6057,7 +4737,7 @@ fapi_try_exit:
 /// creator: mss_eff_cnfg consumer: mss_dram_init firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dimm_ddr4_rcbx(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_dimm_ddr4_rc_bx(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -8953,48 +7633,6 @@ fapi_try_exit:
 }
 
 ///
-/// @brief ATTR_MSS_PREFETCH_ENABLE getter
-/// @param[out] uint8_t& reference to store the value
-/// @note Generated by gen_accessors.pl generateParameters (SYSTEM)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  Value of on or off. Determines if prefetching enabled or not. See chapter 7 of
-/// the Centaur
-/// Workbook.
-///
-inline fapi2::ReturnCode prefetch_enable(uint8_t& o_value)
-{
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_PREFETCH_ENABLE, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), o_value) );
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_MSS_PREFETCH_ENABLE: 0x%lx (system target)",
-             uint64_t(fapi2::current_err));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_MSS_CLEANER_ENABLE getter
-/// @param[out] uint8_t& reference to store the value
-/// @note Generated by gen_accessors.pl generateParameters (SYSTEM)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  Value of on or off. Determines if the cleaner of the L4 cache (write modified
-/// entries to memory on idle cycles) enabled or not. See chapter 7 of the Centaur
-/// Workbook.
-///
-inline fapi2::ReturnCode cleaner_enable(uint8_t& o_value)
-{
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_CLEANER_ENABLE, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), o_value) );
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_MSS_CLEANER_ENABLE: 0x%lx (system target)",
-             uint64_t(fapi2::current_err));
-    return fapi2::current_err;
-}
-
-///
 /// @brief ATTR_MSS_EFF_DIMM_FUNCTIONAL_VECTOR getter
 /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
 /// @param[out] ref to the value uint8_t
@@ -9754,7 +8392,7 @@ fapi_try_exit:
 }
 
 ///
-/// @brief ATTR_EFF_TEMP_REF_MODE getter
+/// @brief ATTR_EFF_TEMP_REFRESH_MODE getter
 /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
 /// @param[out] ref to the value uint8_t
 /// @note Generated by gen_accessors.pl generateParameters (D)
@@ -9764,22 +8402,22 @@ fapi_try_exit:
 /// firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_temp_ref_mode(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t& o_value)
+inline fapi2::ReturnCode eff_temp_refresh_mode(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t& o_value)
 {
     uint8_t l_value[2];
 
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_TEMP_REF_MODE, i_target.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_TEMP_REFRESH_MODE, i_target.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
     o_value = l_value[mss::index(i_target)];
     return fapi2::current_err;
 
 fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_TEMP_REF_MODE: 0x%lx (target: %s)",
+    FAPI_ERR("failed accessing ATTR_EFF_TEMP_REFRESH_MODE: 0x%lx (target: %s)",
              uint64_t(fapi2::current_err), mss::c_str(i_target));
     return fapi2::current_err;
 }
 
 ///
-/// @brief ATTR_EFF_TEMP_REF_MODE getter
+/// @brief ATTR_EFF_TEMP_REFRESH_MODE getter
 /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
 /// @param[out] ref to the value uint8_t
 /// @note Generated by gen_accessors.pl generateParameters (D.1)
@@ -9789,23 +8427,23 @@ fapi_try_exit:
 /// firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_temp_ref_mode(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
+inline fapi2::ReturnCode eff_temp_refresh_mode(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
 {
     uint8_t l_value[2];
     auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
 
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_TEMP_REF_MODE, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_TEMP_REFRESH_MODE, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
     o_value = l_value[mss::index(l_mca)];
     return fapi2::current_err;
 
 fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_TEMP_REF_MODE: 0x%lx (target: %s)",
+    FAPI_ERR("failed accessing ATTR_EFF_TEMP_REFRESH_MODE: 0x%lx (target: %s)",
              uint64_t(fapi2::current_err), mss::c_str(i_target));
     return fapi2::current_err;
 }
 
 ///
-/// @brief ATTR_EFF_TEMP_REF_MODE getter
+/// @brief ATTR_EFF_TEMP_REFRESH_MODE getter
 /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
 /// @param[out] uint8_t* memory to store the value
 /// @note Generated by gen_accessors.pl generateParameters (E)
@@ -9815,7 +8453,7 @@ fapi_try_exit:
 /// firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_temp_ref_mode(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_temp_refresh_mode(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -9825,18 +8463,18 @@ inline fapi2::ReturnCode eff_temp_ref_mode(const fapi2::Target<fapi2::TARGET_TYP
 
     uint8_t l_value[2];
 
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_TEMP_REF_MODE, i_target, l_value) );
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_TEMP_REFRESH_MODE, i_target, l_value) );
     memcpy(o_array, &l_value, 2);
     return fapi2::current_err;
 
 fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_TEMP_REF_MODE: 0x%lx (target: %s)",
+    FAPI_ERR("failed accessing ATTR_EFF_TEMP_REFRESH_MODE: 0x%lx (target: %s)",
              uint64_t(fapi2::current_err), mss::c_str(i_target));
     return fapi2::current_err;
 }
 
 ///
-/// @brief ATTR_EFF_INT_VREF_MON getter
+/// @brief ATTR_EFF_INTERNAL_VREF_MONITOR getter
 /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
 /// @param[out] ref to the value uint8_t
 /// @note Generated by gen_accessors.pl generateParameters (D)
@@ -9846,22 +8484,23 @@ fapi_try_exit:
 /// firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_int_vref_mon(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t& o_value)
+inline fapi2::ReturnCode eff_internal_vref_monitor(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
+        uint8_t& o_value)
 {
     uint8_t l_value[2];
 
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_INT_VREF_MON, i_target.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_INTERNAL_VREF_MONITOR, i_target.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
     o_value = l_value[mss::index(i_target)];
     return fapi2::current_err;
 
 fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_INT_VREF_MON: 0x%lx (target: %s)",
+    FAPI_ERR("failed accessing ATTR_EFF_INTERNAL_VREF_MONITOR: 0x%lx (target: %s)",
              uint64_t(fapi2::current_err), mss::c_str(i_target));
     return fapi2::current_err;
 }
 
 ///
-/// @brief ATTR_EFF_INT_VREF_MON getter
+/// @brief ATTR_EFF_INTERNAL_VREF_MONITOR getter
 /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
 /// @param[out] ref to the value uint8_t
 /// @note Generated by gen_accessors.pl generateParameters (D.1)
@@ -9871,23 +8510,24 @@ fapi_try_exit:
 /// firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_int_vref_mon(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
+inline fapi2::ReturnCode eff_internal_vref_monitor(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+        uint8_t& o_value)
 {
     uint8_t l_value[2];
     auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
 
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_INT_VREF_MON, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_INTERNAL_VREF_MONITOR, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
     o_value = l_value[mss::index(l_mca)];
     return fapi2::current_err;
 
 fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_INT_VREF_MON: 0x%lx (target: %s)",
+    FAPI_ERR("failed accessing ATTR_EFF_INTERNAL_VREF_MONITOR: 0x%lx (target: %s)",
              uint64_t(fapi2::current_err), mss::c_str(i_target));
     return fapi2::current_err;
 }
 
 ///
-/// @brief ATTR_EFF_INT_VREF_MON getter
+/// @brief ATTR_EFF_INTERNAL_VREF_MONITOR getter
 /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
 /// @param[out] uint8_t* memory to store the value
 /// @note Generated by gen_accessors.pl generateParameters (E)
@@ -9897,7 +8537,8 @@ fapi_try_exit:
 /// firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_int_vref_mon(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_internal_vref_monitor(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
+        uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -9907,12 +8548,12 @@ inline fapi2::ReturnCode eff_int_vref_mon(const fapi2::Target<fapi2::TARGET_TYPE
 
     uint8_t l_value[2];
 
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_INT_VREF_MON, i_target, l_value) );
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_INTERNAL_VREF_MONITOR, i_target, l_value) );
     memcpy(o_array, &l_value, 2);
     return fapi2::current_err;
 
 fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_INT_VREF_MON: 0x%lx (target: %s)",
+    FAPI_ERR("failed accessing ATTR_EFF_INTERNAL_VREF_MONITOR: 0x%lx (target: %s)",
              uint64_t(fapi2::current_err), mss::c_str(i_target));
     return fapi2::current_err;
 }
@@ -11075,7 +9716,7 @@ fapi_try_exit:
 }
 
 ///
-/// @brief ATTR_VREF_DQ_TRAIN_VALUE getter
+/// @brief ATTR_EFF_VREF_DQ_TRAIN_VALUE getter
 /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
 /// @param[out] uint8_t* memory to store the value
 /// @note Generated by gen_accessors.pl generateParameters (A)
@@ -11085,7 +9726,8 @@ fapi_try_exit:
 /// notes:
 /// none
 ///
-inline fapi2::ReturnCode vref_dq_train_value(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_vref_dq_train_value(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+        uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -11097,18 +9739,18 @@ inline fapi2::ReturnCode vref_dq_train_value(const fapi2::Target<fapi2::TARGET_T
     auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
     auto l_mcs = l_mca.getParent<fapi2::TARGET_TYPE_MCS>();
 
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_VREF_DQ_TRAIN_VALUE, l_mcs, l_value) );
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_VREF_DQ_TRAIN_VALUE, l_mcs, l_value) );
     memcpy(o_array, &(l_value[mss::index(l_mca)][mss::index(i_target)][0]), 4);
     return fapi2::current_err;
 
 fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_VREF_DQ_TRAIN_VALUE: 0x%lx (target: %s)",
+    FAPI_ERR("failed accessing ATTR_EFF_VREF_DQ_TRAIN_VALUE: 0x%lx (target: %s)",
              uint64_t(fapi2::current_err), mss::c_str(i_target));
     return fapi2::current_err;
 }
 
 ///
-/// @brief ATTR_VREF_DQ_TRAIN_VALUE getter
+/// @brief ATTR_EFF_VREF_DQ_TRAIN_VALUE getter
 /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
 /// @param[out] uint8_t* memory to store the value
 /// @note Generated by gen_accessors.pl generateParameters (B)
@@ -11118,7 +9760,8 @@ fapi_try_exit:
 /// notes:
 /// none
 ///
-inline fapi2::ReturnCode vref_dq_train_value(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_vref_dq_train_value(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
+        uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -11129,18 +9772,18 @@ inline fapi2::ReturnCode vref_dq_train_value(const fapi2::Target<fapi2::TARGET_T
     uint8_t l_value[2][2][4];
     auto l_mcs = i_target.getParent<fapi2::TARGET_TYPE_MCS>();
 
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_VREF_DQ_TRAIN_VALUE, l_mcs, l_value) );
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_VREF_DQ_TRAIN_VALUE, l_mcs, l_value) );
     memcpy(o_array, &(l_value[mss::index(i_target)][0]), 8);
     return fapi2::current_err;
 
 fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_VREF_DQ_TRAIN_VALUE: 0x%lx (target: %s)",
+    FAPI_ERR("failed accessing ATTR_EFF_VREF_DQ_TRAIN_VALUE: 0x%lx (target: %s)",
              uint64_t(fapi2::current_err), mss::c_str(i_target));
     return fapi2::current_err;
 }
 
 ///
-/// @brief ATTR_VREF_DQ_TRAIN_VALUE getter
+/// @brief ATTR_EFF_VREF_DQ_TRAIN_VALUE getter
 /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
 /// @param[out] uint8_t* memory to store the value
 /// @note Generated by gen_accessors.pl generateParameters (C)
@@ -11150,7 +9793,8 @@ fapi_try_exit:
 /// notes:
 /// none
 ///
-inline fapi2::ReturnCode vref_dq_train_value(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_vref_dq_train_value(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
+        uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -11160,18 +9804,18 @@ inline fapi2::ReturnCode vref_dq_train_value(const fapi2::Target<fapi2::TARGET_T
 
     uint8_t l_value[2][2][4];
 
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_VREF_DQ_TRAIN_VALUE, i_target, l_value) );
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_VREF_DQ_TRAIN_VALUE, i_target, l_value) );
     memcpy(o_array, &l_value, 16);
     return fapi2::current_err;
 
 fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_VREF_DQ_TRAIN_VALUE: 0x%lx (target: %s)",
+    FAPI_ERR("failed accessing ATTR_EFF_VREF_DQ_TRAIN_VALUE: 0x%lx (target: %s)",
              uint64_t(fapi2::current_err), mss::c_str(i_target));
     return fapi2::current_err;
 }
 
 ///
-/// @brief ATTR_VREF_DQ_TRAIN_RANGE getter
+/// @brief ATTR_EFF_VREF_DQ_TRAIN_RANGE getter
 /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
 /// @param[out] uint8_t* memory to store the value
 /// @note Generated by gen_accessors.pl generateParameters (A)
@@ -11181,7 +9825,8 @@ fapi_try_exit:
 /// notes:
 /// none
 ///
-inline fapi2::ReturnCode vref_dq_train_range(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_vref_dq_train_range(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+        uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -11193,18 +9838,18 @@ inline fapi2::ReturnCode vref_dq_train_range(const fapi2::Target<fapi2::TARGET_T
     auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
     auto l_mcs = l_mca.getParent<fapi2::TARGET_TYPE_MCS>();
 
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_VREF_DQ_TRAIN_RANGE, l_mcs, l_value) );
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_VREF_DQ_TRAIN_RANGE, l_mcs, l_value) );
     memcpy(o_array, &(l_value[mss::index(l_mca)][mss::index(i_target)][0]), 4);
     return fapi2::current_err;
 
 fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_VREF_DQ_TRAIN_RANGE: 0x%lx (target: %s)",
+    FAPI_ERR("failed accessing ATTR_EFF_VREF_DQ_TRAIN_RANGE: 0x%lx (target: %s)",
              uint64_t(fapi2::current_err), mss::c_str(i_target));
     return fapi2::current_err;
 }
 
 ///
-/// @brief ATTR_VREF_DQ_TRAIN_RANGE getter
+/// @brief ATTR_EFF_VREF_DQ_TRAIN_RANGE getter
 /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
 /// @param[out] uint8_t* memory to store the value
 /// @note Generated by gen_accessors.pl generateParameters (B)
@@ -11214,7 +9859,8 @@ fapi_try_exit:
 /// notes:
 /// none
 ///
-inline fapi2::ReturnCode vref_dq_train_range(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_vref_dq_train_range(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
+        uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -11225,18 +9871,18 @@ inline fapi2::ReturnCode vref_dq_train_range(const fapi2::Target<fapi2::TARGET_T
     uint8_t l_value[2][2][4];
     auto l_mcs = i_target.getParent<fapi2::TARGET_TYPE_MCS>();
 
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_VREF_DQ_TRAIN_RANGE, l_mcs, l_value) );
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_VREF_DQ_TRAIN_RANGE, l_mcs, l_value) );
     memcpy(o_array, &(l_value[mss::index(i_target)][0]), 8);
     return fapi2::current_err;
 
 fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_VREF_DQ_TRAIN_RANGE: 0x%lx (target: %s)",
+    FAPI_ERR("failed accessing ATTR_EFF_VREF_DQ_TRAIN_RANGE: 0x%lx (target: %s)",
              uint64_t(fapi2::current_err), mss::c_str(i_target));
     return fapi2::current_err;
 }
 
 ///
-/// @brief ATTR_VREF_DQ_TRAIN_RANGE getter
+/// @brief ATTR_EFF_VREF_DQ_TRAIN_RANGE getter
 /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
 /// @param[out] uint8_t* memory to store the value
 /// @note Generated by gen_accessors.pl generateParameters (C)
@@ -11246,7 +9892,8 @@ fapi_try_exit:
 /// notes:
 /// none
 ///
-inline fapi2::ReturnCode vref_dq_train_range(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_vref_dq_train_range(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
+        uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -11256,18 +9903,18 @@ inline fapi2::ReturnCode vref_dq_train_range(const fapi2::Target<fapi2::TARGET_T
 
     uint8_t l_value[2][2][4];
 
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_VREF_DQ_TRAIN_RANGE, i_target, l_value) );
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_VREF_DQ_TRAIN_RANGE, i_target, l_value) );
     memcpy(o_array, &l_value, 16);
     return fapi2::current_err;
 
 fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_VREF_DQ_TRAIN_RANGE: 0x%lx (target: %s)",
+    FAPI_ERR("failed accessing ATTR_EFF_VREF_DQ_TRAIN_RANGE: 0x%lx (target: %s)",
              uint64_t(fapi2::current_err), mss::c_str(i_target));
     return fapi2::current_err;
 }
 
 ///
-/// @brief ATTR_VREF_DQ_TRAIN_ENABLE getter
+/// @brief ATTR_EFF_VREF_DQ_TRAIN_ENABLE getter
 /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
 /// @param[out] uint8_t* memory to store the value
 /// @note Generated by gen_accessors.pl generateParameters (A)
@@ -11277,7 +9924,8 @@ fapi_try_exit:
 /// Firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode vref_dq_train_enable(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_vref_dq_train_enable(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+        uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -11289,18 +9937,18 @@ inline fapi2::ReturnCode vref_dq_train_enable(const fapi2::Target<fapi2::TARGET_
     auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
     auto l_mcs = l_mca.getParent<fapi2::TARGET_TYPE_MCS>();
 
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_VREF_DQ_TRAIN_ENABLE, l_mcs, l_value) );
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_VREF_DQ_TRAIN_ENABLE, l_mcs, l_value) );
     memcpy(o_array, &(l_value[mss::index(l_mca)][mss::index(i_target)][0]), 4);
     return fapi2::current_err;
 
 fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_VREF_DQ_TRAIN_ENABLE: 0x%lx (target: %s)",
+    FAPI_ERR("failed accessing ATTR_EFF_VREF_DQ_TRAIN_ENABLE: 0x%lx (target: %s)",
              uint64_t(fapi2::current_err), mss::c_str(i_target));
     return fapi2::current_err;
 }
 
 ///
-/// @brief ATTR_VREF_DQ_TRAIN_ENABLE getter
+/// @brief ATTR_EFF_VREF_DQ_TRAIN_ENABLE getter
 /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
 /// @param[out] uint8_t* memory to store the value
 /// @note Generated by gen_accessors.pl generateParameters (B)
@@ -11310,7 +9958,8 @@ fapi_try_exit:
 /// Firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode vref_dq_train_enable(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_vref_dq_train_enable(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
+        uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -11321,18 +9970,18 @@ inline fapi2::ReturnCode vref_dq_train_enable(const fapi2::Target<fapi2::TARGET_
     uint8_t l_value[2][2][4];
     auto l_mcs = i_target.getParent<fapi2::TARGET_TYPE_MCS>();
 
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_VREF_DQ_TRAIN_ENABLE, l_mcs, l_value) );
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_VREF_DQ_TRAIN_ENABLE, l_mcs, l_value) );
     memcpy(o_array, &(l_value[mss::index(i_target)][0]), 8);
     return fapi2::current_err;
 
 fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_VREF_DQ_TRAIN_ENABLE: 0x%lx (target: %s)",
+    FAPI_ERR("failed accessing ATTR_EFF_VREF_DQ_TRAIN_ENABLE: 0x%lx (target: %s)",
              uint64_t(fapi2::current_err), mss::c_str(i_target));
     return fapi2::current_err;
 }
 
 ///
-/// @brief ATTR_VREF_DQ_TRAIN_ENABLE getter
+/// @brief ATTR_EFF_VREF_DQ_TRAIN_ENABLE getter
 /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
 /// @param[out] uint8_t* memory to store the value
 /// @note Generated by gen_accessors.pl generateParameters (C)
@@ -11342,7 +9991,8 @@ fapi_try_exit:
 /// Firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode vref_dq_train_enable(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_vref_dq_train_enable(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
+        uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -11352,12 +10002,12 @@ inline fapi2::ReturnCode vref_dq_train_enable(const fapi2::Target<fapi2::TARGET_
 
     uint8_t l_value[2][2][4];
 
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_VREF_DQ_TRAIN_ENABLE, i_target, l_value) );
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_VREF_DQ_TRAIN_ENABLE, i_target, l_value) );
     memcpy(o_array, &l_value, 16);
     return fapi2::current_err;
 
 fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_VREF_DQ_TRAIN_ENABLE: 0x%lx (target: %s)",
+    FAPI_ERR("failed accessing ATTR_EFF_VREF_DQ_TRAIN_ENABLE: 0x%lx (target: %s)",
              uint64_t(fapi2::current_err), mss::c_str(i_target));
     return fapi2::current_err;
 }
@@ -11527,26 +10177,6 @@ fapi_try_exit:
 }
 
 ///
-/// @brief ATTR_MSS_DRAMINIT_RESET_DISABLE getter
-/// @param[out] uint8_t& reference to store the value
-/// @note Generated by gen_accessors.pl generateParameters (SYSTEM)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  A disable switch for resetting the phy delay values at the beginning of calling
-/// mss_draminit_training.
-///
-inline fapi2::ReturnCode draminit_reset_disable(uint8_t& o_value)
-{
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_DRAMINIT_RESET_DISABLE, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), o_value) );
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_MSS_DRAMINIT_RESET_DISABLE: 0x%lx (system target)",
-             uint64_t(fapi2::current_err));
-    return fapi2::current_err;
-}
-
-///
 /// @brief ATTR_MSS_SLEW_RATE_DATA getter
 /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
 /// @param[out] uint8_t* memory to store the value
@@ -11745,170 +10375,6 @@ fapi_try_exit:
 }
 
 ///
-/// @brief ATTR_MSS_ALLOW_SINGLE_PORT getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  When this value is true, then mss_eff config will allow a single port to have
-/// one dimm and will allow ports to have different sizes. Used in
-/// eff_config
-///
-inline fapi2::ReturnCode allow_single_port(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t& o_value)
-{
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_ALLOW_SINGLE_PORT, i_target.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(i_target)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_MSS_ALLOW_SINGLE_PORT: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_MSS_ALLOW_SINGLE_PORT getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D.1)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  When this value is true, then mss_eff config will allow a single port to have
-/// one dimm and will allow ports to have different sizes. Used in
-/// eff_config
-///
-inline fapi2::ReturnCode allow_single_port(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
-{
-    uint8_t l_value[2];
-    auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_ALLOW_SINGLE_PORT, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(l_mca)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_MSS_ALLOW_SINGLE_PORT: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_MSS_ALLOW_SINGLE_PORT getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (E)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  When this value is true, then mss_eff config will allow a single port to have
-/// one dimm and will allow ports to have different sizes. Used in
-/// eff_config
-///
-inline fapi2::ReturnCode allow_single_port(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
-{
-    if (o_array == nullptr)
-    {
-        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
-        return fapi2::FAPI2_RC_INVALID_PARAMETER;
-    }
-
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_ALLOW_SINGLE_PORT, i_target, l_value) );
-    memcpy(o_array, &l_value, 2);
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_MSS_ALLOW_SINGLE_PORT: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_MSS_DQS_SWIZZLE_TYPE getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  DQS Swizzle type is set by the platform to describe what kind of DQS connection
-/// is being used for register acceses. Type 0 is normal, type 1 is for systems with
-/// wiring like glacier 1, type 2 is for Pallmeto. Additional types maybe defined if
-/// new boards have even different DQS swizzle
-/// features
-///
-inline fapi2::ReturnCode dqs_swizzle_type(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t& o_value)
-{
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_DQS_SWIZZLE_TYPE, i_target.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(i_target)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_MSS_DQS_SWIZZLE_TYPE: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_MSS_DQS_SWIZZLE_TYPE getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D.1)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  DQS Swizzle type is set by the platform to describe what kind of DQS connection
-/// is being used for register acceses. Type 0 is normal, type 1 is for systems with
-/// wiring like glacier 1, type 2 is for Pallmeto. Additional types maybe defined if
-/// new boards have even different DQS swizzle
-/// features
-///
-inline fapi2::ReturnCode dqs_swizzle_type(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
-{
-    uint8_t l_value[2];
-    auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_DQS_SWIZZLE_TYPE, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(l_mca)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_MSS_DQS_SWIZZLE_TYPE: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_MSS_DQS_SWIZZLE_TYPE getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (E)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  DQS Swizzle type is set by the platform to describe what kind of DQS connection
-/// is being used for register acceses. Type 0 is normal, type 1 is for systems with
-/// wiring like glacier 1, type 2 is for Pallmeto. Additional types maybe defined if
-/// new boards have even different DQS swizzle
-/// features
-///
-inline fapi2::ReturnCode dqs_swizzle_type(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
-{
-    if (o_array == nullptr)
-    {
-        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
-        return fapi2::FAPI2_RC_INVALID_PARAMETER;
-    }
-
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_DQS_SWIZZLE_TYPE, i_target, l_value) );
-    memcpy(o_array, &l_value, 2);
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_MSS_DQS_SWIZZLE_TYPE: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
 /// @brief ATTR_SCHMOO_MULTIPLE_SETUP_CALL getter
 /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
 /// @param[out] ref to the value uint8_t
@@ -12718,28 +11184,6 @@ fapi_try_exit:
 }
 
 ///
-/// @brief ATTR_ISDIMM_POWER_CURVE_ALGORITHM_VERSION getter
-/// @param[out] uint32_t& reference to store the value
-/// @note Generated by gen_accessors.pl generateParameters (SYSTEM)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  Version of algorithm and dependent attributes used to calculate ISDIMM power
-/// curve
-/// attributes
-///
-inline fapi2::ReturnCode isdimm_power_curve_algorithm_version(uint32_t& o_value)
-{
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_ISDIMM_POWER_CURVE_ALGORITHM_VERSION, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(),
-                            o_value) );
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_ISDIMM_POWER_CURVE_ALGORITHM_VERSION: 0x%lx (system target)",
-             uint64_t(fapi2::current_err));
-    return fapi2::current_err;
-}
-
-///
 /// @brief ATTR_MSS_VMEM_REGULATOR_MAX_DIMM_COUNT getter
 /// @param[out] uint8_t& reference to store the value
 /// @note Generated by gen_accessors.pl generateParameters (SYSTEM)
@@ -19131,16 +17575,16 @@ fapi_try_exit:
 ///
 /// @brief ATTR_EFF_DRAM_TREFI getter
 /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
-/// @param[out] ref to the value uint8_t
+/// @param[out] ref to the value uint16_t
 /// @note Generated by gen_accessors.pl generateParameters (D)
 /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
 /// @note  Average Refresh Interval (tREFI) in nck (number of clock cycles). creator:
 /// mss_eff_config consumer: various firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dram_trefi(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t& o_value)
+inline fapi2::ReturnCode eff_dram_trefi(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint16_t& o_value)
 {
-    uint8_t l_value[2];
+    uint16_t l_value[2];
 
     FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_TREFI, i_target.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
     o_value = l_value[mss::index(i_target)];
@@ -19155,16 +17599,16 @@ fapi_try_exit:
 ///
 /// @brief ATTR_EFF_DRAM_TREFI getter
 /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
-/// @param[out] ref to the value uint8_t
+/// @param[out] ref to the value uint16_t
 /// @note Generated by gen_accessors.pl generateParameters (D.1)
 /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
 /// @note  Average Refresh Interval (tREFI) in nck (number of clock cycles). creator:
 /// mss_eff_config consumer: various firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dram_trefi(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
+inline fapi2::ReturnCode eff_dram_trefi(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint16_t& o_value)
 {
-    uint8_t l_value[2];
+    uint16_t l_value[2];
     auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
 
     FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_TREFI, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
@@ -19180,14 +17624,14 @@ fapi_try_exit:
 ///
 /// @brief ATTR_EFF_DRAM_TREFI getter
 /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
-/// @param[out] uint8_t* memory to store the value
+/// @param[out] uint16_t* memory to store the value
 /// @note Generated by gen_accessors.pl generateParameters (E)
 /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
 /// @note  Average Refresh Interval (tREFI) in nck (number of clock cycles). creator:
 /// mss_eff_config consumer: various firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dram_trefi(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_dram_trefi(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint16_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -19195,10 +17639,10 @@ inline fapi2::ReturnCode eff_dram_trefi(const fapi2::Target<fapi2::TARGET_TYPE_M
         return fapi2::FAPI2_RC_INVALID_PARAMETER;
     }
 
-    uint8_t l_value[2];
+    uint16_t l_value[2];
 
     FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_TREFI, i_target, l_value) );
-    memcpy(o_array, &l_value, 2);
+    memcpy(o_array, &l_value, 4);
     return fapi2::current_err;
 
 fapi_try_exit:
@@ -21038,7 +19482,7 @@ fapi_try_exit:
 ///
 /// @brief ATTR_EFF_DRAM_TRFC getter
 /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
-/// @param[out] ref to the value uint8_t
+/// @param[out] ref to the value uint16_t
 /// @note Generated by gen_accessors.pl generateParameters (D)
 /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
 /// @note  DDR4 Spec defined as Refresh Cycle Time (tRFC). SPD Spec refers it to the
@@ -21051,9 +19495,9 @@ fapi_try_exit:
 /// equivalent density. creator: eff_config consumer: various firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dram_trfc(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t& o_value)
+inline fapi2::ReturnCode eff_dram_trfc(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint16_t& o_value)
 {
-    uint8_t l_value[2];
+    uint16_t l_value[2];
 
     FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_TRFC, i_target.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
     o_value = l_value[mss::index(i_target)];
@@ -21068,7 +19512,7 @@ fapi_try_exit:
 ///
 /// @brief ATTR_EFF_DRAM_TRFC getter
 /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
-/// @param[out] ref to the value uint8_t
+/// @param[out] ref to the value uint16_t
 /// @note Generated by gen_accessors.pl generateParameters (D.1)
 /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
 /// @note  DDR4 Spec defined as Refresh Cycle Time (tRFC). SPD Spec refers it to the
@@ -21081,9 +19525,9 @@ fapi_try_exit:
 /// equivalent density. creator: eff_config consumer: various firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dram_trfc(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
+inline fapi2::ReturnCode eff_dram_trfc(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint16_t& o_value)
 {
-    uint8_t l_value[2];
+    uint16_t l_value[2];
     auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
 
     FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_TRFC, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
@@ -21099,7 +19543,7 @@ fapi_try_exit:
 ///
 /// @brief ATTR_EFF_DRAM_TRFC getter
 /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
-/// @param[out] uint8_t* memory to store the value
+/// @param[out] uint16_t* memory to store the value
 /// @note Generated by gen_accessors.pl generateParameters (E)
 /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
 /// @note  DDR4 Spec defined as Refresh Cycle Time (tRFC). SPD Spec refers it to the
@@ -21112,7 +19556,7 @@ fapi_try_exit:
 /// equivalent density. creator: eff_config consumer: various firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dram_trfc(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
+inline fapi2::ReturnCode eff_dram_trfc(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint16_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -21120,10 +19564,10 @@ inline fapi2::ReturnCode eff_dram_trfc(const fapi2::Target<fapi2::TARGET_TYPE_MC
         return fapi2::FAPI2_RC_INVALID_PARAMETER;
     }
 
-    uint8_t l_value[2];
+    uint16_t l_value[2];
 
     FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_TRFC, i_target, l_value) );
-    memcpy(o_array, &l_value, 2);
+    memcpy(o_array, &l_value, 4);
     return fapi2::current_err;
 
 fapi_try_exit:
@@ -21498,8 +19942,7 @@ fapi_try_exit:
 /// consumer: various firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dram_write_recovery(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
-        uint8_t& o_value)
+inline fapi2::ReturnCode eff_dram_twr(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t& o_value)
 {
     uint8_t l_value[2];
 
@@ -21524,8 +19967,7 @@ fapi_try_exit:
 /// consumer: various firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dram_write_recovery(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
-        uint8_t& o_value)
+inline fapi2::ReturnCode eff_dram_twr(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
 {
     uint8_t l_value[2];
     auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
@@ -21551,8 +19993,7 @@ fapi_try_exit:
 /// consumer: various firmware notes:
 /// none
 ///
-inline fapi2::ReturnCode eff_dram_write_recovery(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
-        uint8_t* o_array)
+inline fapi2::ReturnCode eff_dram_twr(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
 {
     if (o_array == nullptr)
     {
@@ -22177,21 +20618,83 @@ fapi_try_exit:
 }
 
 ///
-/// @brief ATTR_MRW_TEMP_REF_RANGE getter
+/// @brief ATTR_MRW_TEMP_REFRESH_RANGE getter
 /// @param[out] uint8_t& reference to store the value
 /// @note Generated by gen_accessors.pl generateParameters (SYSTEM)
 /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
 /// @note  Temp ref range. Should be defaulted to extended range. This is for DDR4
 /// MRS4.
 ///
-inline fapi2::ReturnCode mrw_temp_ref_range(uint8_t& o_value)
+inline fapi2::ReturnCode mrw_temp_refresh_range(uint8_t& o_value)
+{
+
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MRW_TEMP_REFRESH_RANGE, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), o_value) );
+    return fapi2::current_err;
+
+fapi_try_exit:
+    FAPI_ERR("failed accessing ATTR_MRW_TEMP_REFRESH_RANGE: 0x%lx (system target)",
+             uint64_t(fapi2::current_err));
+    return fapi2::current_err;
+}
+
+///
+/// @brief ATTR_MRW_DRAMINIT_RESET_DISABLE getter
+/// @param[out] uint8_t& reference to store the value
+/// @note Generated by gen_accessors.pl generateParameters (SYSTEM)
+/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
+/// @note  A disable switch for resetting the phy delay values at the beginning of calling
+/// mss_draminit_training.
+///
+inline fapi2::ReturnCode mrw_draminit_reset_disable(uint8_t& o_value)
+{
+
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MRW_DRAMINIT_RESET_DISABLE, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), o_value) );
+    return fapi2::current_err;
+
+fapi_try_exit:
+    FAPI_ERR("failed accessing ATTR_MRW_DRAMINIT_RESET_DISABLE: 0x%lx (system target)",
+             uint64_t(fapi2::current_err));
+    return fapi2::current_err;
+}
+
+///
+/// @brief ATTR_MRW_PREFETCH_ENABLE getter
+/// @param[out] uint8_t& reference to store the value
+/// @note Generated by gen_accessors.pl generateParameters (SYSTEM)
+/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
+/// @note  Value of on or off. Determines if prefetching enabled or not. See chapter 7 of
+/// the Centaur
+/// Workbook.
+///
+inline fapi2::ReturnCode mrw_prefetch_enable(uint8_t& o_value)
+{
+
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MRW_PREFETCH_ENABLE, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), o_value) );
+    return fapi2::current_err;
+
+fapi_try_exit:
+    FAPI_ERR("failed accessing ATTR_MRW_PREFETCH_ENABLE: 0x%lx (system target)",
+             uint64_t(fapi2::current_err));
+    return fapi2::current_err;
+}
+
+///
+/// @brief ATTR_MRW_CLEANER_ENABLE getter
+/// @param[out] uint8_t& reference to store the value
+/// @note Generated by gen_accessors.pl generateParameters (SYSTEM)
+/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
+/// @note  Value of on or off. Determines if the cleaner of the L4 cache (write modified
+/// entries to memory on idle cycles) enabled or not. See chapter 7 of the Centaur
+/// Workbook.
+///
+inline fapi2::ReturnCode mrw_cleaner_enable(uint8_t& o_value)
 {
 
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MRW_TEMP_REF_RANGE, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), o_value) );
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MRW_CLEANER_ENABLE, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), o_value) );
     return fapi2::current_err;
 
 fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_MRW_TEMP_REF_RANGE: 0x%lx (system target)",
+    FAPI_ERR("failed accessing ATTR_MRW_CLEANER_ENABLE: 0x%lx (system target)",
              uint64_t(fapi2::current_err));
     return fapi2::current_err;
 }
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/read_cntrl.H b/src/import/chips/p9/procedures/hwp/memory/lib/phy/read_cntrl.H
index ced06fa23..1e1936c72 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/read_cntrl.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/read_cntrl.H
@@ -372,7 +372,7 @@ inline fapi2::ReturnCode reset_config2( const fapi2::Target<T>& i_target )
     {
         uint8_t l_bl = 0;
 
-        FAPI_TRY( mss::eff_dram_burst_length(i_target, l_bl) );
+        FAPI_TRY( mss::eff_dram_bl(i_target, l_bl) );
         l_data.insertFromRight<TT::CONSEQ_PASS, TT::CONSEQ_PASS_LEN>(
             l_bl == fapi2::ENUM_ATTR_EFF_DRAM_BL_BL8 ? 0b01000 : 0b01111);
     }
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_decoder.C b/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_decoder.C
index 0f3e4297d..ff284537f 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_decoder.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_decoder.C
@@ -560,6 +560,48 @@ fapi_try_exit:
     return fapi2::current_err;
 }
 
+
+///
+/// @brief       Decodes DRAM Device Type
+/// @param[in]   i_target dimm target
+/// @param[in]   i_spd_data SPD data
+/// @param[out]  o_value dram device type enumeration
+/// @return      FAPI2_RC_SUCCESS if okay
+/// @note        Decodes SPD Byte 2
+/// @note        Item JC-45-2220.01x
+/// @note        Page 16
+/// @note        DDR4 SPD Document Release 3
+///
+fapi2::ReturnCode dram_device_type(const fapi2::Target<TARGET_TYPE_DIMM>& i_target,
+                                   const std::vector<uint8_t>& i_spd_data,
+                                   uint8_t& o_value)
+{
+    constexpr size_t BYTE_INDEX = 2;
+    uint8_t l_raw_byte = i_spd_data[BYTE_INDEX];
+
+    // Trace in the front assists w/ debug
+    FAPI_DBG("%s SPD data at Byte %d: 0x%llX.",
+             mss::c_str(i_target),
+             BYTE_INDEX,
+             l_raw_byte);
+
+    // Find map value
+    bool l_is_val_found = mss::find_value_from_key(DRAM_GEN_MAP, l_raw_byte, o_value);
+
+    FAPI_TRY( mss::check::spd:: fail_for_invalid_value(i_target,
+              l_is_val_found,
+              BYTE_INDEX,
+              l_raw_byte,
+              "Failed check on SPD dram device type") );
+    // Print decoded info
+    FAPI_DBG("%s Device type : %d",
+             c_str(i_target),
+             o_value);
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
 ///
 /// @brief       Object factory to select correct decoder
 /// @param[in]   i_target dimm target
@@ -573,18 +615,39 @@ fapi2::ReturnCode factory(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target
                           std::shared_ptr<decoder>& o_fact_obj)
 {
     uint8_t l_dimm_type = 0;
+    uint8_t l_dimm_types_mcs[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+    uint8_t l_dram_gen = 0;
+    uint8_t l_dram_gen_mcs[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
     uint8_t l_encoding_rev = 0;
     uint8_t l_additions_rev = 0;
 
+    const auto l_mcs = mss::find_target<TARGET_TYPE_MCS>(i_target);
+    const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) );
+    const auto l_dimm_num = index(i_target);
+
     if( i_spd_data.empty() )
     {
         // This won't work with no data
         return fapi2::FAPI2_RC_INVALID_PARAMETER;
     }
 
-    // Get dimm type & revision levels
+    // Get dimm type & set attribute (needed by c_str)
     FAPI_TRY( base_module_type(i_target, i_spd_data, l_dimm_type),
               "Failed to find base module type" );
+    FAPI_TRY( eff_dimm_type(l_mcs, &l_dimm_types_mcs[0][0]) );
+
+    l_dimm_types_mcs[l_port_num][l_dimm_num] = l_dimm_type;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_TYPE, l_mcs, l_dimm_types_mcs) );
+
+    // Get dram generation & set attribute (needed by c_str)
+    FAPI_TRY( eff_dram_gen(l_mcs, &l_dram_gen_mcs[0][0]) );
+    FAPI_TRY( dram_device_type(i_target, i_spd_data, l_dram_gen),
+              "Failed to find base module type" );
+
+    l_dram_gen_mcs[l_port_num][l_dimm_num] = l_dram_gen;
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_GEN, l_mcs, l_dram_gen_mcs) );
+
+    // Get revision levels
     FAPI_TRY( rev_encoding_level(i_target, i_spd_data, l_encoding_rev),
               "Failed to find encoding level" );
     FAPI_TRY( rev_additions_level(i_target, i_spd_data,  l_additions_rev),
@@ -827,45 +890,6 @@ fapi_try_exit:
 }
 
 ///
-/// @brief       Decodes DRAM Device Type
-/// @param[in]   i_target dimm target
-/// @param[out]  o_value dram device type enumeration
-/// @return      FAPI2_RC_SUCCESS if okay
-/// @note        Decodes SPD Byte 2
-/// @note        Item JC-45-2220.01x
-/// @note        Page 16
-/// @note        DDR4 SPD Document Release 3
-///
-fapi2::ReturnCode decoder::dram_device_type(const fapi2::Target<TARGET_TYPE_DIMM>& i_target,
-        uint8_t& o_value)
-{
-    constexpr size_t BYTE_INDEX = 2;
-    uint8_t l_raw_byte = iv_spd_data[BYTE_INDEX];
-
-    // Trace in the front assists w/ debug
-    FAPI_DBG("%s SPD data at Byte %d: 0x%llX.",
-             mss::c_str(i_target),
-             BYTE_INDEX,
-             l_raw_byte);
-
-    // Find map value
-    bool l_is_val_found = mss::find_value_from_key(DRAM_GEN_MAP, l_raw_byte, o_value);
-
-    FAPI_TRY( mss::check::spd:: fail_for_invalid_value(i_target,
-              l_is_val_found,
-              BYTE_INDEX,
-              l_raw_byte,
-              "Failed check on SPD dram device type") );
-    // Print decoded info
-    FAPI_DBG("%s Device type : %d",
-             c_str(i_target),
-             o_value);
-
-fapi_try_exit:
-    return fapi2::current_err;
-}
-
-///
 /// @brief      Decodes hybrid media field from SPD
 /// @param[in]  i_target
 /// @param[out] o_value enum representing hybrid memory type
@@ -1735,7 +1759,7 @@ fapi2::ReturnCode decoder::operable_nominal_voltage(const fapi2::Target<TARGET_T
               l_is_val_found,
               BYTE_INDEX,
               l_field_bits,
-              "Failed check for Endur") );
+              "Failed check for Operable nominal voltage") );
 
     FAPI_DBG("%s. Operable: %d",
              mss::c_str(i_target),
@@ -1781,7 +1805,7 @@ fapi2::ReturnCode decoder::endurant_nominal_voltage(const fapi2::Target<TARGET_T
               l_is_val_found,
               BYTE_INDEX,
               l_field_bits,
-              "Failed check for Endurant") );
+              "Failed check for Endurant nominal voltage") );
 
     FAPI_DBG("%s. Endurant: %d",
              mss::c_str(i_target),
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_decoder.H b/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_decoder.H
index df1979547..c3064aff8 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_decoder.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_decoder.H
@@ -383,19 +383,6 @@ class decoder
                 uint16_t& o_value);
 
         ///
-        /// @brief       Decodes DRAM Device Type
-        /// @param[in]   i_target dimm target
-        /// @param[out]  o_value dram device type enumeration
-        /// @return      FAPI2_RC_SUCCESS if okay
-        /// @note        Decodes SPD Byte 2
-        /// @note        Item JC-45-2220.01x
-        /// @note        Page 16
-        /// @note        DDR4 SPD Document Release 3
-        ///
-        virtual fapi2::ReturnCode dram_device_type(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
-                uint8_t& o_value);
-
-        ///
         /// @brief      Decodes hybrid media field from SPD
         /// @param[in]  i_target
         /// @param[out] o_value
@@ -1158,6 +1145,19 @@ fapi2::ReturnCode rev_additions_level(const fapi2::Target<fapi2::TARGET_TYPE_DIM
 fapi2::ReturnCode base_module_type(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
                                    const std::vector<uint8_t>& i_spd_data,
                                    uint8_t& o_value);
+///
+/// @brief       Decodes DRAM Device Type
+/// @param[in]   i_target dimm target
+/// @param[out]  o_value dram device type enumeration
+/// @return      FAPI2_RC_SUCCESS if okay
+/// @note        Decodes SPD Byte 2
+/// @note        Item JC-45-2220.01x
+/// @note        Page 16
+/// @note        DDR4 SPD Document Release 3
+///
+fapi2::ReturnCode dram_device_type(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+                                   const std::vector<uint8_t>& i_spd_data,
+                                   uint8_t& o_value);
 
 ///
 /// @brief       Object factory to select correct decoder
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/utils/checker.H b/src/import/chips/p9/procedures/hwp/memory/lib/utils/checker.H
index 90db0ff9c..40ab0d5df 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/utils/checker.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/utils/checker.H
@@ -31,7 +31,7 @@
 #define _CHECKER_H_
 
 #include <fapi2.H>
-#include <mss_attribute_accessors.H>
+#include <lib/mss_attribute_accessors.H>
 #include <lib/shared/mss_const.H>
 
 namespace mss
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/utils/conversions.H b/src/import/chips/p9/procedures/hwp/memory/lib/utils/conversions.H
index 34926062c..070bbef73 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/utils/conversions.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/utils/conversions.H
@@ -41,12 +41,37 @@
 //  and casts it to uint8_t[Y] that FAPI_ATTR_SET is expecting by deduction
 /// @param[in] X is the input vector
 /// @param[in] Y is the size of the vector
+/// @warn compiler doesn't like the use of vector method size() for the second param
 ///
 #define UINT8_VECTOR_TO_1D_ARRAY(X, Y)\
     {\
         reinterpret_cast<uint8_t(&)[Y]>(*X.data())\
     }
 
+///
+/// @brief Dereferences pointer of the vector's underlying data
+//  and casts it to uint16_t[Y] that FAPI_ATTR_SET is expecting by deduction
+/// @param[in] X is the input vector
+/// @param[in] Y is the size of the vector
+/// @warn compiler doesn't like the use of vector method size() for the second param
+///
+#define UINT16_VECTOR_TO_1D_ARRAY(X, Y)\
+    {\
+        reinterpret_cast<uint16_t(&)[Y]>(*X.data())\
+    }
+
+///
+/// @brief Dereferences pointer of the vector's underlying data
+//  and casts it to uint32_t[Y] that FAPI_ATTR_SET is expecting by deduction
+/// @param[in] X is the input vector
+/// @param[in] Y is the size of the vector
+/// @warn compiler doesn't like the use of vector method size() for the second param
+///
+#define UINT32_VECTOR_TO_1D_ARRAY(X, Y)\
+    {\
+        reinterpret_cast<uint32_t(&)[Y]>(*X.data())\
+    }
+
 // Mutiplication factor to go from clocks to simcycles.
 // Is this just 2400 speed or does this hold for all? BRS
 static const uint64_t SIM_CYCLES_PER_CYCLE = 8;
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_training.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_training.C
index d1bbaaeac..142e8e212 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_training.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit_training.C
@@ -51,7 +51,7 @@ extern "C"
         FAPI_INF("Start draminit training");
 
         uint8_t l_reset_disable = 0;
-        FAPI_TRY( mss::draminit_reset_disable(l_reset_disable) );
+        FAPI_TRY( mss::mrw_draminit_reset_disable(l_reset_disable) );
 
         // Configure the CCS engine.
         {
@@ -172,7 +172,7 @@ extern "C"
 
             // Check to see if we're supposed to reset the delay values before starting training
             // don't reset if we're running special training - assumes there's a checkpoint which has valid state.
-            if ((l_reset_disable == fapi2::ENUM_ATTR_MSS_DRAMINIT_RESET_DISABLE_ENABLE) && (i_special_training == 0))
+            if ((l_reset_disable == fapi2::ENUM_ATTR_MRW_DRAMINIT_RESET_DISABLE_ENABLE) && (i_special_training == 0))
             {
                 FAPI_TRY( mss::dp16::reset_delay_values(p, l_pairs) );
             }
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C
index 58d55af21..b9dcfb0bb 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C
@@ -24,7 +24,7 @@
 // *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com>
 // *HWP HWP Backup: Brian Silver <bsilver@us.ibm.com>
 // *HWP Team: Memory
-// *HWP Level: 1
+// *HWP Level: 2
 // *HWP Consumed by: FSP:HB
 #include <map>
 #include <vector>
@@ -33,7 +33,9 @@
 #include <p9_mss_eff_config.H>
 #include <lib/utils/pos.H>
 #include <lib/spd/spd_decoder.H>
-
+#include <lib/eff_config/eff_config.H>
+#include <lib/utils/checker.H>
+#include <lib/utils/find.H>
 
 ///
 /// @brief Configure the attributes for each controller
@@ -42,12 +44,170 @@
 ///
 fapi2::ReturnCode p9_mss_eff_config( const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target )
 {
+    mss::eff_config l_eff_config;
     // Caches
     std::map<uint32_t, std::shared_ptr<mss::spd::decoder> > l_factory_caches;
-
     FAPI_TRY( mss::spd::populate_decoder_caches(i_target, l_factory_caches) );
 
-    FAPI_INF("End effective config");
+    for( const auto& l_dimm : mss::find_targets<fapi2::TARGET_TYPE_DIMM>(i_target) )
+    {
+        const auto l_dimm_pos = mss::pos(l_dimm);
+
+        // TODO: RTC 152390
+        // Find decoder factory for this dimm position
+        auto l_it = l_factory_caches.find(l_dimm_pos);
+
+        FAPI_TRY( mss::check::spd::invalid_cache(l_dimm,
+                  l_it != l_factory_caches.end(),
+                  l_dimm_pos),
+                  "Failed to get valid cache");
+
+        l_eff_config.iv_pDecoder = l_it->second;
+
+        FAPI_TRY( l_eff_config.dimm_type(l_dimm, l_it->second->iv_spd_data) );
+        FAPI_TRY( l_eff_config.dram_gen(l_dimm, l_it->second->iv_spd_data) );
+        FAPI_TRY( l_eff_config.dram_width(l_dimm) );
+        FAPI_TRY( l_eff_config.dram_density(l_dimm) );
+        FAPI_TRY( l_eff_config.ranks_per_dimm(l_dimm) );
+        FAPI_TRY( l_eff_config.master_ranks_per_dimm(l_dimm) );
+        FAPI_TRY( l_eff_config.primary_stack_type(l_dimm) );
+        FAPI_TRY( l_eff_config.dimm_size(l_dimm) );
+        FAPI_TRY( l_eff_config.hybrid_memory_type(l_dimm) );
+        FAPI_TRY( l_eff_config.refresh_interval_time(l_dimm) );
+        FAPI_TRY( l_eff_config.refresh_cycle_time(l_dimm) );
+        FAPI_TRY( l_eff_config.refresh_cycle_time_dlr(l_dimm) );
+        FAPI_TRY( l_eff_config.rcd_mirror_mode(l_dimm) );
+        FAPI_TRY( l_eff_config.dram_bank_bits(l_dimm) );
+        FAPI_TRY( l_eff_config.dram_row_bits(l_dimm) );
+        FAPI_TRY( l_eff_config.custom_dimm(l_dimm) );
+        FAPI_TRY( l_eff_config.dram_dqs_time(l_dimm) );
+        FAPI_TRY( l_eff_config.odt_read(l_dimm) );
+        FAPI_TRY( l_eff_config.odt_write(l_dimm) );
+        FAPI_TRY( l_eff_config.dram_tccd_l(l_dimm) );
+        FAPI_TRY( l_eff_config.data_mask(l_dimm) );
+        FAPI_TRY( l_eff_config.rtt_park(l_dimm) );
+        FAPI_TRY( l_eff_config.dimm_rc00(l_dimm) );
+        FAPI_TRY( l_eff_config.dimm_rc01(l_dimm) );
+        FAPI_TRY( l_eff_config.dimm_rc02(l_dimm) );
+        FAPI_TRY( l_eff_config.dimm_rc03(l_dimm) );
+        FAPI_TRY( l_eff_config.dimm_rc04(l_dimm) );
+        FAPI_TRY( l_eff_config.dimm_rc05(l_dimm) );
+        FAPI_TRY( l_eff_config.dimm_rc06_07(l_dimm) );
+        FAPI_TRY( l_eff_config.dimm_rc08(l_dimm) );
+        FAPI_TRY( l_eff_config.dimm_rc09(l_dimm) );
+        FAPI_TRY( l_eff_config.dimm_rc10(l_dimm) );
+        FAPI_TRY( l_eff_config.dimm_rc11(l_dimm) );
+        FAPI_TRY( l_eff_config.dimm_rc12(l_dimm) );
+        FAPI_TRY( l_eff_config.dimm_rc13(l_dimm) );
+        FAPI_TRY( l_eff_config.dimm_rc14(l_dimm) );
+        FAPI_TRY( l_eff_config.dimm_rc15(l_dimm) );
+        FAPI_TRY( l_eff_config.dimm_rc1x(l_dimm) );
+        FAPI_TRY( l_eff_config.dimm_rc2x(l_dimm) );
+        FAPI_TRY( l_eff_config.dimm_rc3x(l_dimm) );
+        FAPI_TRY( l_eff_config.dimm_rc4x(l_dimm) );
+        FAPI_TRY( l_eff_config.dimm_rc5x(l_dimm) );
+        FAPI_TRY( l_eff_config.dimm_rc6x(l_dimm) );
+        FAPI_TRY( l_eff_config.dimm_rc7x(l_dimm) );
+        FAPI_TRY( l_eff_config.dimm_rc8x(l_dimm) );
+        FAPI_TRY( l_eff_config.dimm_rc9x(l_dimm) );
+        FAPI_TRY( l_eff_config.dimm_rcax(l_dimm) );
+        FAPI_TRY( l_eff_config.dimm_rcbx(l_dimm) );
+        FAPI_TRY( l_eff_config.dram_twr(l_dimm) );
+        FAPI_TRY( l_eff_config.burst_length(l_dimm) );
+        FAPI_TRY( l_eff_config.read_burst_type(l_dimm) );
+        FAPI_TRY( l_eff_config.dram_tm(l_dimm) );
+        FAPI_TRY( l_eff_config.dram_cwl(l_dimm) );
+        FAPI_TRY( l_eff_config.dram_lpasr(l_dimm) );
+        FAPI_TRY( l_eff_config.additive_latency(l_dimm) );
+        FAPI_TRY( l_eff_config.dll_enable(l_dimm) );
+        FAPI_TRY( l_eff_config.dll_reset(l_dimm) );
+        FAPI_TRY( l_eff_config.dram_ron(l_dimm) );
+        FAPI_TRY( l_eff_config.rtt_nom(l_dimm) );
+        FAPI_TRY( l_eff_config.write_level_enable(l_dimm) );
+        FAPI_TRY( l_eff_config.output_buffer(l_dimm) );
+        FAPI_TRY( l_eff_config.vref_dq_train_value(l_dimm) );
+        FAPI_TRY( l_eff_config.vref_dq_train_range(l_dimm) );
+        FAPI_TRY( l_eff_config.vref_dq_train_enable(l_dimm) );
+        FAPI_TRY( l_eff_config.ca_parity_latency(l_dimm) );
+        FAPI_TRY( l_eff_config.ca_parity_error_status(l_dimm) );
+        FAPI_TRY( l_eff_config.ca_parity(l_dimm) );
+        FAPI_TRY( l_eff_config.crc_error_clear(l_dimm) );
+        FAPI_TRY( l_eff_config.odt_input_buffer(l_dimm) );
+        FAPI_TRY( l_eff_config.write_dbi(l_dimm) );
+        FAPI_TRY( l_eff_config.read_dbi(l_dimm) );
+        FAPI_TRY( l_eff_config.post_package_repair(l_dimm) );
+        FAPI_TRY( l_eff_config.read_preamble_train(l_dimm) );
+        FAPI_TRY( l_eff_config.read_preamble(l_dimm) );
+        FAPI_TRY( l_eff_config.write_preamble(l_dimm) );
+        FAPI_TRY( l_eff_config.self_refresh_abort(l_dimm) );
+        FAPI_TRY( l_eff_config.cs_to_cmd_addr_latency(l_dimm) );
+        FAPI_TRY( l_eff_config.internal_vref_monitor(l_dimm) );
+        FAPI_TRY( l_eff_config.max_powerdown_mode(l_dimm) );
+        FAPI_TRY( l_eff_config.mpr_read_format(l_dimm) );
+        FAPI_TRY( l_eff_config.temp_readout(l_dimm) );
+        FAPI_TRY( l_eff_config.crc_wr_latency(l_dimm) );
+        FAPI_TRY( l_eff_config.per_dram_addressability(l_dimm) );
+        FAPI_TRY( l_eff_config.geardown_mode(l_dimm) );
+        FAPI_TRY( l_eff_config.mpr_page(l_dimm) );
+        FAPI_TRY( l_eff_config.mpr_mode(l_dimm) );
+        FAPI_TRY( l_eff_config.write_crc(l_dimm) );
+        FAPI_TRY( l_eff_config.rtt_write(l_dimm) );
+        FAPI_TRY( l_eff_config.zqcal_interval(l_dimm) );
+        FAPI_TRY( l_eff_config.memcal_interval(l_dimm) );
+
+        // Hard-coded RIT protect attribute set (currently not taken account in eff_config)
+        {
+            uint16_t l_vpd_mt_windage_rd_ctr[mss::PORTS_PER_MCS] = {0xDEAD, 0xBEEF};
+            FAPI_TRY( FAPI_ATTR_SET( fapi2::ATTR_VPD_MT_WINDAGE_RD_CTR, i_target, l_vpd_mt_windage_rd_ctr) );
+        }
+
+        {
+            uint8_t l_vpd_rlo[mss::PORTS_PER_MCS] = {0x01, 0x01};
+            FAPI_TRY( FAPI_ATTR_SET( fapi2::ATTR_VPD_RLO, i_target, l_vpd_rlo ) );
+        }
+
+        {
+            uint8_t l_vpd_wlo[mss::PORTS_PER_MCS] = {0x01, 0x01};
+            FAPI_TRY( FAPI_ATTR_SET( fapi2::ATTR_VPD_WLO, i_target, l_vpd_wlo ) );
+        }
+
+        {
+            uint8_t l_vpd_glo[mss::PORTS_PER_MCS] = {0x05, 0x05};
+            FAPI_TRY( FAPI_ATTR_SET( fapi2::ATTR_VPD_GPO, i_target, l_vpd_glo ) );
+        }
+
+        {
+            uint32_t l_m_dram_clocks[mss::PORTS_PER_MCS] = {0x200, 0x200};
+            FAPI_TRY( FAPI_ATTR_SET( fapi2::ATTR_MSS_RUNTIME_MEM_M_DRAM_CLOCKS, i_target, l_m_dram_clocks ) );
+        }
+
+        {
+            uint32_t l_throttled_n_commands[mss::PORTS_PER_MCS] = {0x60, 0x60};
+            FAPI_TRY( FAPI_ATTR_SET( fapi2::ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_PORT, i_target,
+                                     l_throttled_n_commands ) );
+        }
+
+        {
+            uint8_t l_throttle_ras[mss::PORTS_PER_MCS] = {0x00, 0x00};
+            FAPI_TRY( FAPI_ATTR_SET( fapi2::ATTR_MSS_THROTTLE_CONTROL_RAS_WEIGHT, i_target, l_throttle_ras ) );
+        }
+
+        {
+            uint8_t l_throttle_cas[mss::PORTS_PER_MCS] = {0x01, 0x01};
+            FAPI_TRY( FAPI_ATTR_SET( fapi2::ATTR_MSS_THROTTLE_CONTROL_CAS_WEIGHT, i_target, l_throttle_cas ) );
+        }
+
+        {
+            uint8_t l_databus_util[mss::PORTS_PER_MCS][mss::MAX_DIMM_PER_PORT] = {};
+            FAPI_TRY( FAPI_ATTR_SET( fapi2::ATTR_MSS_DATABUS_UTIL, i_target, l_databus_util ) );
+        }
+
+        {
+            uint16_t l_cal_step[mss::PORTS_PER_MCS] = {0x7AC0, 0x7AC0};
+            FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_MSS_CAL_STEP_ENABLE, i_target, l_cal_step) );
+        }
+
+    }// dimm
 
 fapi_try_exit:
     return fapi2::current_err;
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.H b/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.H
index 91679cd59..88cc2147b 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.H
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.H
@@ -24,7 +24,7 @@
 // *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com>
 // *HWP HWP Backup: Brian Silver <bsilver@us.ibm.com>
 // *HWP Team: Memory
-// *HWP Level: 1
+// *HWP Level: 2
 // *HWP Consumed by: FSP:HB
 
 #ifndef __P9_MSS_EFF_CONFIG__
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C
index 8fc7c3ac1..1c41836f9 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C
@@ -40,6 +40,7 @@
 #include <lib/freq/cas_latency.H>
 #include <lib/utils/c_str.H>
 #include <lib/freq/cycle_time.H>
+#include <lib/utils/find.H>
 
 using fapi2::TARGET_TYPE_MCS;
 using fapi2::TARGET_TYPE_MCA;
@@ -56,10 +57,6 @@ extern "C"
     ///
     fapi2::ReturnCode p9_mss_freq( const fapi2::Target<TARGET_TYPE_MCS>& i_target )
     {
-        uint64_t l_tCKmin = 0;
-        uint64_t l_min_dimm_freq = 0;
-        uint64_t l_desired_cas_latency = 0;
-
         // Get cached decoder
         std::map<uint32_t, std::shared_ptr<mss::spd::decoder> > l_factory_caches;
         FAPI_TRY( mss::spd::populate_decoder_caches(i_target, l_factory_caches),
@@ -84,26 +81,38 @@ extern "C"
                      "Failed check for freq_override()");
 
 #endif
+            uint64_t l_min_dimm_freq = 0;
+            uint64_t l_desired_cas_latency = 0;
+
+            if(!l_cas_latency.iv_dimm_list_empty)
+            {
+                uint64_t l_tCKmin = 0;
+
+                // Find CAS latency using JEDEC algorithm
+                l_cas_latency.find_CL(i_target,
+                                      l_desired_cas_latency,
+                                      l_tCKmin);
 
-            // Find CAS latency using JEDEC algorithm
-            l_cas_latency.find_CL(i_target,
-                                  l_desired_cas_latency,
-                                  l_tCKmin);
+                // Find dimm transfer speed from selected tCK
+                l_min_dimm_freq = mss::ps_to_freq(l_tCKmin);
 
-            // Find dimm transfer speed from selected tCK
-            l_min_dimm_freq = mss::ps_to_freq(l_tCKmin);
-            FAPI_TRY(mss::select_supported_freq(l_min_dimm_freq),
-                     "Failed select_supported_freq()");
+                FAPI_TRY(mss::select_supported_freq(l_min_dimm_freq),
+                         "Failed select_supported_freq()");
 
-            // Set attributes
-            FAPI_TRY(mss::set_freq_attrs(i_target, l_min_dimm_freq),
-                     "Failed set_freq_attrs()");
+                // TK - RIT PROTECT - NEED TO CHANGE
+                l_min_dimm_freq = 2400;
 
-            FAPI_TRY(mss::set_CL_attr(i_target, l_desired_cas_latency ),
-                     "Failed set_CL_attr()");
+                // Set attributes
+                FAPI_TRY(mss::set_freq_attrs(i_target, l_min_dimm_freq),
+                         "Failed set_freq_attrs()");
+
+                FAPI_TRY(mss::set_CL_attr(i_target, l_desired_cas_latency ),
+                         "Failed set_CL_attr()");
+            }// end if
 
             FAPI_DBG( "Final Chosen Frequency: %d",  l_min_dimm_freq);
             FAPI_DBG( "Final Chosen CL: %d",  l_desired_cas_latency);
+
         }
 
     fapi_try_exit:
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H
index fa1089a7b..ae06a6987 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H
@@ -73,6 +73,10 @@ inline fapi2::ReturnCode set_CL_attr(const fapi2::Target<fapi2::TARGET_TYPE_MCS>
 {
     // Declaration of the vector correctly initializes it to the right size
     // in the case the enum for PORTS_PER_MCS changes
+
+    // RIT hackey to match the attribute file (likely fakeSPD is wrong) BRS
+    i_cas_latency = 0x10;
+
     std::vector<uint8_t> l_cls_vect(PORTS_PER_MCS, uint8_t(i_cas_latency) );
 
     // set CAS latency attribute
@@ -96,9 +100,12 @@ fapi_try_exit:
 inline fapi2::ReturnCode set_freq_attrs(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
                                         uint64_t i_dimm_freq)
 {
-    uint64_t l_nest_freq = 1;
+    // TK - RIT, needsto be corrected
+    uint64_t l_nest_freq = 2;
     const auto l_mcbist = i_target.getParent<fapi2::TARGET_TYPE_MCBIST>();
 
+    FAPI_DBG("setting freq attrs for %s", mss::c_str(i_target));
+
     // TK
     //Update for P9, what do we do w/setting nest freq? - AAM
     // how do we select nest freq if we even have to??
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
index 4412d9bd2..67f59ca76 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
@@ -58,11 +58,9 @@
           Consumed by mss_freq.
           The default of AUTO means mss_freq will find the best frequencies given the DIMMs plugged in and other rules.
           Otherwise, this is the system frequency.
-          firmware notes: Platforms should initialize this attribute to AUTO (0)
         </description>
         <valueType>uint64</valueType>
         <enum>AUTO = 0</enum>
-        <platInit/>
         <writeable/>
         <mssAccessorName>freq_override</mssAccessorName>
     </attribute>
@@ -87,7 +85,6 @@
           MT2666 = 2666
         </enum>
         <writeable/>
-        <persistRuntime/>
         <mssUnits> MT/s </mssUnits>
         <mssAccessorName>freq</mssAccessorName>
     </attribute>
@@ -106,7 +103,6 @@
         </description>
         <valueType>uint32</valueType>
         <writeable/>
-        <persistRuntime/>
         <mssAccessorName>freq_bias_percentage</mssAccessorName>
     </attribute>
 
@@ -134,7 +130,6 @@
         <valueType>uint8</valueType>
         <writeable/>
         <array> 2 2</array>
-        <persistRuntime/>
         <mssAccessorName>eff_num_ranks_per_dimm</mssAccessorName>
     </attribute>
 
@@ -152,7 +147,6 @@
         <enum>NO = 0, YES = 1</enum>
         <writeable/>
         <array>2 2 </array>
-        <persistRuntime/>
         <mssAccessorName>eff_custom_dimm</mssAccessorName>
     </attribute>
 
@@ -193,262 +187,6 @@
     </attribute>
 
     <attribute>
-        <id>ATTR_EFF_PRIMARY_RANK_GROUP0</id>
-        <targetType>TARGET_TYPE_MCS</targetType>
-        <description>
-            RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-            creator: mss_eff_cnfg_rank_group
-            consumer: various
-            firmware notes: none
-        </description>
-        <valueType>uint8</valueType>
-        <enum>INVALID = 255</enum>
-        <writeable/>
-        <array> 2</array>
-        <mssAccessorName>eff_primary_rank_group0</mssAccessorName>
-    </attribute>
-
-    <attribute>
-        <id>ATTR_EFF_PRIMARY_RANK_GROUP1</id>
-        <targetType>TARGET_TYPE_MCS</targetType>
-        <description>
-            RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-            creator: mss_eff_cnfg_rank_group
-            consumer: various
-            firmware notes: none
-        </description>
-        <valueType>uint8</valueType>
-        <enum>INVALID = 255</enum>
-        <writeable/>
-        <array> 2</array>
-        <mssAccessorName>eff_primary_rank_group1</mssAccessorName>
-    </attribute>
-
-    <attribute>
-        <id>ATTR_EFF_PRIMARY_RANK_GROUP2</id>
-        <targetType>TARGET_TYPE_MCS</targetType>
-        <description>
-            RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-            creator: mss_eff_cnfg_rank_group
-            consumer: various
-            firmware notes: none
-        </description>
-        <valueType>uint8</valueType>
-        <enum>INVALID = 255</enum>
-        <writeable/>
-        <array> 2</array>
-        <mssAccessorName>eff_primary_rank_group2</mssAccessorName>
-    </attribute>
-
-    <attribute>
-        <id>ATTR_EFF_PRIMARY_RANK_GROUP3</id>
-        <targetType>TARGET_TYPE_MCS</targetType>
-        <description>
-            RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-            creator: mss_eff_cnfg_rank_group
-            consumer: various
-            firmware notes: none
-        </description>
-        <valueType>uint8</valueType>
-        <enum>INVALID = 255</enum>
-        <writeable/>
-        <array> 2</array>
-        <mssAccessorName>eff_primary_rank_group3</mssAccessorName>
-    </attribute>
-
-    <attribute>
-        <id>ATTR_EFF_SECONDARY_RANK_GROUP0</id>
-        <targetType>TARGET_TYPE_MCS</targetType>
-        <description>
-            RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-            creator: mss_eff_cnfg_rank_group
-            consumer: various
-            firmware notes: none
-        </description>
-        <valueType>uint8</valueType>
-        <enum>INVALID = 255</enum>
-        <writeable/>
-        <array> 2</array>
-        <mssAccessorName>eff_secondary_rank_group0</mssAccessorName>
-    </attribute>
-
-    <attribute>
-        <id>ATTR_EFF_SECONDARY_RANK_GROUP1</id>
-        <targetType>TARGET_TYPE_MCS</targetType>
-        <description>
-            RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-            creator: mss_eff_cnfg_rank_group
-            consumer: various
-            firmware notes: none
-        </description>
-        <valueType>uint8</valueType>
-        <enum>INVALID = 255</enum>
-        <writeable/>
-        <array> 2</array>
-        <mssAccessorName>eff_secondary_rank_group1</mssAccessorName>
-    </attribute>
-
-    <attribute>
-        <id>ATTR_EFF_SECONDARY_RANK_GROUP2</id>
-        <targetType>TARGET_TYPE_MCS</targetType>
-        <description>
-            RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-            creator: mss_eff_cnfg_rank_group
-            consumer: various
-            firmware notes: none
-        </description>
-        <valueType>uint8</valueType>
-        <enum>INVALID = 255</enum>
-        <writeable/>
-        <array> 2</array>
-        <mssAccessorName>eff_secondary_rank_group2</mssAccessorName>
-    </attribute>
-
-    <attribute>
-        <id>ATTR_EFF_SECONDARY_RANK_GROUP3</id>
-        <targetType>TARGET_TYPE_MCS</targetType>
-        <description>
-            RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-            creator: mss_eff_cnfg_rank_group
-            consumer: various
-            firmware notes: none
-        </description>
-        <valueType>uint8</valueType>
-        <enum>INVALID = 255</enum>
-        <writeable/>
-        <array> 2</array>
-        <mssAccessorName>eff_secondary_rank_group3</mssAccessorName>
-    </attribute>
-
-    <attribute>
-        <id>ATTR_EFF_TERTIARY_RANK_GROUP0</id>
-        <targetType>TARGET_TYPE_MCS</targetType>
-        <description>
-            RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-            creator: mss_eff_cnfg_rank_group
-            consumer: various
-            firmware notes: none
-        </description>
-        <valueType>uint8</valueType>
-        <enum>INVALID = 255</enum>
-        <writeable/>
-        <array> 2</array>
-        <mssAccessorName>eff_tertiary_rank_group0</mssAccessorName>
-    </attribute>
-
-    <attribute>
-        <id>ATTR_EFF_TERTIARY_RANK_GROUP1</id>
-        <targetType>TARGET_TYPE_MCS</targetType>
-        <description>
-            RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-            creator: mss_eff_cnfg_rank_group
-            consumer: various
-            firmware notes: none
-        </description>
-        <valueType>uint8</valueType>
-        <enum>INVALID = 255</enum>
-        <writeable/>
-        <array> 2</array>
-        <mssAccessorName>eff_tertiary_rank_group1</mssAccessorName>
-    </attribute>
-
-    <attribute>
-        <id>ATTR_EFF_TERTIARY_RANK_GROUP2</id>
-        <targetType>TARGET_TYPE_MCS</targetType>
-        <description>
-            RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-            creator: mss_eff_cnfg_rank_group
-            consumer: various
-            firmware notes: none
-        </description>
-        <valueType>uint8</valueType>
-        <enum>INVALID = 255</enum>
-        <writeable/>
-        <array> 2</array>
-        <mssAccessorName>eff_tertiary_rank_group2</mssAccessorName>
-    </attribute>
-
-    <attribute>
-        <id>ATTR_EFF_TERTIARY_RANK_GROUP3</id>
-        <targetType>TARGET_TYPE_MCS</targetType>
-        <description>
-            RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-            creator: mss_eff_cnfg_rank_group
-            consumer: various
-            firmware notes: none
-        </description>
-        <valueType>uint8</valueType>
-        <enum>INVALID = 255</enum>
-        <writeable/>
-        <array> 2</array>
-        <mssAccessorName>eff_tertiary_rank_group3</mssAccessorName>
-    </attribute>
-
-    <attribute>
-        <id>ATTR_EFF_QUATERNARY_RANK_GROUP0</id>
-        <targetType>TARGET_TYPE_MCS</targetType>
-        <description>
-            RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-            creator: mss_eff_cnfg_rank_group
-            consumer: various
-            firmware notes: none
-        </description>
-        <valueType>uint8</valueType>
-        <enum>INVALID = 255</enum>
-        <writeable/>
-        <array> 2</array>
-        <mssAccessorName>eff_quaternary_rank_group0</mssAccessorName>
-    </attribute>
-
-    <attribute>
-        <id>ATTR_EFF_QUATERNARY_RANK_GROUP1</id>
-        <targetType>TARGET_TYPE_MCS</targetType>
-        <description>
-            RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-            creator: mss_eff_cnfg_rank_group
-            consumer: various
-            firmware notes: none
-        </description>
-        <valueType>uint8</valueType>
-        <enum>INVALID = 255</enum>
-        <writeable/>
-        <array> 2</array>
-        <mssAccessorName>eff_quaternary_rank_group1</mssAccessorName>
-    </attribute>
-
-    <attribute>
-        <id>ATTR_EFF_QUATERNARY_RANK_GROUP2</id>
-        <targetType>TARGET_TYPE_MCS</targetType>
-        <description>
-            RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-            creator: mss_eff_cnfg_rank_group
-            consumer: various
-            firmware notes: none
-        </description>
-        <valueType>uint8</valueType>
-        <enum>INVALID = 255</enum>
-        <writeable/>
-        <array> 2</array>
-        <mssAccessorName>eff_quaternary_rank_group2</mssAccessorName>
-    </attribute>
-
-    <attribute>
-        <id>ATTR_EFF_QUATERNARY_RANK_GROUP3</id>
-        <targetType>TARGET_TYPE_MCS</targetType>
-        <description>
-            RankGroup. Used in various locations and is computed in mss_eff_cnfg_rank_group.
-            creator: mss_eff_cnfg_rank_group
-            consumer: various
-            firmware notes: none
-        </description>
-        <valueType>uint8</valueType>
-        <enum>INVALID = 255</enum>
-        <writeable/>
-        <array> 2</array>
-        <mssAccessorName>eff_quaternary_rank_group3</mssAccessorName>
-    </attribute>
-
-    <attribute>
         <id>ATTR_EFF_DIMM_SPARE</id>
         <targetType>TARGET_TYPE_MCS</targetType>
         <description>
@@ -551,7 +289,6 @@
         <writeable/>
         <array> 2 2</array>
         <mssUnits>GB</mssUnits>
-        <persistRuntime/>
         <mssAccessorName>eff_dimm_size</mssAccessorName>
     </attribute>
 
@@ -570,7 +307,7 @@
         <enum>BL8 = 0, OTF = 1, BC4 = 2</enum>
         <writeable/>
         <array>2</array>
-        <mssAccessorName>eff_dram_burst_length</mssAccessorName>
+        <mssAccessorName>eff_dram_bl</mssAccessorName>
     </attribute>
 
     <attribute>
@@ -586,7 +323,7 @@
         <valueType>uint8</valueType>
         <writeable/>
         <array> 2 </array>
-        <mssAccessorName>eff_dram_cas_latency</mssAccessorName>
+        <mssAccessorName>eff_dram_cl</mssAccessorName>
     </attribute>
 
     <attribute>
@@ -639,7 +376,7 @@
         <enum>SEQUENTIAL = 0, INTERLEAVE = 1</enum>
         <writeable/>
         <array>2 2</array>
-        <mssAccessorName>eff_dram_read_burst_type</mssAccessorName>
+        <mssAccessorName>eff_dram_rbt</mssAccessorName>
     </attribute>
 
     <attribute>
@@ -966,7 +703,7 @@
         <valueType>uint8</valueType>
         <writeable/>
         <array> 2 2</array>
-        <mssAccessorName>eff_dimm_ddr4_rc67</mssAccessorName>
+        <mssAccessorName>eff_dimm_ddr4_rc06_07</mssAccessorName>
         </attribute>
 
     <attribute>
@@ -1089,7 +826,7 @@
         <valueType>uint8</valueType>
         <writeable/>
         <array> 2 2</array>
-        <mssAccessorName>eff_dimm_ddr4_rc1x</mssAccessorName>
+        <mssAccessorName>eff_dimm_ddr4_rc_1x</mssAccessorName>
     </attribute>
 
     <attribute>
@@ -1102,7 +839,7 @@
         <valueType>uint8</valueType>
         <writeable/>
         <array> 2 2</array>
-        <mssAccessorName>eff_dimm_ddr4_rc2x</mssAccessorName>
+        <mssAccessorName>eff_dimm_ddr4_rc_2x</mssAccessorName>
     </attribute>
 
     <attribute>
@@ -1115,7 +852,7 @@
         <valueType>uint8</valueType>
         <writeable/>
         <array> 2 2</array>
-        <mssAccessorName>eff_dimm_ddr4_rc3x</mssAccessorName>
+        <mssAccessorName>eff_dimm_ddr4_rc_3x</mssAccessorName>
     </attribute>
 
     <attribute>
@@ -1128,7 +865,7 @@
        <valueType>uint8</valueType>
        <writeable/>
        <array> 2 2</array>
-       <mssAccessorName>eff_dimm_ddr4_rc4x</mssAccessorName>
+       <mssAccessorName>eff_dimm_ddr4_rc_4x</mssAccessorName>
     </attribute>
 
     <attribute>
@@ -1141,7 +878,7 @@
         <valueType>uint8</valueType>
         <writeable/>
         <array> 2 2</array>
-        <mssAccessorName>eff_dimm_ddr4_rc5x</mssAccessorName>
+        <mssAccessorName>eff_dimm_ddr4_rc_5x</mssAccessorName>
     </attribute>
 
     <attribute>
@@ -1154,7 +891,7 @@
         <valueType>uint8</valueType>
         <writeable/>
         <array> 2 2</array>
-        <mssAccessorName>eff_dimm_ddr4_rc6x</mssAccessorName>
+        <mssAccessorName>eff_dimm_ddr4_rc_6x</mssAccessorName>
     </attribute>
 
     <attribute>
@@ -1167,7 +904,7 @@
         <valueType>uint8</valueType>
         <writeable/>
         <array> 2 2</array>
-        <mssAccessorName>eff_dimm_ddr4_rc7x</mssAccessorName>
+        <mssAccessorName>eff_dimm_ddr4_rc_7x</mssAccessorName>
     </attribute>
 
     <attribute>
@@ -1180,7 +917,7 @@
         <valueType>uint8</valueType>
         <writeable/>
         <array> 2 2</array>
-        <mssAccessorName>eff_dimm_ddr4_rc8x</mssAccessorName>
+        <mssAccessorName>eff_dimm_ddr4_rc_8x</mssAccessorName>
     </attribute>
 
     <attribute>
@@ -1193,7 +930,7 @@
         <valueType>uint8</valueType>
         <writeable/>
         <array> 2 2</array>
-        <mssAccessorName>eff_dimm_ddr4_rc9x</mssAccessorName>
+        <mssAccessorName>eff_dimm_ddr4_rc_9x</mssAccessorName>
     </attribute>
 
     <attribute>
@@ -1210,7 +947,7 @@
         <valueType>uint8</valueType>
         <writeable/>
         <array> 2 2</array>
-        <mssAccessorName>eff_dimm_ddr4_rcax</mssAccessorName>
+        <mssAccessorName>eff_dimm_ddr4_rc_ax</mssAccessorName>
     </attribute>
 
     <attribute>
@@ -1227,7 +964,7 @@
         <valueType>uint8</valueType>
         <writeable/>
         <array> 2 2</array>
-        <mssAccessorName>eff_dimm_ddr4_rcbx</mssAccessorName>
+        <mssAccessorName>eff_dimm_ddr4_rc_bx</mssAccessorName>
     </attribute>
 
 
@@ -1486,7 +1223,6 @@
         <valueType>uint32</valueType>
         <writeable/>
         <array>2</array>
-        <persistRuntime/>
         <mssAccessorName>mem_throttled_n_commands_per_port</mssAccessorName>
     </attribute>
 
@@ -1503,7 +1239,6 @@
         <valueType>uint32</valueType>
         <writeable/>
         <array>2</array>
-        <persistRuntime/>
         <mssAccessorName>mem_m_dram_clocks</mssAccessorName>
     </attribute>
 
@@ -1514,7 +1249,6 @@
         <valueType>uint32</valueType>
         <writeable/>
         <array>2</array>
-        <persistRuntime/>
         <mssAccessorName>mem_throttled_n_commands_per_slot</mssAccessorName>
     </attribute>
 
@@ -1531,7 +1265,6 @@
         <valueType>uint32</valueType>
         <writeable/>
         <array>2</array>
-        <persistRuntime/>
 
         <mssAccessorName>mem_watt_target</mssAccessorName>
     </attribute>
@@ -1543,7 +1276,6 @@
         <valueType>uint32</valueType>
         <writeable/>
         <array> 2 2</array>
-        <persistRuntime/>
         <mssAccessorName>master_pwr_slope</mssAccessorName>
     </attribute>
 
@@ -1554,7 +1286,6 @@
         <valueType>uint32</valueType>
         <writeable/>
         <array> 2 2</array>
-        <persistRuntime/>
         <mssAccessorName>supplier_pwr_slope</mssAccessorName>
     </attribute>
 
@@ -1565,7 +1296,6 @@
         <valueType>uint32</valueType>
         <writeable/>
         <array> 2 2</array>
-        <persistRuntime/>
         <mssAccessorName>master_pwr_intercept</mssAccessorName>
     </attribute>
 
@@ -1576,7 +1306,6 @@
         <valueType>uint32</valueType>
         <writeable/>
         <array> 2 2</array>
-        <persistRuntime/>
         <mssAccessorName>supplier_pwr_intercept</mssAccessorName>
     </attribute>
 
@@ -1587,7 +1316,6 @@
         <valueType>uint32</valueType>
         <writeable/>
         <array> 2 2</array>
-        <persistRuntime/>
         <mssAccessorName>dimm_maxbandwidth_gbs</mssAccessorName>
     </attribute>
 
@@ -1598,7 +1326,6 @@
         <valueType>uint32</valueType>
         <writeable/>
         <array> 2 2</array>
-        <persistRuntime/>
         <mssAccessorName>dimm_maxbandwidth_mrs</mssAccessorName>
     </attribute>
 
@@ -1609,7 +1336,6 @@
         <valueType>uint32</valueType>
         <writeable/>
         <array>2</array>
-        <persistRuntime/>
         <mssAccessorName>channel_pair_maxbandwidth_gbs</mssAccessorName>
     </attribute>
 
@@ -1620,7 +1346,6 @@
         <valueType>uint32</valueType>
         <writeable/>
         <array>2</array>
-        <persistRuntime/>
         <mssAccessorName>channel_pair_maxbandwidth_mrs</mssAccessorName>
     </attribute>
 
@@ -1631,7 +1356,6 @@
         <valueType>uint32</valueType>
         <writeable/>
         <array> 2 2</array>
-        <persistRuntime/>
         <mssAccessorName>dimm_maxpower</mssAccessorName>
     </attribute>
 
@@ -1642,7 +1366,6 @@
         <valueType>uint32</valueType>
         <writeable/>
         <array>2</array>
-        <persistRuntime/>
         <mssAccessorName>channel_pair_maxpower</mssAccessorName>
     </attribute>
 
@@ -1656,7 +1379,6 @@
         <valueType>uint32</valueType>
         <writeable/>
         <array>2</array>
-        <persistRuntime/>
         <mssAccessorName>runtime_mem_throttled_n_commands_per_port</mssAccessorName>
     </attribute>
 
@@ -1667,7 +1389,6 @@
         <valueType>uint32</valueType>
         <writeable/>
         <array>2</array>
-        <persistRuntime/>
         <mssAccessorName>runtime_mem_m_dram_clocks</mssAccessorName>
     </attribute>
 
@@ -1678,35 +1399,10 @@
         <valueType>uint32</valueType>
         <writeable/>
         <array>2</array>
-        <persistRuntime/>
         <mssAccessorName>runtime_mem_throttled_n_commands_per_slot</mssAccessorName>
     </attribute>
 
     <attribute>
-        <id>ATTR_MSS_PREFETCH_ENABLE</id>
-        <targetType>TARGET_TYPE_SYSTEM</targetType>
-        <description>Value of on or off.  Determines if prefetching enabled or not. See chapter 7 of the Centaur Workbook.</description>
-        <valueType>uint8</valueType>
-        <enum>OFF = 0, ON = 1</enum>
-        <platInit/>
-        <mssAccessorName>prefetch_enable</mssAccessorName>
-    </attribute>
-
-    <attribute>
-        <id>ATTR_MSS_CLEANER_ENABLE</id>
-        <targetType>TARGET_TYPE_SYSTEM</targetType>
-        <description>
-            Value of on or off.
-            Determines if the cleaner of the L4 cache (write modified entries to memory on idle cycles)
-            enabled or not. See chapter 7 of the Centaur Workbook.
-        </description>
-        <valueType>uint8</valueType>
-        <enum>OFF = 0, ON = 1</enum>
-        <platInit/>
-        <mssAccessorName>cleaner_enable</mssAccessorName>
-    </attribute>
-
-    <attribute>
         <id>ATTR_MSS_EFF_DIMM_FUNCTIONAL_VECTOR</id>
         <targetType>TARGET_TYPE_MCS</targetType>
         <description>
@@ -1722,7 +1418,6 @@
         <valueType>uint8</valueType>
         <writeable/>
         <array>2</array>
-        <persistRuntime/>
         <mssAccessorName>eff_dimm_functional_vector</mssAccessorName>
     </attribute>
 
@@ -1877,7 +1572,7 @@
     </attribute>
 
     <attribute>
-        <id>ATTR_EFF_TEMP_REF_MODE</id>
+        <id>ATTR_EFF_TEMP_REFRESH_MODE</id>
         <targetType>TARGET_TYPE_MCS</targetType>
         <description>
             Temp controlled ref mode. This is for DDR4 MRS4.
@@ -1891,11 +1586,11 @@
         <enum>DISABLE = 0, ENABLE = 1</enum>
         <writeable/>
         <array>2</array>
-        <mssAccessorName>eff_temp_ref_mode</mssAccessorName>
+        <mssAccessorName>eff_temp_refresh_mode</mssAccessorName>
     </attribute>
 
     <attribute>
-        <id>ATTR_EFF_INT_VREF_MON</id>
+        <id>ATTR_EFF_INTERNAL_VREF_MONITOR</id>
         <targetType>TARGET_TYPE_MCS</targetType>
         <description>
             Internal Vref Monitor.
@@ -1910,7 +1605,7 @@
         <enum>DISABLE = 0, ENABLE = 1</enum>
         <writeable/>
         <array>2</array>
-        <mssAccessorName>eff_int_vref_mon</mssAccessorName>
+        <mssAccessorName>eff_internal_vref_monitor</mssAccessorName>
     </attribute>
 
     <attribute>
@@ -2156,7 +1851,7 @@
     </attribute>
 
     <attribute>
-        <id>ATTR_VREF_DQ_TRAIN_VALUE</id>
+        <id>ATTR_EFF_VREF_DQ_TRAIN_VALUE</id>
         <targetType>TARGET_TYPE_MCS</targetType>
         <description>
             vrefdq_train value. This is for DDR4 MRS6.
@@ -2168,11 +1863,11 @@
         <valueType>uint8</valueType>
         <writeable/>
         <array> 2 2 4</array>
-        <mssAccessorName>vref_dq_train_value</mssAccessorName>
+        <mssAccessorName>eff_vref_dq_train_value</mssAccessorName>
     </attribute>
 
     <attribute>
-        <id>ATTR_VREF_DQ_TRAIN_RANGE</id>
+        <id>ATTR_EFF_VREF_DQ_TRAIN_RANGE</id>
         <targetType>TARGET_TYPE_MCS</targetType>
         <description>
             vrefdq_train range. This is for DDR4 MRS6.
@@ -2185,11 +1880,11 @@
         <enum>RANGE1 = 0, RANGE2 = 1</enum>
         <writeable/>
         <array> 2 2 4</array>
-        <mssAccessorName>vref_dq_train_range</mssAccessorName>
+        <mssAccessorName>eff_vref_dq_train_range</mssAccessorName>
     </attribute>
 
     <attribute>
-        <id>ATTR_VREF_DQ_TRAIN_ENABLE</id>
+        <id>ATTR_EFF_VREF_DQ_TRAIN_ENABLE</id>
         <targetType>TARGET_TYPE_MCS</targetType>
         <description>
             vrefdq_train enable. This is for DDR4 MRS6.
@@ -2202,7 +1897,7 @@
         <enum>DISABLE = 0, ENABLE = 1</enum>
         <writeable/>
         <array> 2 2 4</array>
-        <mssAccessorName>vref_dq_train_enable</mssAccessorName>
+        <mssAccessorName>eff_vref_dq_train_enable</mssAccessorName>
     </attribute>
 
     <attribute>
@@ -2244,22 +1939,10 @@
         <valueType>uint16</valueType>
         <writeable/>
         <array>2</array>
-        <persistRuntime/>
         <mssAccessorName>cal_step_enable</mssAccessorName>
     </attribute>
 
     <attribute>
-        <id>ATTR_MSS_DRAMINIT_RESET_DISABLE</id>
-        <targetType>TARGET_TYPE_SYSTEM</targetType>
-        <description>A disable switch for resetting the phy delay values at the beginning of calling mss_draminit_training.</description>
-        <valueType>uint8</valueType>
-        <enum>DISABLE = 1, ENABLE = 0</enum>
-        <platInit/>
-        <persistRuntime/>
-        <mssAccessorName>draminit_reset_disable</mssAccessorName>
-    </attribute>
-
-    <attribute>
         <id>ATTR_MSS_SLEW_RATE_DATA</id>
         <targetType>TARGET_TYPE_MCS</targetType>
         <description>
@@ -2292,35 +1975,6 @@
     </attribute>
 
     <attribute>
-        <id>ATTR_MSS_ALLOW_SINGLE_PORT</id>
-        <targetType>TARGET_TYPE_MCS</targetType>
-        <description>
-            When this value is true, then mss_eff config will allow a single port to have one dimm and will allow ports to have different sizes.
-            Used in eff_config
-        </description>
-        <valueType>uint8</valueType>
-        <enum>FALSE = 0, TRUE = 1</enum>
-        <platInit/>
-        <array>2</array>
-        <mssAccessorName>allow_single_port</mssAccessorName>
-    </attribute>
-
-    <attribute>
-        <id>ATTR_MSS_DQS_SWIZZLE_TYPE</id>
-        <targetType>TARGET_TYPE_MCS</targetType>
-        <description>
-            DQS Swizzle type is set by the platform to describe what kind of DQS connection is being used for register acceses.
-            Type 0 is normal, type 1 is for systems with wiring like glacier 1, type 2 is for Pallmeto.
-            Additional types maybe defined if new boards have even different DQS swizzle features
-        </description>
-        <valueType>uint8</valueType>
-        <enum>NORMAL_TYPE_0 = 0, GLACIER_TYPE_1 = 1, ISDIMM_TYPE2 = 2</enum>
-        <platInit/>
-        <array>2</array>
-        <mssAccessorName>dqs_swizzle_type</mssAccessorName>
-    </attribute>
-
-    <attribute>
         <id>ATTR_SCHMOO_MULTIPLE_SETUP_CALL</id>
         <targetType>TARGET_TYPE_MCS</targetType>
         <description>MCBIST for multiple setup</description>
@@ -2447,36 +2101,23 @@
         <id>ATTR_MSS_VOLT_OVERRIDE</id>
         <targetType>TARGET_TYPE_MCBIST</targetType>
         <description>
-	  Possible DRAM voltage override.
-	  Firmware notes: Default should be NONE (0x00).
-	</description>
+          Possible DRAM voltage override.
+          Firmware notes: Default should be NONE (0x00).
+        </description>
         <valueType>uint8</valueType>
         <enum>NONE = 0x00, VOLT_120 = 0x02</enum>
-        <platInit/>
+        <writeable/>
         <mssAccessorName>volt_override</mssAccessorName>
     </attribute>
 
-    <attribute>
+   <attribute>
         <id>ATTR_MSS_VDDR_OVERIDE_SPD</id>
         <targetType>TARGET_TYPE_SYSTEM</targetType>
         <description>Possible VDDR voltage override.</description>
         <valueType>uint8</valueType>
         <enum>NONE = 0x00, VOLT_1350 = 0x01, VOLT_1200 = 0x02</enum>
-        <platInit/>
-        <mssAccessorName>vddr_overide_spd</mssAccessorName>
-    </attribute>
-
-    <attribute>
-        <id>ATTR_ISDIMM_POWER_CURVE_ALGORITHM_VERSION</id>
-        <targetType>TARGET_TYPE_SYSTEM</targetType>
-        <description>
-          Version of algorithm and dependent attributes used
-          to calculate ISDIMM power curve attributes
-        </description>
-        <valueType>uint32</valueType>
-        <platInit/>
         <writeable/>
-        <mssAccessorName>isdimm_power_curve_algorithm_version</mssAccessorName>
+        <mssAccessorName>vddr_overide_spd</mssAccessorName>
     </attribute>
 
     <attribute>
@@ -2499,7 +2140,6 @@
         <valueType>uint8</valueType>
         <writeable/>
         <array>2 2</array>
-        <persistRuntime/>
         <mssAccessorName>databus_util</mssAccessorName>
     </attribute>
 
@@ -2516,7 +2156,6 @@
         <valueType>uint32</valueType>
         <writeable/>
         <array>2 2</array>
-        <persistRuntime/>
         <mssAccessorName>throttled_n_commands</mssAccessorName>
     </attribute>
 
@@ -3208,6 +2847,7 @@
         firmware notes: none</description>
       <valueType>uint8</valueType>
       <array>2 2 4</array>
+      <writeable/>
       <mssAccessorName>eff_odt_rd</mssAccessorName>
     </attribute>
 
@@ -3222,6 +2862,7 @@
         firmware notes: none</description>
       <valueType>uint8</valueType>
       <array>2 2 4</array>
+      <writeable/>
       <mssAccessorName>eff_odt_wr</mssAccessorName>
     </attribute>
 
@@ -3236,6 +2877,7 @@
         <valueType>uint8</valueType>
         <enum>INVALID = 0, OHM34 = 34, OHM40 = 40, OHM48 = 48</enum>
         <array>2 2</array>
+        <writeable/>
         <mssAccessorName>eff_dram_ron</mssAccessorName>
     </attribute>
 
@@ -3260,6 +2902,7 @@
           OHM240 = 240
         </enum>
         <array> 2 2 4</array>
+        <writeable/>
         <mssAccessorName>eff_dram_rtt_nom</mssAccessorName>
     </attribute>
 
@@ -3318,7 +2961,7 @@
         consumer: various
         firmware notes: none
       </description>
-      <valueType>uint8</valueType>
+      <valueType>uint16</valueType>
       <writeable/>
       <array> 2 </array>
       <mssUnits> nck </mssUnits>
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml
index 80f7b7ccf..2b406a4ac 100755
--- a/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml
@@ -27,8 +27,6 @@
         </description>
         <valueType>uint32</valueType>
         <platInit/>
-        <odmVisable/>
-        <persistRuntime/>
         <mssAccessorName>mrw_safemode_mem_throttled_n_commands_per_port</mssAccessorName>
     </attribute>
 
@@ -40,8 +38,6 @@
         </description>
         <valueType>uint32</valueType>
         <platInit/>
-        <odmVisable/>
-        <persistRuntime/>
         <mssAccessorName>mrw_safemode_mem_throttled_n_commands_per_slot</mssAccessorName>
     </attribute>
 
@@ -51,7 +47,6 @@
         <description>Machine Readable Workbook Thermal Memory Power Limit</description>
         <valueType>uint32</valueType>
         <platInit/>
-        <odmVisable/>
         <mssAccessorName>mrw_thermal_memory_power_limit</mssAccessorName>
     </attribute>
 
@@ -64,8 +59,6 @@
         </description>
         <valueType>uint8</valueType>
         <platInit/>
-        <odmVisable/>
-        <persistRuntime/>
         <mssAccessorName>mrw_dimm_power_curve_percent_uplift</mssAccessorName>
     </attribute>
 
@@ -78,8 +71,6 @@
         </description>
         <valueType>uint8</valueType>
         <platInit/>
-        <odmVisable/>
-        <persistRuntime/>
         <mssAccessorName>mrw_dimm_power_curve_percent_uplift_idle</mssAccessorName>
     </attribute>
 
@@ -93,8 +84,6 @@
         </description>
         <valueType>uint32</valueType>
         <platInit/>
-        <odmVisable/>
-        <persistRuntime/>
         <mssAccessorName>mrw_mem_m_dram_clocks</mssAccessorName>
     </attribute>
 
@@ -107,8 +96,6 @@
         </description>
         <valueType>uint32</valueType>
         <platInit/>
-        <odmVisable/>
-        <persistRuntime/>
         <mssAccessorName>mrw_max_dram_databus_util</mssAccessorName>
     </attribute>
 
@@ -124,9 +111,6 @@
         </description>
         <valueType>uint8</valueType>
         <platInit/>
-        <writeable/>
-        <odmVisable/>
-        <odmChangeable/>
         <mssAccessorName>mrw_mcs_prefetch_retry_threshold</mssAccessorName>
     </attribute>
 
@@ -137,7 +121,6 @@
         <valueType>uint8</valueType>
         <enum>OFF = 0x00, SLOWEXIT = 0x01, FASTEXIT = 0x02</enum>
         <platInit/>
-        <odmVisable/>
         <mssAccessorName>mrw_power_control_requested</mssAccessorName>
     </attribute>
 
@@ -151,7 +134,6 @@
         <valueType>uint8</valueType>
         <enum>FALSE = 0, TRUE = 1</enum>
         <platInit/>
-        <odmVisable/>
         <mssAccessorName>mrw_vmem_regulator_power_limit_per_dimm_adj_enable</mssAccessorName>
     </attribute>
 
@@ -164,7 +146,6 @@
         </description>
         <valueType>uint8</valueType>
         <platInit/>
-        <odmVisable/>
         <mssAccessorName>mrw_max_number_dimms_possible_per_vmem_regulator</mssAccessorName>
     </attribute>
 
@@ -239,9 +220,8 @@
         <mssAccessorName>mrw_fine_refresh_mode</mssAccessorName>
     </attribute>
 
-
     <attribute>
-        <id>ATTR_MRW_TEMP_REF_RANGE</id>
+        <id>ATTR_MRW_TEMP_REFRESH_RANGE</id>
         <targetType>TARGET_TYPE_SYSTEM</targetType>
         <description>
           Temp ref range.
@@ -250,8 +230,42 @@
         </description>
         <valueType>uint8</valueType>
         <enum>NORMAL = 0, EXTEND = 1</enum>
-        <writeable/>
-        <mssAccessorName>mrw_temp_ref_range</mssAccessorName>
+        <platInit/>
+        <mssAccessorName>mrw_temp_refresh_range</mssAccessorName>
+    </attribute>
+
+    <attribute>
+        <id>ATTR_MRW_DRAMINIT_RESET_DISABLE</id>
+        <targetType>TARGET_TYPE_SYSTEM</targetType>
+        <description>A disable switch for resetting the phy delay values at the beginning of calling mss_draminit_training.</description>
+        <valueType>uint8</valueType>
+        <enum>DISABLE = 1, ENABLE = 0</enum>
+        <platInit/>
+        <mssAccessorName>mrw_draminit_reset_disable</mssAccessorName>
+    </attribute>
+
+    <attribute>
+      <id>ATTR_MRW_PREFETCH_ENABLE</id>
+      <targetType>TARGET_TYPE_SYSTEM</targetType>
+      <description>Value of on or off.  Determines if prefetching enabled or not. See chapter 7 of the Centaur Workbook.</description>
+      <valueType>uint8</valueType>
+      <enum>OFF = 0, ON = 1</enum>
+      <platInit/>
+      <mssAccessorName>mrw_prefetch_enable</mssAccessorName>
+    </attribute>
+
+    <attribute>
+      <id>ATTR_MRW_CLEANER_ENABLE</id>
+      <targetType>TARGET_TYPE_SYSTEM</targetType>
+      <description>
+        Value of on or off.
+        Determines if the cleaner of the L4 cache (write modified entries to memory on idle cycles)
+        enabled or not. See chapter 7 of the Centaur Workbook.
+      </description>
+      <valueType>uint8</valueType>
+      <enum>OFF = 0, ON = 1</enum>
+      <platInit/>
+      <mssAccessorName>mrw_cleaner_enable</mssAccessorName>
     </attribute>
 
 </attributes>
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_spd_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_spd_attributes.xml
index db145ac64..afd815c37 100755
--- a/src/import/chips/p9/procedures/xml/attribute_info/memory_spd_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_spd_attributes.xml
@@ -51,7 +51,6 @@
         <enum> EMPTY = 0, RDIMM = 1, UDIMM = 2, LRDIMM = 3</enum>
         <writeable/>
         <array>2 2</array>
-        <persistRuntime/>
         <mssAccessorName>eff_dimm_type</mssAccessorName>
     </attribute>
 
@@ -69,7 +68,6 @@
         <enum> NONE = 0, NVDIMM = 1</enum>
         <writeable/>
         <array>2 2</array>
-        <persistRuntime/>
         <mssAccessorName>eff_hybrid_memory_type</mssAccessorName>
     </attribute>
 
@@ -87,7 +85,6 @@
         <enum> NOT_HYBRID = 0, IS_HYBRID= 1</enum>
         <writeable/>
         <array>2 2</array>
-        <persistRuntime/>
         <mssAccessorName>eff_hybrid</mssAccessorName>
     </attribute>
 
@@ -326,7 +323,7 @@
         creator: eff_config
         consumer: various
         firmware notes: none</description>
-      <valueType>uint8</valueType>
+      <valueType>uint16</valueType>
       <writeable/>
       <array> 2 </array>
       <mssUnits> nck </mssUnits>
@@ -438,7 +435,7 @@
         <writeable/>
         <array> 2 </array>
         <mssUnits> nck </mssUnits>
-        <mssAccessorName>eff_dram_write_recovery</mssAccessorName>
+        <mssAccessorName>eff_dram_twr</mssAccessorName>
     </attribute>
 
     <attribute>
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_eff_config.xml b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_eff_config.xml
index 24d2132c8..4367589c8 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_eff_config.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_eff_config.xml
@@ -33,11 +33,26 @@
    <hwpError>
     <rc>RC_MSS_INVALID_TEMP_REF_RANGE</rc>
     <description>
-      Invalid Temperature reference range recieved
+      Invalid Temperature refresh range recieved
       from platform.
     </description>
     <ffdc>TEMP_REF_RANGE</ffdc>
-    <ffdc>ENCODING_REV</ffdc>
+    <callout>
+      <target>DIMM_TARGET</target>
+      <priority>HIGH</priority>
+    </callout>
+    <deconfigure>
+      <target>DIMM_TARGET</target>
+    </deconfigure>
+    </hwpError>
+
+   <hwpError>
+    <rc>RC_MSS_INVALID_FINE_REFRESH_MODE</rc>
+    <description>
+      Invalid fine refresh mode recieved
+      from platform.
+    </description>
+    <ffdc>FINE_REF_MODE</ffdc>
     <callout>
       <target>DIMM_TARGET</target>
       <priority>HIGH</priority>