diff options
| author | Anusha Reddy Rangareddygari <anusrang@in.ibm.com> | 2016-05-11 16:14:37 +0200 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-06-16 00:38:46 -0400 |
| commit | f943794f2baf2b04940d386c6f05fccd8e7e23aa (patch) | |
| tree | aa54475f9e962db8744a3e1ff74edf72adb2395c | |
| parent | 3766e827207c3c847939879225101a3f37f318a4 (diff) | |
| download | talos-hostboot-f943794f2baf2b04940d386c6f05fccd8e7e23aa.tar.gz talos-hostboot-f943794f2baf2b04940d386c6f05fccd8e7e23aa.zip | |
Level 2 HWP for p9_sbe_attr_setup,p9_setup_sbe_config
Change-Id: I7153330cdf366336f83ee3d3d0124bec9020b6ab
Original-Change-Id: Ib3c07a029d28c4923b2e8dee32bd8067a13d67a5
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24365
Tested-by: Jenkins Server
Tested-by: PPE CI
Tested-by: Hostboot CI
Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com>
Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com>
Reviewed-by: Sangeetha T S <sangeet2@in.ibm.com>
Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25885
Tested-by: FSP CI Jenkins
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/customize/p9_xip_customize.C | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/import/chips/p9/procedures/hwp/customize/p9_xip_customize.C b/src/import/chips/p9/procedures/hwp/customize/p9_xip_customize.C index 0e5a01bf4..fac10b272 100644 --- a/src/import/chips/p9/procedures/hwp/customize/p9_xip_customize.C +++ b/src/import/chips/p9/procedures/hwp/customize/p9_xip_customize.C @@ -47,13 +47,13 @@ fapi2::ReturnCode writeMboxRegs ( MBOX_ATTR_WRITE (ATTR_SBE_FFDC_ENABLE, i_proc_target, io_image); MBOX_ATTR_WRITE (ATTR_SBE_INTERNAL_FFDC_ENABLE, i_proc_target, io_image); MBOX_ATTR_WRITE (ATTR_BOOT_FREQUENCY_VALID, i_proc_target, io_image); - MBOX_ATTR_WRITE (ATTR_NEST_PLL_BUCKET, i_proc_target, io_image); + MBOX_ATTR_WRITE (ATTR_NEST_PLL_BUCKET, i_system_target, io_image); MBOX_ATTR_WRITE (ATTR_BOOT_FREQ_MULT, i_proc_target, io_image); MBOX_ATTR_WRITE (ATTR_HWP_CONTROL_FLAGS_VALID, i_proc_target, io_image); MBOX_ATTR_WRITE (ATTR_SYSTEM_IPL_PHASE, i_system_target, io_image); - MBOX_ATTR_WRITE (ATTR_SYS_FORCE_ALL_CORES, i_proc_target, io_image); - MBOX_ATTR_WRITE (ATTR_RISK_LEVEL, i_proc_target, io_image); - MBOX_ATTR_WRITE (ATTR_DISABLE_HBBL_VECTORS, i_proc_target, io_image); + MBOX_ATTR_WRITE (ATTR_SYS_FORCE_ALL_CORES, i_system_target, io_image); + MBOX_ATTR_WRITE (ATTR_RISK_LEVEL, i_system_target, io_image); + MBOX_ATTR_WRITE (ATTR_DISABLE_HBBL_VECTORS, i_system_target, io_image); MBOX_ATTR_WRITE (ATTR_CHIP_SELECTION_VALID, i_proc_target, io_image); MBOX_ATTR_WRITE (ATTR_CHIP_SELECTION, i_proc_target, io_image); MBOX_ATTR_WRITE (ATTR_NODE_POS, i_proc_target, io_image); |
