INITPROC: Hostboot SW240862 Disable iVRMs for Tuletta GA1

Change-Id: I009e86cfbdf4b2cb60d8f62ba5799bf9d29d445c
CMVC-Coreq:911822
CQ:SW240862
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/8111
Tested-by: Jenkins Server
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

13 files changed, 301 insertions, 57 deletions

diff --git a/src/usr/hwpf/hwp/proc_chip_ec_feature.xml b/src/usr/hwpf/hwp/proc_chip_ec_feature.xml
index 6635139e1..2ef8bb8b5 100644
--- a/src/usr/hwpf/hwp/proc_chip_ec_feature.xml
+++ b/src/usr/hwpf/hwp/proc_chip_ec_feature.xml
@@ -20,10 +20,8 @@
 <!-- Origin: 30                                                             -->
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_chip_ec_feature.xml,v 1.43 2013/11/20 18:52:33 bellows Exp $ -->
+<!-- $Id: proc_chip_ec_feature.xml,v 1.46 2013/12/19 15:53:50 bwieman Exp $ -->
 <!-- Defines the attributes that are based on EC level -->
-
-
 <attributes>
   <attribute>
     <id>ATTR_CHIP_EC_FEATURE_VENICE_SPECIFIC</id>
@@ -570,6 +568,32 @@
     </chipEcFeature>
   </attribute>
   <attribute>
+    <id>ATTR_CHIP_EC_FEATURE_FBC_UX_SCOPE_ARB_RR</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+      True if:
+        Murano/Venice EC greater than or equal to 0x20 (RR mode)
+      False otherwise:
+        Set LFSR mode
+    </description>
+    <chipEcFeature>
+      <chip>
+        <name>ENUM_ATTR_NAME_MURANO</name>
+        <ec>
+          <value>0x20</value>
+          <test>GREATER_THAN_OR_EQUAL</test>
+        </ec>
+      </chip>
+      <chip>
+        <name>ENUM_ATTR_NAME_VENICE</name>
+        <ec>
+          <value>0x20</value>
+          <test>GREATER_THAN_OR_EQUAL</test>
+        </ec>
+      </chip>
+    </chipEcFeature>
+  </attribute>
+  <attribute>
     <id>ATTR_CHIP_EC_FEATURE_FBC_SERIAL_SCOM_C10_VER2</id>
     <targetType>TARGET_TYPE_PROC_CHIP</targetType>
     <description>
@@ -931,4 +955,47 @@
       </chip>      
     </chipEcFeature>
   </attribute>
+    <attribute>
+    <id>ATTR_PROC_EC_PBA_PREFETCH_ENABLE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+    True if chip can support PBA prefetch as HW258436 is fixed
+        Murano EC greater than or equal to 0x21
+        Venice EC greater than or equal to 0x20
+    </description>
+    <chipEcFeature>
+      <chip>
+        <name>ENUM_ATTR_NAME_MURANO</name>
+        <ec>
+          <value>0x21</value>
+          <test>GREATER_THAN_OR_EQUAL</test>
+        </ec>
+      </chip> 
+      <chip>
+        <name>ENUM_ATTR_NAME_VENICE</name>
+        <ec>
+          <value>0x20</value>
+          <test>GREATER_THAN_OR_EQUAL</test>
+        </ec>
+      </chip>    
+    </chipEcFeature>
+  </attribute>
+    <attribute>
+    <id>ATTR_PROC_EC_OHA_L3_PURGE_ABORT_ENABLE</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+    True if chip can support the enablement of L3 purge aborts during Winkle as HW276505 is fixed
+        Not fixed on any Murano EC 
+        Venice EC 0x20 or greater
+    </description>    
+    <chipEcFeature>
+      <chip>
+        <name>ENUM_ATTR_NAME_VENICE</name>
+        <ec>
+          <value>0x20</value>
+          <test>GREATER_THAN_OR_EQUAL</test>
+        </ec>
+      </chip>    
+    </chipEcFeature>
+  </attribute>
 </attributes>
diff --git a/src/usr/hwpf/hwp/pstates/pstates/p8_build_pstate_datablock.C b/src/usr/hwpf/hwp/pstates/pstates/p8_build_pstate_datablock.C
index 28711de88..79d25cae3 100755
--- a/src/usr/hwpf/hwp/pstates/pstates/p8_build_pstate_datablock.C
+++ b/src/usr/hwpf/hwp/pstates/pstates/p8_build_pstate_datablock.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2013                   */
+/* COPYRIGHT International Business Machines Corp. 2013,2014              */
 /*                                                                        */
 /* p1                                                                     */
 /*                                                                        */
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_build_pstate_datablock.C,v 1.27 2013/11/14 20:45:55 jimyac Exp $
+// $Id: p8_build_pstate_datablock.C,v 1.28 2014/01/15 17:36:37 jimyac Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_build_pstate_datablock.C,v $
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2012
@@ -60,7 +60,7 @@ using namespace fapi;
 // ----------------------------------------------------------------------
 // Function prototypes
 // ----------------------------------------------------------------------
-ReturnCode proc_get_mvpd_data    (const Target& i_target, uint32_t attr_mvpd_data[PV_D][PV_W], ivrm_mvpd_t *ivrm_mvpd, uint8_t *present_chiplets, uint8_t *functional_chiplets, uint8_t *poundm_valid);
+ReturnCode proc_get_mvpd_data    (const Target& i_target, uint32_t attr_mvpd_data[PV_D][PV_W], ivrm_mvpd_t *ivrm_mvpd, uint8_t *present_chiplets, uint8_t *functional_chiplets, uint8_t *poundm_valid,  uint8_t *poundm_ver);
 ReturnCode proc_get_attributes   (const Target& i_target, AttributeList *attr_list);
 ReturnCode proc_get_extint_bias  (uint32_t attr_mvpd_data[PV_D][PV_W], const AttributeList *attr, double *volt_int_vdd_bias, double *volt_int_vcs_bias);
 ReturnCode proc_boost_gpst       (PstateSuperStructure *pss, uint32_t attr_boost_percent);
@@ -85,12 +85,14 @@ p8_build_pstate_datablock(const Target& i_target,
 
   AttributeList attr;
   ChipCharacterization* characterization;
-  uint8_t i                     = 0;
-  uint8_t present_chiplets      = 0;
-  uint8_t functional_chiplets   = 0;
-  uint8_t poundm_valid          = 1;  // assume valid until code determines invalid
-  uint8_t lpst_valid            = 1;  // assume valid until code determines invalid
-  uint8_t attr_pm_ivrms_enabled = 0;
+  uint8_t i                        = 0;
+  uint8_t present_chiplets         = 0;
+  uint8_t functional_chiplets      = 0;
+  uint8_t poundm_ver               = 0;    
+  uint8_t poundm_valid             = 1;  // assume valid until code determines invalid
+  uint8_t lpst_valid               = 1;  // assume valid until code determines invalid
+  uint8_t attr_pm_ivrms_enabled_wr = 0;
+  uint8_t attr_pm_ivrms_enabled_rd = 0;
 
   const uint8_t pv_op_order[S132A_POINTS] = PV_OP_ORDER;
 
@@ -149,7 +151,7 @@ p8_build_pstate_datablock(const Target& i_target,
     memset(attr_mvpd_voltage_control, 0, sizeof(attr_mvpd_voltage_control));
     memset(&ivrm_mvpd,                0, sizeof(ivrm_mvpd));
 
-    l_rc = proc_get_mvpd_data(i_target, attr_mvpd_voltage_control, &ivrm_mvpd, &present_chiplets, &functional_chiplets, &poundm_valid);
+    l_rc = proc_get_mvpd_data(i_target, attr_mvpd_voltage_control, &ivrm_mvpd, &present_chiplets, &functional_chiplets, &poundm_valid, &poundm_ver);
     if (l_rc) {
       break;
     }
@@ -342,7 +344,7 @@ p8_build_pstate_datablock(const Target& i_target,
         break;
       }
       else if (rc == -LPST_GPST_WARNING) {
-        FAPI_IMP("No Local Pstate Generated  - Global Pstate Table is completely within Deadzone" );
+        FAPI_IMP("No Local Pstate Generated  - Global Pstate Table is completely within Deadzone - set PSTATE_NO_INSTALL_LPSA" );
 
         // indicate no LPST installed in PSS
         (*io_pss).gpst.options.options = revle32(revle32((*io_pss).gpst.options.options) |
@@ -433,25 +435,35 @@ p8_build_pstate_datablock(const Target& i_target,
     //  -------------------
     //  uint32_t ATTR_PM_PSTATE0_FREQUENCY // Binary in Khz
     FAPI_IMP("Writing Attribute Values");
+
+    // check if IVRMs should be enabled
+    if (poundm_valid && lpst_valid &&                              // IVRMs should be enabled based on VPD findings
+        attr.attr_pm_system_ivrms_enabled &&                       // Allowed by system
+        (attr.attr_pm_system_ivrm_vpd_min_level != 0) &&           // Attribute has a valid value
+        (attr.attr_pm_system_ivrm_vpd_min_level >= poundm_ver) &&  // Hardware characterized
+        attr.attr_chip_ec_feature_ivrm_winkle_bug)                 // Hardware has logic fixes
+    {
+      attr_pm_ivrms_enabled_wr = 1;
+    }
+    else
+    { 
+      attr_pm_ivrms_enabled_wr = 0;
+      FAPI_INF(" ATTR_PM_IVRMS_ENABLED will be set to 0 - set PSTATE_NO_INSTALL_LPSA");
+      // indicate no LPST installed in PSS
+      (*io_pss).gpst.options.options = revle32(revle32((*io_pss).gpst.options.options) |
+                                       PSTATE_NO_INSTALL_LPSA);      
+    }
     
-    // check to see if IVRMs should be enabled based on VPD findings
-    if (poundm_valid && lpst_valid) 
-      attr_pm_ivrms_enabled = 1;
-    else 
-      attr_pm_ivrms_enabled = 0;
-    
-    SETATTR(l_rc, ATTR_PM_IVRMS_ENABLED, "ATTR_PM_IVRMS_ENABLED", &i_target, attr_pm_ivrms_enabled);   
+    // write ATTR_PM_IVRMS_ENABLED
+    SETATTR(l_rc, ATTR_PM_IVRMS_ENABLED, "ATTR_PM_IVRMS_ENABLED", &i_target, attr_pm_ivrms_enabled_wr);   
 
     // Read back attribute to see if overridden 
-    GETATTR (l_rc, ATTR_PM_IVRMS_ENABLED, "ATTR_PM_IVRMS_ENABLED", &i_target, attr_pm_ivrms_enabled);
+    GETATTR (l_rc, ATTR_PM_IVRMS_ENABLED, "ATTR_PM_IVRMS_ENABLED", &i_target, attr_pm_ivrms_enabled_rd);
 
-    if (attr_pm_ivrms_enabled && (!poundm_valid || !lpst_valid)) {
+    if (attr_pm_ivrms_enabled_rd && !attr_pm_ivrms_enabled_wr) {
       FAPI_INF("WARNING : Attribute ATTR_PM_IVRMS_ENABLED was overridden to 1, but #V or #M data is not valid for IVRMs");
-      // indicate no LPST installed in PSS
-      (*io_pss).gpst.options.options = revle32(revle32((*io_pss).gpst.options.options) |
-                                       PSTATE_NO_INSTALL_LPSA);    
     }
-    else if (!attr_pm_ivrms_enabled && poundm_valid && lpst_valid) {
+    else if (!attr_pm_ivrms_enabled_rd && attr_pm_ivrms_enabled_wr) {
       FAPI_INF("WARNING : ATTR_PM_IVRMS_ENABLED was overriden to 0, but #V or #M data are valid - set PSTATE_NO_INSTALL_LPSA");
       // indicate no LPST installed in PSS
       (*io_pss).gpst.options.options = revle32(revle32((*io_pss).gpst.options.options) |
@@ -542,7 +554,12 @@ ReturnCode proc_get_attributes(const Target& i_target,
     // Read chip ec feature
     DATABLOCK_GET_ATTR(ATTR_CHIP_EC_FEATURE_RESONANT_CLK_VALID, &i_target, attr_chip_ec_feature_resonant_clk_valid);
     DATABLOCK_GET_ATTR(ATTR_PROC_EC_CORE_HANG_PULSE_BUG       , &i_target, attr_proc_ec_core_hang_pulse_bug);
-
+    DATABLOCK_GET_ATTR(ATTR_CHIP_EC_FEATURE_IVRM_WINKLE_BUG   , &i_target, attr_chip_ec_feature_ivrm_winkle_bug);
+    
+    // Read IVRM attributes 
+    DATABLOCK_GET_ATTR(ATTR_PM_SYSTEM_IVRMS_ENABLED           , NULL, attr_pm_system_ivrms_enabled);
+    DATABLOCK_GET_ATTR(ATTR_PM_SYSTEM_IVRM_VPD_MIN_LEVEL      , NULL, attr_pm_system_ivrm_vpd_min_level);
+    
     // --------------------------------------------------------------
     // do basic attribute value checking and generate error if needed
     // --------------------------------------------------------------
@@ -675,7 +692,8 @@ ReturnCode proc_get_mvpd_data(const Target&     i_target,
                                      ivrm_mvpd_t *ivrm_mvpd,
                                      uint8_t     *present_chiplets,
                                      uint8_t     *functional_chiplets,
-                                     uint8_t     *poundm_valid)
+                                     uint8_t     *poundm_valid,
+                                     uint8_t     *poundm_ver)
 {
   ReturnCode l_rc;
   std::vector<fapi::Target>       l_exChiplets;
@@ -692,7 +710,6 @@ ReturnCode proc_get_mvpd_data(const Target&     i_target,
   uint8_t    i                = 0;
   uint8_t    ii               = 0;
   uint8_t    first_chplt      = 1;
-  uint8_t    version_pdm      = 0;
   uint8_t    bucket_id        = 0;
   uint16_t   cal_data[4];
 
@@ -856,19 +873,19 @@ ReturnCode proc_get_mvpd_data(const Target&     i_target,
         l_buffer_pdm_inc = l_buffer_pdm;
 
         // get #M version and advance pointer 1-byte to beginning of #M data
-        version_pdm = *l_buffer_pdm_inc;
-        ivrm_mvpd->header.version = version_pdm ;
+        *poundm_ver = *l_buffer_pdm_inc;
+        ivrm_mvpd->header.version = *poundm_ver ;
         l_buffer_pdm_inc++;
 
         // loop over 13 entries of #M data with 4 measurements per entry
-        FAPI_INF("#M chiplet = %u  version = %u", l_chipNum, version_pdm);
+        FAPI_INF("#M chiplet = %u  version = %u", l_chipNum, *poundm_ver);
 
         for (i=0; i < POUNDM_POINTS; i++) {
 
           for (ii=0; ii<4; ii++) {
             cal_data[ii] = UINT16_GET(l_buffer_pdm_inc);
 
-            if (version_pdm == 2)
+            if (*poundm_ver == 2)
               l_buffer_pdm_inc+= 4;
             else
               l_buffer_pdm_inc+= 2;
@@ -882,9 +899,8 @@ ReturnCode proc_get_mvpd_data(const Target&     i_target,
 
           FAPI_INF("#M data (hex & dec) = 0x%04x 0x%04x 0x%04x 0x%04x    %5u %5u %5u %5u", cal_data[0], cal_data[1], cal_data[2], cal_data[3], cal_data[0], cal_data[1], cal_data[2], cal_data[3]);
           
-          // #M validity check - not valid if any measurements are 0
-          if (cal_data[0] == 0 || cal_data[1] == 0 ||
-              cal_data[2] == 0 || cal_data[3] == 0 )
+          // #M validity check - not valid if measurements are 0 (exception : cal_data[0](Vg) can be 0)
+          if (cal_data[1] == 0 || cal_data[2] == 0 || cal_data[3] == 0 )
           {          
             FAPI_INF("**** Warning : #M has zero valued measurements - IVRMs will not be enabled");
             *poundm_valid = 0;         
diff --git a/src/usr/hwpf/hwp/pstates/pstates/p8_build_pstate_datablock.H b/src/usr/hwpf/hwp/pstates/pstates/p8_build_pstate_datablock.H
index e2c305fff..72969e30d 100755
--- a/src/usr/hwpf/hwp/pstates/pstates/p8_build_pstate_datablock.H
+++ b/src/usr/hwpf/hwp/pstates/pstates/p8_build_pstate_datablock.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2013                   */
+/* COPYRIGHT International Business Machines Corp. 2013,2014              */
 /*                                                                        */
 /* p1                                                                     */
 /*                                                                        */
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_build_pstate_datablock.H,v 1.12 2013/11/14 20:45:59 jimyac Exp $
+// $Id: p8_build_pstate_datablock.H,v 1.13 2014/01/15 17:37:16 jimyac Exp $
 #ifndef _P8_BUILD_PSTATE_DATABLOCK_H_
 #define _P8_BUILD_PSTATE_DATABLOCK_H_
 
@@ -102,6 +102,9 @@ typedef struct {
 
   uint8_t  attr_chip_ec_feature_resonant_clk_valid;
   uint8_t  attr_proc_ec_core_hang_pulse_bug;
+  uint8_t  attr_chip_ec_feature_ivrm_winkle_bug;
+  uint8_t  attr_pm_system_ivrms_enabled;
+  uint8_t  attr_pm_system_ivrm_vpd_min_level;  
 
 } AttributeList;
 
diff --git a/src/usr/hwpf/hwp/pstates/pstates/pstate_tables.c b/src/usr/hwpf/hwp/pstates/pstates/pstate_tables.c
index a78cfac65..183b9d4f7 100755
--- a/src/usr/hwpf/hwp/pstates/pstates/pstate_tables.c
+++ b/src/usr/hwpf/hwp/pstates/pstates/pstate_tables.c
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2013                   */
+/* COPYRIGHT International Business Machines Corp. 2013,2014              */
 /*                                                                        */
 /* p1                                                                     */
 /*                                                                        */
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: pstate_tables.c,v 1.13 2013/10/30 17:35:57 jimyac Exp $
+// $Id: pstate_tables.c,v 1.14 2014/01/15 17:37:18 jimyac Exp $
 
 /// \file pstate_tables.c
 /// \brief This file contains code used to generate Pstate tables from real or
@@ -755,15 +755,15 @@ lpst_create(const GlobalPstateTable *gpst,
       // --------------------
       // compute power ratios
       // -------------------- 
-      float  sigma = 0;
+      float  sigma = 3;
       float  iac_wc;
       float  iac;
       float  vout;
       float  pwrratio_f;
       uint8_t pwrratio;
       
-      // convert to mV (note: vdd_uv is the max of the vdd values for this lpst entry)
-      vout = (float)(vdd_uv/1000); 
+      // convert to mV and subract 100 mV (note: vdd_uv is the max of the vdd values for this lpst entry)
+      vout = (float)((vdd_uv/1000) - 100); 
             
       // equations from Josh
       iac_wc     = 1.25 * ( 28.5 * 1.25 - 16 ) * ( 1 - 0.05 * 2) * 40/71;        // testsite equation & ratio of testsite to anticipated produ
@@ -1169,6 +1169,7 @@ void write_HWtab_bin(ivrm_parm_data_t* i_ivrm_parms,
   double TEMP_UPLIFT;
   double Ical[40][40];
   double Iratio[40][40];
+  double Iratio_clip;
   uint8_t Iratio_int[40][40];  
   int temp;
   uint8_t ratio_val;
@@ -1176,7 +1177,7 @@ void write_HWtab_bin(ivrm_parm_data_t* i_ivrm_parms,
   
   NUM_VIN     = i_ivrm_parms->vin_entries_per_vds;
   NUM_VDS     = i_ivrm_parms->vds_region_entries;
-  VIN_MIN     = 800;
+  VIN_MIN     = 600;
   VDS_MIN     = 100;
   LSB_CURRENT = 4.1;
   TEMP_UPLIFT = 1.1;
@@ -1201,24 +1202,30 @@ void write_HWtab_bin(ivrm_parm_data_t* i_ivrm_parms,
            Ical[i][j]   = C[0] + C[1]*Vin[i] + C[2]*Vds[j] + C[3]*Vin[i]*Vds[j]; // compute cal current
            Iratio[i][j] = TEMP_UPLIFT * LSB_CURRENT / Ical[i][j];
            
-           temp = (int) (Iratio[i][j]+1/16>3.875 ? 3.875 : Iratio[i][j]+1/16);
-// jwy           dec2bin(temp, 2);
+           // clip at 3.875 and use for both temp calculations
+           Iratio_clip = (Iratio[i][j]+1/16>3.875 ? 3.875 : Iratio[i][j]+1/16); 
+// bug           temp = (int) (Iratio[i][j]+1/16>3.875 ? 3.875 : Iratio[i][j]+1/16); 
+           temp = (int) Iratio_clip; 
+//           printf("%2.2f %2.2f %u ", Ical[i][j], Iratio_clip, temp);
+//           dec2bin(temp, 2);
            ratio_val = 0;
            ratio_val = (temp << 3) & 0x018;          // jwy shift temp left 3 and clear out lower 3 bits - this gets bits 0:1 of value
-           //printf(".");
+//           printf(".");
            
-           temp = (int) ((Iratio[i][j] - temp)*8 + 0.5);
-// jwy           dec2bin(temp, 3);
+           temp = (int) ( (Iratio_clip - temp)*8 + 0.5);
+           temp = temp > 7 ? 7 : temp;  // bug fix - clip to 7 if overflow
+           
+//           dec2bin(temp, 3);
            ratio_val = (temp & 0x07)| ratio_val;     // jwy OR lower 3 bits of temp with upper 2 bits already in 0:1 - this merges bits 2:4 with 0:1 for final value
            Iratio_int[i][j] = ratio_val; 
-//           printf(" %u",ratio_val);
+// jwy           printf(" %u",ratio_val);
 // jwy           printf("\t");
         } else {
            Iratio[i][j]     = 0;
            Iratio_int[i][j] = 0;
 // jwy           printf("0*\t");
         }
-        //printf("%lf\t", Iratio[i][j]);
+// jwy        printf("%lf\t", Iratio[i][j]);
      }
 // jwy     printf("\n");
   }
diff --git a/src/usr/hwpf/hwp/runtime_attributes/pm_hwp_attributes.xml b/src/usr/hwpf/hwp/runtime_attributes/pm_hwp_attributes.xml
index cb849dd43..c9a09f034 100644
--- a/src/usr/hwpf/hwp/runtime_attributes/pm_hwp_attributes.xml
+++ b/src/usr/hwpf/hwp/runtime_attributes/pm_hwp_attributes.xml
@@ -5,7 +5,7 @@
 <!--                                                                        -->
 <!-- IBM CONFIDENTIAL                                                       -->
 <!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2013              -->
+<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
 <!--                                                                        -->
 <!-- p1                                                                     -->
 <!--                                                                        -->
@@ -20,7 +20,7 @@
 <!-- Origin: 30                                                             -->
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: pm_hwp_attributes.xml,v 1.9 2013/09/13 21:07:46 stillgs Exp $ -->
+<!-- $Id: pm_hwp_attributes.xml,v 1.10 2013/12/19 14:43:14 stillgs Exp $ -->
 <!--
     XML file specifying Power Management HWPF attributes.
     These attributes are initialized to zero by the platform and set to a
@@ -796,5 +796,27 @@ Divider for the 1us PBAX hang pulse.  A hang is detected after two divided hang
     <writeable/>
 </attribute>
 
+<attribute>
+    <id>ATTR_PM_SLW_DEEP_WINKLE_EXIT_GOOD_HALT_ADDR</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+    Stores the offset in SLW image of the halt point for a good Deep Winkle Exit transition.  
+    This is value may used by FAPI code to check that the SLW engine achieved an expected state.
+    </description>
+    <valueType>uint32</valueType>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_PM_SLW_DEEP_SLEEP_EXIT_GOOD_HALT_ADDR</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+    Stores the offset in SLW image of the halt point for a good Deep Sleep Exit transition.  
+    This is value may used by FAPI code to check that the SLW engine achieved an expected state.
+    </description>
+    <valueType>uint32</valueType>
+    <writeable/>
+</attribute>
+
 </attributes>
 
diff --git a/src/usr/hwpf/hwp/runtime_attributes/pm_plat_attributes.xml b/src/usr/hwpf/hwp/runtime_attributes/pm_plat_attributes.xml
index ed225eba9..5abfb20a4 100644
--- a/src/usr/hwpf/hwp/runtime_attributes/pm_plat_attributes.xml
+++ b/src/usr/hwpf/hwp/runtime_attributes/pm_plat_attributes.xml
@@ -5,7 +5,7 @@
 <!--                                                                        -->
 <!-- IBM CONFIDENTIAL                                                       -->
 <!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012,2013              -->
+<!-- COPYRIGHT International Business Machines Corp. 2012,2014              -->
 <!--                                                                        -->
 <!-- p1                                                                     -->
 <!--                                                                        -->
@@ -20,7 +20,7 @@
 <!-- Origin: 30                                                             -->
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: pm_plat_attributes.xml,v 1.6 2013/07/22 02:36:28 farrugia Exp $ -->
+<!-- $Id: pm_plat_attributes.xml,v 1.7 2014/01/13 20:49:25 stillgs Exp $ -->
 <!--
     XML file specifying Power Management HWPF attributes.
     These attributes are initialized by the platform.
@@ -726,5 +726,32 @@
     <enum>FAST=0, DEEP=1</enum>
     <platInit/>
   </attribute>
-   <!-- ********************************************************************* -->
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_PM_SYSTEM_IVRMS_ENABLED</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>System control to allow (if all other attribute tests yield true values) or categorically disallow IVRM enablement
+    Producer: MRWB
+
+    Consumer:  p8_build_pstate_datablock.C
+    </description>
+    <valueType>uint8</valueType>
+    <enum>FALSE=0, TRUE=1</enum>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_PM_SYSTEM_IVRM_VPD_MIN_LEVEL</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>Version level of #M that represents the minimum for IVRM characterized parts.  
+    If this value is non-zero and the #M version level is less than this value, IVRMs are disabled.  
+    If the #M version is greater than or equal to this value, the IVRMs are allowed to be enable from a level of part perspective.
+    Producer: MRWB
+
+    Consumer:  p8_build_pstate_datablock.C
+    </description>
+    <valueType>uint8</valueType>    
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
 </attributes>
diff --git a/src/usr/targeting/common/genHwsvMrwXml.pl b/src/usr/targeting/common/genHwsvMrwXml.pl
index b257dd9b4..344540289 100755
--- a/src/usr/targeting/common/genHwsvMrwXml.pl
+++ b/src/usr/targeting/common/genHwsvMrwXml.pl
@@ -191,6 +191,8 @@ push @systemAttr,
         $reqPol->{'mem_throttle_denominator'},
     "MRW_MAX_DRAM_DATABUS_UTIL",
         $reqPol->{'max_dram_databus_util'},
+    "PM_SYSTEM_IVRMS_ENABLED", $reqPol->{'pm_system_ivrms_enabled'},
+    "PM_SYSTEM_IVRM_VPD_MIN_LEVEL", $reqPol->{'pm_system_ivrm_vpd_min_level'},
 ];
 
 #------------------------------------------------------------------------------
diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml
index 7b2c7bed9..4a1cf7fa4 100644
--- a/src/usr/targeting/common/xmltohb/attribute_types.xml
+++ b/src/usr/targeting/common/xmltohb/attribute_types.xml
@@ -12910,4 +12910,76 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript
     </enumerator>
 </enumerationType>
 
+<attribute>
+    <id>PM_SYSTEM_IVRMS_ENABLED</id>
+    <description>System control to allow (if all other attribute tests yield true values) or categorically disallow IVRM enablement
+     Producer: MRWB
+     Consumer:  p8_build_pstate_datablock.C
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SYSTEM_IVRMS_ENABLED</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SYSTEM_IVRM_VPD_MIN_LEVEL</id>
+    <description>Version level of #M that represents the minimum for IVRM characterized parts.
+     If this value is non-zero and the #M version level is less than this value, IVRMs are disabled.
+     If the #M version is greater than or equal to this value, the IVRMs are allowed to be enable from a level of part perspective.
+     Producer: MRWB
+     Consumer:  p8_build_pstate_datablock.C
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SYSTEM_IVRM_VPD_MIN_LEVEL</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SLW_DEEP_WINKLE_EXIT_GOOD_HALT_ADDR</id>
+    <description>
+    Stores the offset in SLW image of the halt point for a good Deep Winkle Exit transition.
+    This is value may used by FAPI code to check that the SLW engine achieved an expected state.
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SLW_DEEP_WINKLE_EXIT_GOOD_HALT_ADDR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SLW_DEEP_SLEEP_EXIT_GOOD_HALT_ADDR</id>
+    <description>
+    Stores the offset in SLW image of the halt point for a good Deep Sleep Exit transition.
+    This is value may used by FAPI code to check that the SLW engine achieved an expected state.
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SLW_DEEP_SLEEP_EXIT_GOOD_HALT_ADDR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
 </attributes>
diff --git a/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml b/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml
index 567449d52..a4beb64c5 100644
--- a/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml
+++ b/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml
@@ -299,6 +299,12 @@
         <id>MRW_MAX_DRAM_DATABUS_UTIL</id>
         <default>5625</default>
     </attribute>
+    <attribute><id>PM_SYSTEM_IVRMS_ENABLED</id>
+        <default>0</default>
+    </attribute>
+    <attribute><id>PM_SYSTEM_IVRM_VPD_MIN_LEVEL</id>
+        <default>0</default>
+    </attribute>
 </targetInstance>
 
 <!-- System node 0 -->
diff --git a/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml b/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml
index f37e3f58a..f7451cfad 100644
--- a/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml
+++ b/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml
@@ -291,6 +291,12 @@
         <id>MRW_MAX_DRAM_DATABUS_UTIL</id>
         <default>5625</default>
     </attribute>
+    <attribute><id>PM_SYSTEM_IVRMS_ENABLED</id>
+        <default>0</default>
+    </attribute>
+    <attribute><id>PM_SYSTEM_IVRM_VPD_MIN_LEVEL</id>
+        <default>0</default>
+    </attribute>
 </targetInstance>
 
 <!-- System node 0 -->
diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml
index 46d7d5dcf..63c4ca7a2 100644
--- a/src/usr/targeting/common/xmltohb/target_types.xml
+++ b/src/usr/targeting/common/xmltohb/target_types.xml
@@ -221,6 +221,10 @@
     <attribute><id>MRW_MEM_THROTTLE_DENOMINATOR</id></attribute>
     <attribute><id>MRW_MAX_DRAM_DATABUS_UTIL</id></attribute>
     <attribute><id>RECONFIGURE_LOOP</id></attribute>
+    <attribute><id>PM_SYSTEM_IVRMS_ENABLED</id></attribute>
+    <attribute><id>PM_SYSTEM_IVRM_VPD_MIN_LEVEL</id></attribute>
+    <attribute><id>PM_SLW_DEEP_WINKLE_EXIT_GOOD_HALT_ADDR</id></attribute>
+    <attribute><id>PM_SLW_DEEP_SLEEP_EXIT_GOOD_HALT_ADDR</id></attribute>
 </targetType>
 
 <targetType>
diff --git a/src/usr/targeting/common/xmltohb/vbu_MURANO.system.xml b/src/usr/targeting/common/xmltohb/vbu_MURANO.system.xml
index f57b3b1bd..492b93a30 100644
--- a/src/usr/targeting/common/xmltohb/vbu_MURANO.system.xml
+++ b/src/usr/targeting/common/xmltohb/vbu_MURANO.system.xml
@@ -278,6 +278,12 @@
         <id>MRW_MAX_DRAM_DATABUS_UTIL</id>
         <default>5625</default>
     </attribute>
+    <attribute><id>PM_SYSTEM_IVRMS_ENABLED</id>
+        <default>0</default>
+    </attribute>
+    <attribute><id>PM_SYSTEM_IVRM_VPD_MIN_LEVEL</id>
+        <default>0</default>
+    </attribute>
 </targetInstance>
 
 <!-- System node 0 -->
diff --git a/src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml b/src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml
index 2b3a77d16..4979679b3 100644
--- a/src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml
+++ b/src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml
@@ -279,6 +279,12 @@
         <id>MRW_MAX_DRAM_DATABUS_UTIL</id>
         <default>5625</default>
     </attribute>
+    <attribute><id>PM_SYSTEM_IVRMS_ENABLED</id>
+        <default>0</default>
+    </attribute>
+    <attribute><id>PM_SYSTEM_IVRM_VPD_MIN_LEVEL</id>
+        <default>0</default>
+    </attribute>
 </targetInstance>
 
 <!-- System node 0 -->