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author | Santosh Balasubramanian <sbalasub@in.ibm.com> | 2017-02-23 10:06:08 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-03-13 18:08:49 -0400 |
commit | ef935d393c9d17f41b2495d790f489d9c26ec2f6 (patch) | |
tree | 207009f270390831c91306f3a837a6c6a63e8fe7 | |
parent | a0c2aa6132a0b49975327f5aa9238d1d3e2b750b (diff) | |
download | talos-hostboot-ef935d393c9d17f41b2495d790f489d9c26ec2f6.tar.gz talos-hostboot-ef935d393c9d17f41b2495d790f489d9c26ec2f6.zip |
Updated for google requirement - Added force_security parameter
Change-Id: I2455264ef75c0a94b92d5b7e7bee6c488be08e0a
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36922
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com>
Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36993
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
-rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_update_security_ctrl.C | 5 | ||||
-rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_update_security_ctrl.H | 7 |
2 files changed, 8 insertions, 4 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_update_security_ctrl.C b/src/import/chips/p9/procedures/hwp/perv/p9_update_security_ctrl.C index 1c1d2d7e3..a2f22062c 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_update_security_ctrl.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_update_security_ctrl.C @@ -48,7 +48,8 @@ #include "p9_update_security_ctrl.H" -fapi2::ReturnCode p9_update_security_ctrl(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip) +fapi2::ReturnCode p9_update_security_ctrl(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip, + bool i_force_security) { FAPI_INF("p9_update_security_ctrl : Entering ..."); @@ -66,7 +67,7 @@ fapi2::ReturnCode p9_update_security_ctrl(const fapi2::Target<fapi2::TARGET_TYPE l_in_secure_mode = l_data64.getBit<PU_SECURITY_SWITCH_REGISTER_SECURE_ACCESS>(); - if (l_in_secure_mode == 1) //Chip in Secure mode + if ((l_in_secure_mode == 1) || (i_force_security)) //Chip in Secure mode or override with i_force_security parameter { //Set bit 4 to set SUL l_data64.setBit<PU_SECURITY_SWITCH_REGISTER_SEEPROM_UPDATE_LOCK>(); diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_update_security_ctrl.H b/src/import/chips/p9/procedures/hwp/perv/p9_update_security_ctrl.H index 3bc6a3018..3ca4071a8 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_update_security_ctrl.H +++ b/src/import/chips/p9/procedures/hwp/perv/p9_update_security_ctrl.H @@ -45,14 +45,17 @@ #include <fapi2.H> -typedef fapi2::ReturnCode (*p9_update_security_ctrl_FP_t)(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&); +typedef fapi2::ReturnCode (*p9_update_security_ctrl_FP_t)(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&, + bool ); /// /// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @param[in] i_force_security Forces setting of SUL and TDP (if attribute is set) /// @return FAPI2_RC_SUCCESS if success, else error code. extern "C" { - fapi2::ReturnCode p9_update_security_ctrl(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip); + fapi2::ReturnCode p9_update_security_ctrl(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip, + bool i_force_security = false); } #endif |