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authorDean Sanner <dsanner@us.ibm.com>2019-12-04 12:34:54 -0600
committerDaniel M Crowell <dcrowell@us.ibm.com>2020-01-08 09:40:37 -0600
commitd99b1eddcac8a7f43a0d087921fbb83be450f347 (patch)
tree93ba19eb008e10ba79ffd9e0641da81322dbc4a2
parent81abe97b78b39d20bb31e29535885a99ac4a8122 (diff)
downloadtalos-hostboot-d99b1eddcac8a7f43a0d087921fbb83be450f347.tar.gz
talos-hostboot-d99b1eddcac8a7f43a0d087921fbb83be450f347.zip
Add SBE Arch dump area for both OPAL & PHYP
Currently Hostboot only sets up the architected dump capture on the SBE for OPAL based systems. This commit adds the setup to PHYP based systems as well. Change-Id: I96271a57f7c15c571495ed56ea72dbeeebab8d94 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/88095 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: MURULIDHAR NATARAJU <murulidhar@in.ibm.com> Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
-rw-r--r--src/usr/dump/dumpCollect.C38
-rw-r--r--src/usr/isteps/istep21/call_host_runtime_setup.C46
-rw-r--r--src/usr/runtime/populate_hbruntime.C108
-rwxr-xr-xsrc/usr/targeting/common/xmltohb/attribute_types_hb.xml18
-rw-r--r--src/usr/targeting/common/xmltohb/target_types_hb.xml5
5 files changed, 141 insertions, 74 deletions
diff --git a/src/usr/dump/dumpCollect.C b/src/usr/dump/dumpCollect.C
index 6b95a2c2d..f27dad5be 100644
--- a/src/usr/dump/dumpCollect.C
+++ b/src/usr/dump/dumpCollect.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2012,2019 */
+/* Contributors Listed Below - COPYRIGHT 2012,2020 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -196,16 +196,30 @@ errlHndl_t copyArchitectedRegs(void)
procTableEntry = reinterpret_cast<procDumpAreaEntry *>(procTableAddr);
pDstAddrBase = getPhysAddr(procTableEntry->dstArrayAddr);
vMapDstAddrBase = mm_block_map(pDstAddrBase,
- procTableEntry->dstArraySize);
+ (ALIGN_PAGE(procTableEntry->dstArraySize) + PAGESIZE));
+
+ //Need to adjust actual virtual address due to mm_block_map only
+ //mapping on page boundary to account for non page aligned addresses
+ //from PHYP/OPAL
+ uint64_t tmpAddr = reinterpret_cast<uint64_t>(vMapDstAddrBase);
+ vMapDstAddrBase = reinterpret_cast<void*>(tmpAddr +
+ (procTableEntry->dstArrayAddr & (PAGESIZE-1)));
// Map architected register reserved memory to VA addresses
- uint64_t srcAddr = ISTEP::get_top_homer_mem_addr() -
- VMM_ARCH_REG_DATA_SIZE_ALL_PROC -
- VMM_ALL_HOMER_OCC_MEMORY_SIZE;
+ TARGETING::Target * l_sys = NULL;
+ TARGETING::targetService().getTopLevelTarget( l_sys );
+ assert(l_sys != NULL);
+ auto srcAddr =
+ l_sys->getAttr<TARGETING::ATTR_SBE_ARCH_DUMP_ADDR>();
+
pSrcAddrBase = reinterpret_cast<void * const>(srcAddr);
vMapSrcAddrBase = mm_block_map(pSrcAddrBase,
VMM_ARCH_REG_DATA_SIZE_ALL_PROC);
+ TRACDCOMP(g_trac_dump, "src address [0x%X] [%p], destArrayaddr"
+ " [%X] dest[%p] [%p]", srcAddr, vMapSrcAddrBase,
+ procTableEntry->dstArrayAddr, pDstAddrBase, vMapDstAddrBase);
+
// Get list of functional processor chips, in MPIPL path we
// don't expect any deconfiguration
TARGETING::TargetHandleList procChips;
@@ -214,13 +228,14 @@ errlHndl_t copyArchitectedRegs(void)
uint64_t dstTempAddr = reinterpret_cast<uint64_t>(vMapDstAddrBase);
procTableEntry->capArraySize = 0;
- for (const auto & procChip: procChips)
+ for (uint32_t procNum = 0; procNum < procChips.size(); procNum++)
{
- uint8_t procNum = procChip->getAttr<TARGETING::ATTR_POSITION>();
// Base addresses w.r.t PROC positions. This is static here
// and used for reference below to calculate all other addresses
uint64_t procSrcAddr = (reinterpret_cast<uint64_t>(vMapSrcAddrBase)+
procNum * VMM_ARCH_REG_DATA_PER_PROC_SIZE);
+ TRACDCOMP(g_trac_dump, "SBE Proc[%d] [%p]", procNum, procSrcAddr);
+ procNum++;
sbeArchRegDumpProcHdr_t *sbeProcHdr =
reinterpret_cast<sbeArchRegDumpProcHdr_t *>(procSrcAddr);
@@ -294,11 +309,15 @@ errlHndl_t copyArchitectedRegs(void)
hostArchRegDataHdr *hostHdr =
reinterpret_cast<hostArchRegDataHdr *>(dstTempAddr);
+ TRACDCOMP(g_trac_dump, " Thread[%d] src[%p] dest[%p]",
+ idx, procSrcAddr, dstTempAddr);
+
// Fill thread header info
+ memset(hostHdr, 0x0, sizeof(hostHdr));
hostHdr->pir = sbeTdHdr->pir;
hostHdr->coreState = sbeTdHdr->coreState;
hostHdr->iv_regArrayHdr.hdatOffset =
- sizeof(HDAT::hdatHDIFDataArray_t);
+ sizeof(hostArchRegDataHdr);
hostHdr->iv_regArrayHdr.hdatArrayCnt = regCount;
hostHdr->iv_regArrayHdr.hdatAllocSize =
sizeof(hostArchRegDataEntry);
@@ -367,9 +386,6 @@ errlHndl_t copyArchitectedRegs(void)
procTableEntry->capArrayAddr = procTableEntry->dstArrayAddr;
// Update the PDA Table Entries to Attribute to be fetched in istep 21
- TARGETING::TargetService& targetService = TARGETING::targetService();
- TARGETING::Target* l_sys = NULL;
- targetService.getTopLevelTarget(l_sys);
l_sys->setAttr<TARGETING::ATTR_PDA_THREAD_REG_STATE_ENTRY_FORMAT>(
procTableEntry->threadRegVersion);
l_sys->setAttr<TARGETING::ATTR_PDA_THREAD_REG_ENTRY_SIZE>(
diff --git a/src/usr/isteps/istep21/call_host_runtime_setup.C b/src/usr/isteps/istep21/call_host_runtime_setup.C
index 5367d65bf..db0fc2d5f 100644
--- a/src/usr/isteps/istep21/call_host_runtime_setup.C
+++ b/src/usr/isteps/istep21/call_host_runtime_setup.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2019 */
+/* Contributors Listed Below - COPYRIGHT 2015,2020 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -70,6 +70,9 @@
#include <isteps/nvdimm/nvdimm.H>
#endif
+#include <dump/dumpif.H>
+
+
using namespace ERRORLOG;
using namespace ISTEP;
using namespace ISTEP_ERROR;
@@ -864,6 +867,15 @@ void* call_host_runtime_setup (void *io_pArgs)
TargetService& l_targetService = targetService();
Target* l_sys = nullptr;
l_targetService.getTopLevelTarget(l_sys);
+
+ // Default captured data to 0s -- MPIPL if check fills in if
+ // valid
+ uint32_t threadRegSize = sizeof(DUMP::hostArchRegDataHdr)+
+ (95 * sizeof(DUMP::hostArchRegDataEntry));
+ uint8_t threadRegFormat = REG_DUMP_SBE_HB_STRUCT_VER;
+ uint64_t capThreadArrayAddr = 0;
+ uint64_t capThreadArraySize = 0;
+
if(l_sys->getAttr<ATTR_IS_MPIPL_HB>())
{
uint32_t l_mdrtCount =
@@ -875,25 +887,23 @@ void* call_host_runtime_setup (void *io_pArgs)
l_mdrtCount);
}
- // Update PDA Table entries
- if ( !INITSERVICE::spBaseServicesEnabled() )
- {
- uint32_t threadRegSize =
- l_sys->getAttr<TARGETING::ATTR_PDA_THREAD_REG_ENTRY_SIZE>();
- uint8_t threadRegFormat =
- l_sys->getAttr<TARGETING::ATTR_PDA_THREAD_REG_STATE_ENTRY_FORMAT>();
- uint64_t capThreadArrayAddr =
- l_sys->getAttr<TARGETING::ATTR_PDA_CAPTURED_THREAD_REG_ARRAY_ADDR>();
- uint64_t capThreadArraySize =
- l_sys->getAttr<TARGETING::ATTR_PDA_CAPTURED_THREAD_REG_ARRAY_SIZE>();
-
- // Ignore return value
- RUNTIME::updateHostProcDumpActual( RUNTIME::PROC_DUMP_AREA_TBL,
- threadRegSize, threadRegFormat,
- capThreadArrayAddr, capThreadArraySize);
- }
+
+ threadRegSize =
+ l_sys->getAttr<TARGETING::ATTR_PDA_THREAD_REG_ENTRY_SIZE>();
+ threadRegFormat =
+ l_sys->getAttr<TARGETING::ATTR_PDA_THREAD_REG_STATE_ENTRY_FORMAT>();
+ capThreadArrayAddr =
+ l_sys->getAttr<TARGETING::ATTR_PDA_CAPTURED_THREAD_REG_ARRAY_ADDR>();
+ capThreadArraySize =
+ l_sys->getAttr<TARGETING::ATTR_PDA_CAPTURED_THREAD_REG_ARRAY_SIZE>();
}
+ // Ignore return value
+ RUNTIME::updateHostProcDumpActual( RUNTIME::PROC_DUMP_AREA_TBL,
+ threadRegSize, threadRegFormat,
+ capThreadArrayAddr, capThreadArraySize);
+
+
//Update the MDRT value (for MS Dump)
l_err = RUNTIME::writeActualCount(RUNTIME::MS_DUMP_RESULTS_TBL);
if(l_err != NULL)
diff --git a/src/usr/runtime/populate_hbruntime.C b/src/usr/runtime/populate_hbruntime.C
index c45ebb1ad..5ead63b3e 100644
--- a/src/usr/runtime/populate_hbruntime.C
+++ b/src/usr/runtime/populate_hbruntime.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016,2019 */
+/* Contributors Listed Below - COPYRIGHT 2016,2020 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -1279,51 +1279,10 @@ errlHndl_t populate_HbRsvMem(uint64_t i_nodeId, bool i_master_node)
break;
}
- ////////////////////////////////////////////////////////////////////
- // Set the Architected Reserve area in OPAL and pass it down to SBE
- uint64_t l_memBase = l_topMemAddr
- - VMM_ALL_HOMER_OCC_MEMORY_SIZE
- - VMM_ARCH_REG_DATA_SIZE_ALL_PROC;
-
- l_elog = setNextHbRsvMemEntry(HDAT::RHB_TYPE_HBRT,
- i_nodeId,
- l_memBase,
- VMM_ARCH_REG_DATA_SIZE_ALL_PROC,
- HBRT_RSVD_MEM__ARCH_REG);
- if(l_elog)
- {
- break;
- }
- // Loop through all functional Procs
- for (const auto & l_procChip: l_procChips)
- {
- uint32_t l_procNum =
- l_procChip->getAttr<TARGETING::ATTR_POSITION>();
- l_homerAddr = l_memBase +
- (l_procNum * VMM_ARCH_REG_DATA_PER_PROC_SIZE);
-
- //Pass start address down to SBE via chipop
- l_elog = SBEIO::sendPsuStashKeyAddrRequest(
- SBEIO::ARCH_REG_DATA_ADDR,
- l_homerAddr,
- l_procChip);
- if (l_elog)
- {
- TRACFCOMP( g_trac_runtime, "sendPsuStashKeyAddrRequest "
- "failed for target: %x",TARGETING::get_huid(l_procChip));
- break;
- }
- }
-
- if(l_elog)
- {
- break;
- }
- ////////////////////////////////////////////////////////////////////
-
#ifdef CONFIG_START_OCC_DURING_BOOT
///////////////////////////////////////////////////
// OCC Common entry
+ ///////////////////////////////////////////////////
if( !(TARGETING::is_phyp_load()) )
{
TARGETING::Target * l_sys = nullptr;
@@ -1346,6 +1305,69 @@ errlHndl_t populate_HbRsvMem(uint64_t i_nodeId, bool i_master_node)
#endif
}
+ ///////////////////////////////////////////////////
+ // Set the SBE Architected Dump area
+ // Note that this is right after HOMER areas
+ // PHYP goes up, OPAL goes down. Save this away
+ // Into targeting so dumpCollect can find later
+ // on the MPIPL
+ //
+ // Note that this works for PHYP multinode (as it
+ // grabs location from HRMOR), but OPAL only
+ // supports a single node style system (absolute
+ // address)
+ //////////////////////////////////////////////////
+ uint64_t l_archAddr = 0;
+ if(TARGETING::is_phyp_load())
+ {
+ l_archAddr = cpu_spr_value(CPU_SPR_HRMOR)
+ + l_mirrorBase
+ + VMM_ARCH_REG_DATA_START_OFFSET;
+ }
+ else if(TARGETING::is_sapphire_load())
+ {
+ l_archAddr = l_topMemAddr
+ - VMM_ALL_HOMER_OCC_MEMORY_SIZE
+ - VMM_ARCH_REG_DATA_SIZE_ALL_PROC;
+ }
+ l_sys->setAttr<TARGETING::ATTR_SBE_ARCH_DUMP_ADDR>(l_archAddr);
+
+ // SBE Architected Dump area is a single chunk of data
+ // to OPAL/PHYP -- so reserve once, but need to inform
+ // individual SBEs of their location
+ l_elog = setNextHbRsvMemEntry(HDAT::RHB_TYPE_HBRT,
+ i_nodeId,
+ l_archAddr,
+ VMM_ARCH_REG_DATA_SIZE_ALL_PROC,
+ HBRT_RSVD_MEM__ARCH_REG);
+ if(l_elog)
+ {
+ break;
+ }
+
+ // Loop through all functional Procs
+ uint32_t l_procNum = 0;
+ for (const auto & l_procChip: l_procChips)
+ {
+ uint64_t l_addr = l_archAddr +
+ (l_procNum++ * VMM_ARCH_REG_DATA_PER_PROC_SIZE);
+
+ //Pass start address down to SBE via chipop
+ l_elog = SBEIO::sendPsuStashKeyAddrRequest(
+ SBEIO::ARCH_REG_DATA_ADDR,
+ l_addr,
+ l_procChip);
+ if (l_elog)
+ {
+ TRACFCOMP( g_trac_runtime, "Arch dump sendPsuStashKeyAddrRequest "
+ "failed for target: %x",TARGETING::get_huid(l_procChip));
+ break;
+ }
+ }
+ if(l_elog)
+ {
+ break;
+ }
////////////////////////////////////////////////////
// HB Data area
diff --git a/src/usr/targeting/common/xmltohb/attribute_types_hb.xml b/src/usr/targeting/common/xmltohb/attribute_types_hb.xml
index 5978de341..7d9af5904 100755
--- a/src/usr/targeting/common/xmltohb/attribute_types_hb.xml
+++ b/src/usr/targeting/common/xmltohb/attribute_types_hb.xml
@@ -5,7 +5,7 @@
<!-- -->
<!-- OpenPOWER HostBoot Project -->
<!-- -->
-<!-- Contributors Listed Below - COPYRIGHT 2012,2019 -->
+<!-- Contributors Listed Below - COPYRIGHT 2012,2020 -->
<!-- [+] Google Inc. -->
<!-- [+] International Business Machines Corp. -->
<!-- -->
@@ -1300,6 +1300,22 @@
</attribute>
<attribute>
+ <id>SBE_ARCH_DUMP_ADDR</id>
+ <description>
+ Physical address where SBE Architectued Dump Area is located (per
+ Hostboot Instance). Set in istep 21 it is only used during
+ MPIPLs to retrieve the the architected processor state (SPR/GPR)
+ </description>
+ <simpleType>
+ <uint64_t/>
+ </simpleType>
+ <persistency>volatile-zeroed</persistency>
+ <readable/>
+ <writeable/>
+ <hbOnly/>
+ </attribute>
+
+ <attribute>
<id>SBE_COMM_ADDR</id>
<description>
Virtual address where SBE Communications are placed in mainstore.
diff --git a/src/usr/targeting/common/xmltohb/target_types_hb.xml b/src/usr/targeting/common/xmltohb/target_types_hb.xml
index 8cb8bae1c..e2be5b6f8 100644
--- a/src/usr/targeting/common/xmltohb/target_types_hb.xml
+++ b/src/usr/targeting/common/xmltohb/target_types_hb.xml
@@ -5,7 +5,7 @@
<!-- -->
<!-- OpenPOWER HostBoot Project -->
<!-- -->
-<!-- Contributors Listed Below - COPYRIGHT 2012,2019 -->
+<!-- Contributors Listed Below - COPYRIGHT 2012,2020 -->
<!-- [+] Google Inc. -->
<!-- [+] International Business Machines Corp. -->
<!-- -->
@@ -369,6 +369,9 @@
<attribute>
<id>PHYS_PRES_REQUEST_OPEN_WINDOW</id>
</attribute>
+ <attribute>
+ <id>SBE_ARCH_DUMP_ADDR</id>
+ </attribute>
</targetTypeExtension>
<targetTypeExtension>
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