summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorAdam Hale <adam.samuel.hale@ibm.com>2018-10-31 11:45:21 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2018-11-09 15:26:25 -0600
commitd83a4ee8495c5ad4b823c26b1a09a3c886882494 (patch)
tree6480c2e267849fa7d254d3075970e7c07b6db14a
parenta690866298f5d360a6512351ce15cce67e2c7fd3 (diff)
downloadtalos-hostboot-d83a4ee8495c5ad4b823c26b1a09a3c886882494.tar.gz
talos-hostboot-d83a4ee8495c5ad4b823c26b1a09a3c886882494.zip
SW449387 - Removed Centaur Bad Lane voting disable and CRC tally
Change-Id: Iaf1010db041c964893757caa472098d64177bab5 CQ: SW449387 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68223 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Marc Gollub <gollub@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68231 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
-rw-r--r--src/import/chips/centaur/procedures/hwp/initfiles/centaur_dmi_scom.C23
-rw-r--r--src/import/chips/centaur/procedures/hwp/initfiles/centaur_mbs_scom.C16
2 files changed, 4 insertions, 35 deletions
diff --git a/src/import/chips/centaur/procedures/hwp/initfiles/centaur_dmi_scom.C b/src/import/chips/centaur/procedures/hwp/initfiles/centaur_dmi_scom.C
index eb88947e8..a7d331501 100644
--- a/src/import/chips/centaur/procedures/hwp/initfiles/centaur_dmi_scom.C
+++ b/src/import/chips/centaur/procedures/hwp/initfiles/centaur_dmi_scom.C
@@ -42,10 +42,7 @@ constexpr uint64_t literal_0b0011000 = 0b0011000;
constexpr uint64_t literal_0b0010001 = 0b0010001;
constexpr uint64_t literal_0b00 = 0b00;
constexpr uint64_t literal_0b11 = 0b11;
-constexpr uint64_t literal_0x1 = 0x1;
-constexpr uint64_t literal_0x0 = 0x0;
constexpr uint64_t literal_0b1000000 = 0b1000000;
-constexpr uint64_t literal_0b0001111 = 0b0001111;
constexpr uint64_t literal_0b101 = 0b101;
constexpr uint64_t literal_0b0111 = 0b0111;
constexpr uint64_t literal_0b0011 = 0b0011;
@@ -78,11 +75,6 @@ fapi2::ReturnCode centaur_dmi_scom(const fapi2::Target<fapi2::TARGET_TYPE_MEMBUF
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_IS_SIMULATION, TGT1, l_TGT1_ATTR_IS_SIMULATION));
uint64_t l_def_IS_HW = (l_TGT1_ATTR_IS_SIMULATION == literal_0);
uint64_t l_def_IS_SIM = (l_TGT1_ATTR_IS_SIMULATION == literal_1);
- fapi2::ATTR_RISK_LEVEL_Type l_TGT1_ATTR_RISK_LEVEL;
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_RISK_LEVEL, TGT1, l_TGT1_ATTR_RISK_LEVEL));
- fapi2::ATTR_CHIP_EC_FEATURE_HW439321_FIXED_IN_P9UDD13_Type l_TGT2_ATTR_CHIP_EC_FEATURE_HW439321_FIXED_IN_P9UDD13;
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW439321_FIXED_IN_P9UDD13, TGT2,
- l_TGT2_ATTR_CHIP_EC_FEATURE_HW439321_FIXED_IN_P9UDD13));
fapi2::ATTR_EI_BUS_TX_MSBSWAP_Type l_TGT0_ATTR_EI_BUS_TX_MSBSWAP;
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_EI_BUS_TX_MSBSWAP, TGT0, l_TGT0_ATTR_EI_BUS_TX_MSBSWAP));
fapi2::buffer<uint64_t> l_scom_buffer;
@@ -596,27 +588,16 @@ fapi2::ReturnCode centaur_dmi_scom(const fapi2::Target<fapi2::TARGET_TYPE_MEMBUF
{
FAPI_TRY(fapi2::getScom( TGT0, 0x8009d8000201043full, l_scom_buffer ));
- if (((( ! l_TGT2_ATTR_CHIP_EC_FEATURE_HW439321_FIXED_IN_P9UDD13) || (l_TGT1_ATTR_RISK_LEVEL == literal_0x0))
- || (l_TGT1_ATTR_RISK_LEVEL == literal_0x1)))
+ if (( true ))
{
l_scom_buffer.insert<48, 7, 57, uint64_t>(literal_0b1000000 );
}
- else if (( true ))
- {
- l_scom_buffer.insert<48, 7, 57, uint64_t>(literal_0b0001111 );
- }
- if (((( ! l_TGT2_ATTR_CHIP_EC_FEATURE_HW439321_FIXED_IN_P9UDD13) || (l_TGT1_ATTR_RISK_LEVEL == literal_0x0))
- || (l_TGT1_ATTR_RISK_LEVEL == literal_0x1)))
+ if (( true ))
{
constexpr auto l_DMI_RX_RXCTL_RX_CTL_REGS_RX_DYN_RPR_ERR_CNTR1_DURATION_TAP2 = 0x2;
l_scom_buffer.insert<55, 4, 60, uint64_t>(l_DMI_RX_RXCTL_RX_CTL_REGS_RX_DYN_RPR_ERR_CNTR1_DURATION_TAP2 );
}
- else if (( true ))
- {
- constexpr auto l_DMI_RX_RXCTL_RX_CTL_REGS_RX_DYN_RPR_ERR_CNTR1_DURATION_TAP7 = 0x7;
- l_scom_buffer.insert<55, 4, 60, uint64_t>(l_DMI_RX_RXCTL_RX_CTL_REGS_RX_DYN_RPR_ERR_CNTR1_DURATION_TAP7 );
- }
l_scom_buffer.insert<61, 3, 61, uint64_t>(literal_0b101 );
FAPI_TRY(fapi2::putScom(TGT0, 0x8009d8000201043full, l_scom_buffer));
diff --git a/src/import/chips/centaur/procedures/hwp/initfiles/centaur_mbs_scom.C b/src/import/chips/centaur/procedures/hwp/initfiles/centaur_mbs_scom.C
index ae02abd32..c912b3314 100644
--- a/src/import/chips/centaur/procedures/hwp/initfiles/centaur_mbs_scom.C
+++ b/src/import/chips/centaur/procedures/hwp/initfiles/centaur_mbs_scom.C
@@ -34,8 +34,6 @@ constexpr uint64_t literal_0b0 = 0b0;
constexpr uint64_t literal_0b0000000 = 0b0000000;
constexpr uint64_t literal_0x0 = 0x0;
constexpr uint64_t literal_0b00000 = 0b00000;
-constexpr uint64_t literal_0x1 = 0x1;
-constexpr uint64_t literal_0b1 = 0b1;
constexpr uint64_t literal_0b010010 = 0b010010;
constexpr uint64_t literal_0b00 = 0b00;
constexpr uint64_t literal_0b00000000000000000000 = 0b00000000000000000000;
@@ -66,6 +64,7 @@ constexpr uint64_t literal_8 = 8;
constexpr uint64_t literal_0b10 = 0b10;
constexpr uint64_t literal_4 = 4;
constexpr uint64_t literal_0b01 = 0b01;
+constexpr uint64_t literal_0b1 = 0b1;
constexpr uint64_t literal_13 = 13;
constexpr uint64_t literal_10 = 10;
constexpr uint64_t literal_12 = 12;
@@ -125,13 +124,6 @@ fapi2::ReturnCode centaur_mbs_scom(const fapi2::Target<fapi2::TARGET_TYPE_MEMBUF
fapi2::ATTR_NAME_Type l_chip_id;
FAPI_TRY(FAPI_ATTR_GET_PRIVILEGED(fapi2::ATTR_NAME, TGT4, l_chip_id));
FAPI_TRY(FAPI_ATTR_GET_PRIVILEGED(fapi2::ATTR_EC, TGT4, l_chip_ec));
- fapi2::ATTR_RISK_LEVEL_Type l_TGT3_ATTR_RISK_LEVEL;
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_RISK_LEVEL, TGT3, l_TGT3_ATTR_RISK_LEVEL));
- fapi2::ATTR_CHIP_EC_FEATURE_HW439321_FIXED_IN_P9UDD13_Type l_TGT4_ATTR_CHIP_EC_FEATURE_HW439321_FIXED_IN_P9UDD13;
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW439321_FIXED_IN_P9UDD13, TGT4,
- l_TGT4_ATTR_CHIP_EC_FEATURE_HW439321_FIXED_IN_P9UDD13));
- uint64_t l_def_hw439321_wa = ((( ! l_TGT4_ATTR_CHIP_EC_FEATURE_HW439321_FIXED_IN_P9UDD13)
- || (l_TGT3_ATTR_RISK_LEVEL == literal_0x0)) || (l_TGT3_ATTR_RISK_LEVEL == literal_0x1));
fapi2::ATTR_CEN_MSS_DERIVED_MBA_ADDR_INTERLEAVE_BIT_Type l_TGT0_ATTR_CEN_MSS_DERIVED_MBA_ADDR_INTERLEAVE_BIT;
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CEN_MSS_DERIVED_MBA_ADDR_INTERLEAVE_BIT, TGT0,
l_TGT0_ATTR_CEN_MSS_DERIVED_MBA_ADDR_INTERLEAVE_BIT));
@@ -792,14 +784,10 @@ fapi2::ReturnCode centaur_mbs_scom(const fapi2::Target<fapi2::TARGET_TYPE_MEMBUF
l_scom_buffer.insert<21, 5, 59, uint64_t>(literal_0b00000 );
}
- if ((l_def_hw439321_wa == literal_1))
+ if (literal_1)
{
l_scom_buffer.insert<26, 1, 63, uint64_t>(literal_0b0 );
}
- else if (literal_1)
- {
- l_scom_buffer.insert<26, 1, 63, uint64_t>(literal_0b1 );
- }
if (literal_1)
{
OpenPOWER on IntegriCloud