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authorDean Sanner <dsanner@us.ibm.com>2018-03-07 08:23:19 -0600
committerDaniel M. Crowell <dcrowell@us.ibm.com>2018-03-08 21:25:27 -0500
commitd6f9a2206311d4b7e67462215e736253d9c6a5b1 (patch)
treea42536a33ed83a58ceb896b40b160e94ac31eb85
parentb98f4c6b59fa881b95d1022333ffafb2f927427b (diff)
downloadtalos-hostboot-d6f9a2206311d4b7e67462215e736253d9c6a5b1.tar.gz
talos-hostboot-d6f9a2206311d4b7e67462215e736253d9c6a5b1.zip
Force 25G Nvlink speed on P9N DD2.1
Normally the OBUS PLL frequency is controlled via the MRW, however P9NDD2.1 has a bug that forces the OBus freq to 25G. Desire is to allow the MRW to set to a higher freq, but MRW doesn't have entries for per chip EC, so this commit just handles down leveling P9N DD2.1 (as a chip restriction) Change-Id: I542f7810a69facb919cc3889ae3ed5ca0a233445 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55195 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> CI-Ready: Dean Sanner <dsanner@us.ibm.com> CI-Ready: Corey V. Swenson <cswenson@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: ERICH J. HAUPTLI <ejhauptl@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
-rw-r--r--src/include/arch/pvrformat.H20
-rw-r--r--src/usr/isteps/istep06/call_host_voltage_config.C21
2 files changed, 39 insertions, 2 deletions
diff --git a/src/include/arch/pvrformat.H b/src/include/arch/pvrformat.H
index 2a2616dd4..3e233c50d 100644
--- a/src/include/arch/pvrformat.H
+++ b/src/include/arch/pvrformat.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2017 */
+/* Contributors Listed Below - COPYRIGHT 2017,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -115,6 +115,8 @@ struct PVR_t
{
NIMBUS_DD1_MASK = 0x00FF2F0F,
IS_NIMBUS_DD1 = 0x004E0100,
+ IS_NIMBUS_DD20 = 0x004E0200,
+ IS_NIMBUS_DD21 = 0x004E0201,
// Field: chipType
NIMBUS_CHIP = 0,
@@ -138,6 +140,22 @@ struct PVR_t
inline bool isNimbusDD1() {
return ((word & NIMBUS_DD1_MASK) == IS_NIMBUS_DD1);
}
+
+ /**
+ * @brief Check if DD2.0
+ * @return true if DD2.0, else false
+ */
+ inline bool isNimbusDD20() {
+ return ((word & NIMBUS_DD1_MASK) == IS_NIMBUS_DD20);
+ }
+
+ /**
+ * @brief Check if DD2.1
+ * @return true if DD2.1, else false
+ */
+ inline bool isNimbusDD21() {
+ return ((word & NIMBUS_DD1_MASK) == IS_NIMBUS_DD21);
+ }
};
#endif //_PVRFORMAT_H
diff --git a/src/usr/isteps/istep06/call_host_voltage_config.C b/src/usr/isteps/istep06/call_host_voltage_config.C
index 060e7ebe0..6cb647e9b 100644
--- a/src/usr/isteps/istep06/call_host_voltage_config.C
+++ b/src/usr/isteps/istep06/call_host_voltage_config.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016,2017 */
+/* Contributors Listed Below - COPYRIGHT 2016,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -352,6 +352,25 @@ void* call_host_voltage_config( void *io_pArgs )
"ATTR_FREQ_X_MHZ = %d",
l_sys->getAttr<ATTR_FREQ_X_MHZ>());
+ //Nimbus DD21 only supports OBUS PLL of 1563(versus product of 1611)
+ //Force it because of a chip bug instead of letting MRW control
+ PVR_t l_pvr( mmio_pvr_read() & 0xFFFFFFFF );
+ if( l_pvr.isNimbusDD21() )
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "call_host_voltage_config.C::"
+ "Nimbus DD2.1 -- Forcing ATTR_FREQ_X_MHZ = %d",
+ l_sys->getAttr<ATTR_FREQ_X_MHZ>());
+
+ TARGETING::ATTR_FREQ_O_MHZ_type l_freq_array =
+ {OBUS_PLL_FREQ_LIST_P9N_21[0],OBUS_PLL_FREQ_LIST_P9N_21[0],
+ OBUS_PLL_FREQ_LIST_P9N_21[0], OBUS_PLL_FREQ_LIST_P9N_21[0]};
+ assert(l_proc->
+ trySetAttr<TARGETING::ATTR_FREQ_O_MHZ>(l_freq_array),
+ "call_host_voltage_config.C failed to set ATTR_FREQ_O_MHZ");
+ }
+
+
// get the child EQ targets
targetService().getAssociated(
l_eqList,
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