SW211734 INITPROC: hwp update (hostboot part 1)

Change-Id: I064b610e715ca04f99f10c1e81060ced7dbdc126
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5647
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

20 files changed, 525 insertions, 166 deletions

diff --git a/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_build_smp_errors.xml b/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_build_smp_errors.xml
index d6aca2133..c70c6f450 100644
--- a/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_build_smp_errors.xml
+++ b/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_build_smp_errors.xml
@@ -20,6 +20,7 @@
 <!-- Origin: 30                                                             -->
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
+<!-- $Id: proc_build_smp_errors.xml,v 1.4 2013/05/22 15:46:58 mjjones Exp $ -->
 <!-- Error definitions for proc_build_smp -->
 <hwpErrors>
   <!-- *********************************************************************** -->
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pba_init.H b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pba_init.H
index dc92fcc4b..116bf0ee5 100644
--- a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pba_init.H
+++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pba_init.H
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-
+// $Id: p8_pba_init.H,v 1.6 2013/06/01 03:26:29 dcrowell Exp $
 
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2011
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pmc_deconfig_setup_errors.xml b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pmc_deconfig_setup_errors.xml
index 669cf8297..6c0b4bc87 100644
--- a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pmc_deconfig_setup_errors.xml
+++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_pmc_deconfig_setup_errors.xml
@@ -5,7 +5,7 @@
 <!--                                                                        -->
 <!-- IBM CONFIDENTIAL                                                       -->
 <!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012                   -->
+<!-- COPYRIGHT International Business Machines Corp. 2012,2013              -->
 <!--                                                                        -->
 <!-- p1                                                                     -->
 <!--                                                                        -->
@@ -20,13 +20,13 @@
 <!-- Origin: 30                                                             -->
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
+<!-- $Id: p8_pmc_deconfig_setup_errors.xml,v 1.2 2013/05/23 18:44:24 stillgs Exp $ -->
 <!-- Error definitions for p8_pmc_deconfig_setup procedure -->
 <hwpErrors>
   <!-- *********************************************************************** -->
   <hwpError>
     <rc>RC_PROCPM_PMC_DECONFIG_NO_CORES</rc>
-    <description>p8_pmc_deconfig_setup did not find any configured core.</description>
+    <description>p8_pmc_deconfig_setup did not find any configured core.</description>   
   </hwpError>
   <!-- *********************************************************************** -->
-
 </hwpErrors>
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_errors.xml b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_errors.xml
index 524927016..890f45fb7 100644
--- a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_errors.xml
+++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_errors.xml
@@ -5,7 +5,7 @@
 <!--                                                                        -->
 <!-- IBM CONFIDENTIAL                                                       -->
 <!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012                   -->
+<!-- COPYRIGHT International Business Machines Corp. 2012,2013              -->
 <!--                                                                        -->
 <!-- p1                                                                     -->
 <!--                                                                        -->
@@ -20,6 +20,7 @@
 <!-- Origin: 30                                                             -->
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
+<!-- $Id: p8_poreslw_errors.xml,v 1.2 2013/05/23 18:44:32 stillgs Exp $ -->
 <!-- Error definitions for p8_poreslw procedure -->
 <hwpErrors>
   <!-- *********************************************************************** -->
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar_errors.xml b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar_errors.xml
index 7c46057aa..4efeb55bc 100644
--- a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar_errors.xml
+++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_set_pore_bar_errors.xml
@@ -5,7 +5,7 @@
 <!--                                                                        -->
 <!-- IBM CONFIDENTIAL                                                       -->
 <!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012                   -->
+<!-- COPYRIGHT International Business Machines Corp. 2012,2013              -->
 <!--                                                                        -->
 <!-- p1                                                                     -->
 <!--                                                                        -->
@@ -20,6 +20,7 @@
 <!-- Origin: 30                                                             -->
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
+<!-- $Id: p8_set_pore_bar_errors.xml,v 1.3 2013/05/23 18:44:35 stillgs Exp $ -->
 <!-- Error definitions for p8_set_pore_bar procedure -->
 <hwpErrors>
   <!-- *********************************************************************** -->
diff --git a/src/usr/hwpf/hwp/bus_training/io_clear_firs.C b/src/usr/hwpf/hwp/bus_training/io_clear_firs.C
index 1d1e98e56..f4d9771fb 100644
--- a/src/usr/hwpf/hwp/bus_training/io_clear_firs.C
+++ b/src/usr/hwpf/hwp/bus_training/io_clear_firs.C
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: io_clear_firs.C,v 1.12 2013/05/29 17:43:53 jmcgill Exp $
+// $Id: io_clear_firs.C,v 1.14 2013/06/20 13:29:37 jmcgill Exp $
 // *!***************************************************************************
 // *! (C) Copyright International Business Machines Corp. 2012, 2013
 // *!           All Rights Reserved -- Property of IBM
diff --git a/src/usr/hwpf/hwp/bus_training/io_errors.xml b/src/usr/hwpf/hwp/bus_training/io_errors.xml
index 7edc497e3..45e36ddf9 100644
--- a/src/usr/hwpf/hwp/bus_training/io_errors.xml
+++ b/src/usr/hwpf/hwp/bus_training/io_errors.xml
@@ -20,6 +20,7 @@
 <!-- Origin: 30                                                             -->
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
+<!-- $Id: io_errors.xml,v 1.10 2013/07/23 22:05:40 rjknight Exp $ -->
 <!-- Error definitions for IO HWPS  -->
 <hwpErrors>
   <!-- *********************************************************************** -->
@@ -94,6 +95,16 @@
     <ffdc>READ_BUF</ffdc>
     <ffdc>WRITE_BUF</ffdc>
   </hwpError>
+    <!-- *********************************************************************** -->
+  <hwpError>
+    <rc>IO_RUN_TRAINING_DLL_WORKAROUND_FAIL</rc>
+    <description>DLL Workaround failed to arrive at a solution</description>
+  </hwpError>
+      <!-- *********************************************************************** -->
+  <hwpError>
+    <rc>IO_RUN_TRAINING_DLL_VAL_OUT_OF_BOUND_RC</rc>
+    <description>DLL Workaround encountered unexpected start value</description>
+  </hwpError>
    <!-- *********************************************************************** -->
   <hwpError>
     <rc>IO_RUN_TRAINING_INVALID_INVOCATION_RC</rc>
diff --git a/src/usr/hwpf/hwp/bus_training/io_run_training.C b/src/usr/hwpf/hwp/bus_training/io_run_training.C
index 35e1c6f14..d0ca1a529 100644
--- a/src/usr/hwpf/hwp/bus_training/io_run_training.C
+++ b/src/usr/hwpf/hwp/bus_training/io_run_training.C
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: io_run_training.C,v 1.38 2013/06/17 13:50:19 mklight Exp $
+// $Id: io_run_training.C,v 1.40 2013/06/20 06:16:29 varkeykv Exp $
 // *!***************************************************************************
 // *! (C) Copyright International Business Machines Corp. 1997, 1998
 // *!           All Rights Reserved -- Property of IBM
@@ -47,6 +47,7 @@
 #include "io_run_training.H"
 #include "io_funcs.H"
 
+
 extern "C" {
      using namespace fapi;
 // For clearing the FIR mask , used by io run training 
@@ -290,6 +291,234 @@ ReturnCode fir_workaround_post_training(const Target& master_target,  io_interfa
 	rc=clear_fir_mask_reg(master_target,fir_master_interface);
         return(rc);
 }
+
+// //HW249235 --For DLL workaround
+// This function will check DLL status on slave and slave side . If any DLL has failed it will update to the next valid
+// DLL value . 3,4,5,6 are valid values that we are given to select.
+// This will continue until we run out of valid DLL reg selects or when the DLL cal passes
+
+ReturnCode check_dll_status_and_modify(const Target &master_target, io_interface_t master_interface,const Target &slave_target,
+                                       io_interface_t slave_interface,bool dll_master_array[16],
+                                       bool dll_slave_array[16],bool &dll_workaround_done,bool &dll_workaround_fail)
+{
+     ReturnCode rc;
+     uint32_t rc_ecmd=0;
+     ecmdDataBufferBase dll_reg(16),set_bits(16),clear_bits(16),temp_bits(16);
+     const uint16_t dll_vals[]={2,3,4,5,6,7};
+     uint16_t bits=0;
+     uint16_t dll_value=0;
+     bool found_dll_master=false;
+     bool found_dll_slave=false;
+     bool found_dll_master_groups=false;
+     bool found_dll_slave_groups=false;
+     //bool dump_ffdc=false;
+     
+     bits=ei4_rx_dll_vreg_ref_sel_clear;
+     rc_ecmd=clear_bits.insert(bits,0,16);
+     
+     if(rc_ecmd)
+     {
+           FAPI_ERR("Failed buffer intialization in DLL workaround function \n");
+           rc.setEcmdError(rc_ecmd);
+     }
+     
+     FAPI_INF("DLL WORKAROUND CODE executing");
+     // First we will populate current DLL values into std::vector
+      for (int current_group = 0 ; current_group < 4; current_group++){
+            // slave side operations
+          rc = GCR_read( slave_target, slave_interface,  ei4_rx_dll_analog_tweaks_pg, current_group,  0,   dll_reg);
+          rc_ecmd|=dll_reg.extract( &dll_value,   4, 3 );
+          if(rc_ecmd)
+          {
+                FAPI_ERR("Failed buffer intialization in DLL workaround function \n");
+                rc.setEcmdError(rc_ecmd);
+          }
+          
+          FAPI_DBG("Extracted DLL value is %d",dll_value);
+          dll_value=dll_value>>13;
+          FAPI_DBG("DLL value for %d clock group is %d on slave side",current_group,dll_value);
+          if(rc){return rc;}
+          
+          if(dll_value>=dll_vals[0] && dll_value<=dll_vals[5]){
+                dll_slave_array[current_group*6+(dll_value-dll_vals[0])]=true;
+          }
+          else{
+               FAPI_ERR("DLL Vreg Cal sel value out of bounds for workaround !!");
+          }
+          
+          rc = GCR_read( slave_target, slave_interface, ei4_rx_dll_cal_cntl_pg, current_group,  0,   dll_reg);
+          if(rc){return rc;}
+          if(dll_reg.isBitSet(1) || dll_reg.isBitSet(2) || dll_reg.isBitSet(9) || dll_reg.isBitSet(10)){
+               // Some DLL error is present , lets push this Clock group ref cal value to the next untried value
+               FAPI_DBG("DLL error detected on clock group %d on slave target",current_group);
+
+                 rc=GCR_write(slave_target, slave_interface,  ei4_rx_dll_cal_cntl_pg, current_group,0,   temp_bits, temp_bits,1,1);
+                  rc=GCR_write(master_target, master_interface,  ei4_rx_dll_cal_cntl_pg, current_group,0,   temp_bits, temp_bits,1,1);
+               for(int dll_valid=0;dll_valid<6;++dll_valid){
+                    if(dll_slave_array[current_group*6 + dll_valid]==false){
+                         // Now set the DLL vref cal sel reg value to the next valid untried value
+                         dll_value=dll_vals[dll_valid];
+                         FAPI_DBG("DLL value to be written is %d dll_valid=%d current_group=%d",dll_value,dll_valid,current_group);
+                         rc=GCR_read(slave_target , slave_interface,  ei4_rx_dll_analog_tweaks_pg,  current_group,0, set_bits);
+                         rc_ecmd=set_bits.insert(dll_value,4,3,13);
+                         if(rc_ecmd)
+                         {
+                               FAPI_ERR("Failed buffer insertion in DLL workaround function \n");
+                               rc.setEcmdError(rc_ecmd);
+                         }
+                         rc=GCR_write(slave_target, slave_interface,  ei4_rx_dll_analog_tweaks_pg, current_group,0,   set_bits, clear_bits);
+                         found_dll_slave=true;
+                         dll_slave_array[current_group*6 + dll_valid]=true;
+                         break;
+                    }
+               }
+               if(found_dll_slave==false){
+                    FAPI_ERR("No valid DLL reg value left to search.. DLL cal on slave of this channel has failed ");
+                    // Now do FFDC call outs
+                    //dump_ffdc=true;
+                    dll_workaround_fail=true;
+               }
+          }
+          else{
+               FAPI_DBG("NO DLL error detected on clock group %d on slave target",current_group);
+          }
+  
+     if(!found_dll_slave){  // If slave has DLL failure , Master status is invalid - John G 
+          // master SIDE operations 
+          // Push current DLL value into the std::vector
+          dll_reg.flushTo0();
+          rc = GCR_read( master_target, master_interface,  ei4_rx_dll_analog_tweaks_pg, current_group,  0,   dll_reg);
+          rc_ecmd|=dll_reg.extract( &dll_value,   4, 3 );
+          if(rc_ecmd)
+          {
+                FAPI_ERR("Failed buffer intialization in DLL workaround function \n");
+                rc.setEcmdError(rc_ecmd);
+          }
+          
+          FAPI_DBG("Extracted DLL value is %d",dll_value);
+          dll_value=dll_value>>13;
+          FAPI_DBG("DLL value for %d clock group is %d on master side",current_group,dll_value);
+          if(rc){return rc;}
+          if(dll_value>=dll_vals[0] && dll_value<=dll_vals[5]){
+                dll_master_array[current_group*6+(dll_value-dll_vals[0])]=true;
+          }
+          else{
+               FAPI_ERR("DLL Vreg Cal sel value out of bounds for workaround !!");
+          }
+          rc = GCR_read( master_target, master_interface, ei4_rx_dll_cal_cntl_pg, current_group,  0,   dll_reg);
+          if(rc){return rc;}
+          if(dll_reg.isBitSet(1) || dll_reg.isBitSet(2) || dll_reg.isBitSet(9) || dll_reg.isBitSet(10)){
+               // Some DLL error is present , lets push this Clock group to the next untried value
+               FAPI_DBG("DLL error detected on clock group %d on master target",current_group);
+                 rc=GCR_write(slave_target, slave_interface,  ei4_rx_dll_cal_cntl_pg, current_group,0,   temp_bits, temp_bits,1,1);
+                rc=GCR_write(master_target, master_interface,  ei4_rx_dll_cal_cntl_pg, current_group,0,   temp_bits, temp_bits,1,1);
+                
+               for(int dll_valid=0;dll_valid<6;++dll_valid){
+                    if(dll_master_array[current_group*6 + dll_valid]==false){
+                         // Now set the DLL vref cal sel reg value to the next valid untried value
+                         dll_value=dll_vals[dll_valid];
+                         FAPI_DBG("DLL value to be written is %d",dll_value);
+                         rc=GCR_read(master_target , master_interface,  ei4_rx_dll_analog_tweaks_pg,  current_group,0, set_bits);
+                         rc_ecmd=set_bits.insert(dll_value,4,3,13);
+                         if(rc_ecmd)
+                         {
+                               FAPI_ERR("Failed buffer insertion in DLL workaround function \n");
+                               rc.setEcmdError(rc_ecmd);
+                         }
+                         rc=GCR_write(master_target, master_interface,  ei4_rx_dll_analog_tweaks_pg, current_group,0,   set_bits, clear_bits);
+                         found_dll_master=true;
+                         dll_master_array[current_group*6 + dll_valid]=true;
+                         break;
+                    }
+               }
+               if(found_dll_master==false){
+                    FAPI_ERR("No valid DLL reg value left to search.. DLL cal on master of this channel has failed ");
+                    //dump_ffdc=true;
+               }
+          }
+          else{
+               FAPI_DBG("NO DLL error detected on clock group %d on master target",current_group);
+          }
+          
+     }
+                if(found_dll_master){
+               found_dll_master_groups=true;
+          }
+          if(found_dll_slave){
+               found_dll_slave_groups=true;
+          }
+      }
+     
+     if(found_dll_master_groups || found_dll_slave_groups ) {
+          // at least one clock group on a slave or slave had a DLL fail and valid values to try so we will ask wrapper to continue the
+          // workaround invocations
+          FAPI_DBG("One setting failed on master or slave ");
+          dll_workaround_done=false;
+     }
+     else{
+          // No DLL fail or no Vreg sel values left to try out so we are done 
+          dll_workaround_done=true;
+          FAPI_DBG("DLL Workaround done in checker function");
+          //if(dump_ffdc){
+          //     rc=edi_training::dump_dll_ffdc(master_target,master_interface,slave_target,slave_interface);
+          //}
+     }
+
+     
+     return rc;
+}
+
+ReturnCode set_tx_drv_pattern(const Target &master_target, io_interface_t master_interface,uint32_t master_group,const Target &slave_target,
+                              io_interface_t slave_interface,uint32_t slave_group)
+{
+     ReturnCode rc;
+     uint32_t rc_ecmd=0;
+     // For DLL shmoo workaround 
+     ecmdDataBufferBase set_bits(16),clear_bits(16);
+     uint16_t bits=0;
+     
+     FAPI_DBG("DLL workaround : Setting TX DRV pattern back to 0000 before restarting training on X bus ");
+     // Clear Clk pattern
+     bits=ei4_tx_drv_data_pattern_gcrmsg_clear;
+     rc_ecmd=clear_bits.insert(bits,0,16);
+     if(rc_ecmd)
+     {
+           FAPI_ERR("Failed buffer intialization in DLL workaround function \n");
+           rc.setEcmdError(rc_ecmd);
+     }
+     rc=GCR_write(slave_target, slave_interface,ei4_tx_data_cntl_gcrmsg_pl  , 15,31,   set_bits, clear_bits,1,1);
+     rc=GCR_write(master_target, master_interface,ei4_tx_data_cntl_gcrmsg_pl , 15,31,   set_bits, clear_bits,1,1);
+     //Clear Data pattern 
+     bits=ei4_tx_drv_clk_pattern_gcrmsg_clear;
+     rc_ecmd=clear_bits.insert(bits,0,16);
+     if(rc_ecmd)
+     {
+           FAPI_ERR("Failed buffer intialization in DLL workaround function \n");
+           rc.setEcmdError(rc_ecmd);
+     }
+     rc=GCR_write(slave_target, slave_interface, ei4_tx_clk_cntl_gcrmsg_pg  , 15,0,   set_bits, clear_bits,1,1);
+     rc=GCR_write(master_target, master_interface, ei4_tx_clk_cntl_gcrmsg_pg , 15,0,   set_bits, clear_bits,1,1);
+    
+     // According to John G , This reset is required as well 
+     bits= ei4_rx_wt_cu_pll_reset_clear  ;
+     rc_ecmd=clear_bits.insert(bits,0,16);
+     set_bits.flushTo0();
+     //Reset wt_cu_pll
+      for (int current_group = 0 ; current_group < 4; current_group++){
+          //rc = GCR_read( slave_target, slave_interface,ei4_rx_wiretest_pll_cntl_pg , current_group,  0,  set_bits);
+          //set_bits.clearBit(1);
+          rc=GCR_write(slave_target, slave_interface, ei4_rx_wiretest_pll_cntl_pg  , current_group,0,   set_bits, clear_bits,1,1);
+          //
+          //rc = GCR_read( master_target, master_interface,ei4_rx_wiretest_pll_cntl_pg , current_group,  0,  set_bits);
+          //set_bits.clearBit(1);
+          rc=GCR_write(master_target, master_interface, ei4_rx_wiretest_pll_cntl_pg  , current_group,0,   set_bits, clear_bits,1,1);
+      }
+
+      
+     FAPI_DBG("Done Setting TX Drv pattern to 0000 and wt_cu_pll_reset to 0 for DLL workaround ");
+     return rc;
+}
+
 //HW Defect HW220449 , HW HW247831
 // Set rx_sls_extend_sel=001 on slave side of X bus post training
 ReturnCode do_sls_fix(const Target &slave_target, io_interface_t slave_interface)
@@ -341,11 +570,18 @@ ReturnCode io_run_training(const Target &master_target,const Target &slave_targe
      uint32_t slave_group=0;
      const uint32_t max_group=4; // Num of X bus groups in one bus
      edi_training init;
+
      // Workaround - HW 220654 -- Need to split WDERF into WDE + RF
      edi_training init1(SELECTED,SELECTED,SELECTED, NOT_RUNNING, NOT_RUNNING); // Run WDE first
+     
+     // For Xbus DLL Workaround , we need Wiretest alone , then DE and RF 
+     edi_training init_w(SELECTED,NOT_RUNNING, NOT_RUNNING, NOT_RUNNING, NOT_RUNNING); // Run W for Xbus
+     edi_training init_de(SELECTED,SELECTED,SELECTED, NOT_RUNNING, NOT_RUNNING); // Run DE next for X bus
+     // Need an object to restore object state after one wiretest run. 
+     edi_training copy_w=init_w;
+     // DE & RF needs to be split due to HW 220654 
      edi_training init2( NOT_RUNNING, NOT_RUNNING, NOT_RUNNING,SELECTED,SELECTED); // Run RF next
      bool is_master=false;
-     
      //FIR workaround buffers
      //These buffers will store old bad lane info that was restored prior to training 
      ecmdDataBufferBase slave_data_one_old[4];
@@ -381,26 +617,63 @@ ReturnCode io_run_training(const Target &master_target,const Target &slave_targe
      }
      //This is an X Bus
      else if( (master_target.getType() == fapi::TARGET_TYPE_XBUS_ENDPOINT  )&& (slave_target.getType() == fapi::TARGET_TYPE_XBUS_ENDPOINT )){
-          FAPI_DBG("This is a X Bus training invocation");
+         FAPI_DBG("This is a X Bus training invocation");
           master_interface=CP_FABRIC_X0; // base scom for X bus
           slave_interface=CP_FABRIC_X0; // base scom for X bus
-          master_group=0; // Design requires us to do this as per scom map and layout
-          slave_group=0;
+          slave_group=0; // Design requires us to do this as per scom map and layout
+          master_group=0;
+          uint8_t trial_count=0;
+          //HW249235 --For DLL workaround 
+          bool dll_master_array[24],dll_slave_array[24]; // DLL array for each clock group
+          bool dll_workaround_done=false;
+          bool dll_workaround_fail=false;
+          
+          //init Bool array
+          for(int i=0;i<24;++i){
+               dll_master_array[i]=false;
+               dll_slave_array[i]=false;
+          }
+          
           rc=init.isChipMaster(master_target,master_interface,master_group,is_master);
           if(rc.ok()){
-               if(!is_master){
-                     //Swap master and slave targets !!
+                             if(!is_master){
+                     //Swap slave and slave targets !!
                      FAPI_DBG("X Bus ..target swap performed");
-                    rc=fir_workaround_pre_training(master_target,master_interface,master_group,slave_target,slave_interface,slave_group,
+                     rc=fir_workaround_pre_training(slave_target,slave_interface,slave_group,slave_target,slave_interface,slave_group,
                                                  slave_data_one_old,slave_data_two_old,master_data_one_old,master_data_two_old);
-                    if(rc) return rc;
-                    rc=init1.run_training(slave_target,slave_interface,slave_group,master_target,master_interface,master_group);
+                     if(rc) return rc;
+                    do{
+                         trial_count++;
+                         FAPI_DBG("TRAINING TRIAL count=%d",trial_count);
+                         rc=init_w.run_training(slave_target,slave_interface,slave_group,master_target,master_interface,master_group);
+                         if(rc) {
+                              //HW249235 --For DLL workaround
+                              FAPI_DBG("Starting DLL Workaround");
+                              rc=check_dll_status_and_modify(slave_target,slave_interface,master_target,master_interface,
+                                                            dll_slave_array,dll_master_array,dll_workaround_done,dll_workaround_fail);
+                              if(rc) return rc;
+                              // Reset tx drive pattern to 0000 before starting Wiretest again -- As per Rob /Pete
+                              //Prep the targets for next round of WDE training -- Steps by Rob & Pete
+                              if(!dll_workaround_done){
+                                   rc=set_tx_drv_pattern(slave_target,slave_interface,slave_group,master_target,master_interface,
+                                                             master_group);
+                              }
+                              if(rc) return rc;
+                         }
+                         else{
+                              if(trial_count>1){
+                                   FAPI_DBG("DLL workaround was successfull");
+                              }
+                              dll_workaround_done=true;
+                         }
+                         init_w=copy_w;
+                    }while(!dll_workaround_done);
+                    rc=init_de.run_training(slave_target,slave_interface,slave_group,master_target,master_interface,master_group);
                     if(rc) return rc;
                     rc=init2.run_training(slave_target,slave_interface,slave_group,master_target,master_interface,master_group);
-                    rc=fir_workaround_post_training(master_target,master_interface,master_group,slave_target,slave_interface,slave_group,
+                    rc=fir_workaround_post_training(slave_target,slave_interface,slave_group,slave_target,slave_interface,slave_group,
                                                  slave_data_one_old,slave_data_two_old,master_data_one_old,master_data_two_old);
                     if(rc) return rc;
-                    
                     //HW Defect HW220449 , HW HW247831
                     // Set rx_sls_extend_sel=001 on slave side of X bus post training
                     rc=do_sls_fix(master_target,master_interface);
@@ -408,18 +681,49 @@ ReturnCode io_run_training(const Target &master_target,const Target &slave_targe
 	       }
                else{
                     rc=fir_workaround_pre_training(master_target,master_interface,master_group,slave_target,slave_interface,slave_group,
-                                                slave_data_one_old,slave_data_two_old,master_data_one_old,master_data_two_old);
-                    if(rc) return rc;
-                    rc=init1.run_training(master_target,master_interface,master_group,slave_target,slave_interface,slave_group);
-                    if(rc) return rc;
-                    rc=init2.run_training(master_target,master_interface,master_group,slave_target,slave_interface,slave_group);
-                    rc=fir_workaround_post_training(master_target,master_interface,master_group,slave_target,slave_interface,slave_group,
-                                                 slave_data_one_old,slave_data_two_old,master_data_one_old,master_data_two_old);
+                                                master_data_one_old,master_data_two_old,slave_data_one_old,slave_data_two_old);
                     if(rc) return rc;
+                 do{
+                         trial_count++;
+                         FAPI_DBG("TRAINING TRIAL count=%d",trial_count);
+                         rc=init_w.run_training(master_target,master_interface,master_group,slave_target,slave_interface,slave_group);
+                         if(rc) {
+                              //HW249235 --For DLL workaround
+                              FAPI_DBG("Starting DLL Workaround");
+                              rc=check_dll_status_and_modify(master_target,master_interface,slave_target,slave_interface,
+                                                            dll_master_array,dll_slave_array,dll_workaround_done,dll_workaround_fail);
+                              if(rc) return rc;
+                              // Reset tx drive pattern to 0000 before starting Wiretest again -- As per Rob /Pete
+                              //Prep the targets for next round of WDE training -- Steps by Rob & Pete
+                              if(!dll_workaround_done){
+                                   rc=set_tx_drv_pattern(master_target,master_interface,master_group,slave_target,slave_interface,
+                                    slave_group);
+                              }
+                              if(rc) return rc;
+                         }
+                         else{
+                              if(trial_count>1){
+                                   FAPI_DBG("DLL workaround was successfull");
+                              }
+                              dll_workaround_done=true;
+                         }
+                         init_w=copy_w;// Reset training object state to default
+                    }while(!dll_workaround_done);
+                    if(!dll_workaround_fail){
+                         rc=init_de.run_training(master_target,master_interface,master_group,slave_target,slave_interface,slave_group);
+                         if(rc) {
+                              
+                              return rc;}
+                         
+                         rc=init2.run_training(master_target,master_interface,master_group,slave_target,slave_interface,slave_group);
+                         rc=fir_workaround_post_training(master_target,master_interface,master_group,slave_target,slave_interface,slave_group,
+                                                      master_data_one_old,master_data_two_old,slave_data_one_old,slave_data_two_old);
+                         if(rc) return rc;
+                    }
                     //HW Defect HW220449 , HW HW247831
                     // Set rx_sls_extend_sel=001 on slave side of X bus post training
-                    rc=do_sls_fix(slave_target,slave_interface);
-                    if(rc) return rc;
+                   rc=do_sls_fix(slave_target,slave_interface);
+                   if(rc) return rc;
                }
                for(uint32_t current_group=0;current_group<max_group;++current_group){
                     rc=handle_max_spare(master_target,master_interface,current_group);
diff --git a/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_prep_master_winkle_errors.xml b/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_prep_master_winkle_errors.xml
index b1ee724c7..2a317bd07 100644
--- a/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_prep_master_winkle_errors.xml
+++ b/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_prep_master_winkle_errors.xml
@@ -5,7 +5,7 @@
 <!--                                                                        -->
 <!-- IBM CONFIDENTIAL                                                       -->
 <!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012                   -->
+<!-- COPYRIGHT International Business Machines Corp. 2012,2013              -->
 <!--                                                                        -->
 <!-- p1                                                                     -->
 <!--                                                                        -->
@@ -20,35 +20,48 @@
 <!-- Origin: 30                                                             -->
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
+<!-- $Id: proc_prep_master_winkle_errors.xml,v 1.6 2013/04/25 22:03:58 jeshua Exp $ -->
 <!-- Error definitions for proc_prep_master_winkle procedure -->
 <hwpErrors>
   <!-- *********************************************************************** -->
   <hwpError>
     <rc>RC_PROC_PREP_MASTER_WINKLE_SBE_NOT_RUNNING</rc>
-    <description>The SBE is stopped and so will never wake up the master core</description>
+    <description>
+      Procedure: proc_prep_master_winkle
+      The SBE is stopped and so will never wake up the master EX
+    </description>
     <collectRegisterFfdc>
-        <id>REG_FFDC_PROC_SBE_REGISTERS</id>
-        <target>CHIP_IN_ERROR</target>
+      <id>REG_FFDC_PROC_STATUS_AND_SBE_VITAL_REGISTERS</id>
+      <id>REG_FFDC_PROC_SBE_REGISTERS</id>
+      <target>CHIP_IN_ERROR</target>
     </collectRegisterFfdc>
     <ffdc>SBE_STATUS</ffdc>
   </hwpError>
   <!-- *********************************************************************** -->
   <hwpError>
     <rc>RC_PROC_PREP_MASTER_WINKLE_BAD_ISTEP_NUM</rc>
-    <description>The SBE is not at the correct istep number</description>
+    <description>
+      Procedure: proc_prep_master_winkle
+      The SBE is not at the correct istep number for the master winkle
+    </description>
     <collectRegisterFfdc>
-        <id>REG_FFDC_PROC_SBE_REGISTERS</id>
-        <target>CHIP_IN_ERROR</target>
+      <id>REG_FFDC_PROC_STATUS_AND_SBE_VITAL_REGISTERS</id>
+      <id>REG_FFDC_PROC_SBE_REGISTERS</id>
+      <target>CHIP_IN_ERROR</target>
     </collectRegisterFfdc>
     <ffdc>SBE_VITAL</ffdc>
   </hwpError>
   <!-- *********************************************************************** -->
   <hwpError>
     <rc>RC_PROC_PREP_MASTER_WINKLE_BAD_SUBSTEP_NUM</rc>
-    <description>The SBE is not at the correct substep number</description>
+    <description>
+      Procedure: proc_prep_master_winkle
+      The SBE is not at the correct substep number for the master winkle
+    </description>
     <collectRegisterFfdc>
-        <id>REG_FFDC_PROC_SBE_REGISTERS</id>
-        <target>CHIP_IN_ERROR</target>
+      <id>REG_FFDC_PROC_STATUS_AND_SBE_VITAL_REGISTERS</id>
+      <id>REG_FFDC_PROC_SBE_REGISTERS</id>
+      <target>CHIP_IN_ERROR</target>
     </collectRegisterFfdc>
     <ffdc>SBE_VITAL</ffdc>
   </hwpError>
diff --git a/src/usr/hwpf/hwp/core_activate/proc_stop_deadman_timer/proc_stop_deadman_timer_errors.xml b/src/usr/hwpf/hwp/core_activate/proc_stop_deadman_timer/proc_stop_deadman_timer_errors.xml
index fa2a94533..d6ddd7f69 100644
--- a/src/usr/hwpf/hwp/core_activate/proc_stop_deadman_timer/proc_stop_deadman_timer_errors.xml
+++ b/src/usr/hwpf/hwp/core_activate/proc_stop_deadman_timer/proc_stop_deadman_timer_errors.xml
@@ -5,7 +5,7 @@
 <!--                                                                        -->
 <!-- IBM CONFIDENTIAL                                                       -->
 <!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012                   -->
+<!-- COPYRIGHT International Business Machines Corp. 2012,2013              -->
 <!--                                                                        -->
 <!-- p1                                                                     -->
 <!--                                                                        -->
@@ -20,6 +20,7 @@
 <!-- Origin: 30                                                             -->
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
+<!-- $Id: proc_stop_deadman_timer_errors.xml,v 1.4 2013/04/25 22:04:00 jeshua Exp $ -->
 <!-- Error definitions for proc_stop_deadman_timer procedure -->
 <hwpErrors>
   <!-- *********************************************************************** -->
@@ -27,8 +28,9 @@
     <rc>RC_PROC_STOP_DEADMAN_TIMER_BAD_ISTEP_NUM</rc>
     <description>The SBE is not at the correct istep number</description>
     <collectRegisterFfdc>
-        <id>REG_FFDC_PROC_SBE_REGISTERS</id>
-        <target>CHIP_IN_ERROR</target>
+      <id>REG_FFDC_PROC_STATUS_AND_SBE_VITAL_REGISTERS</id>
+      <id>REG_FFDC_PROC_SBE_REGISTERS</id>
+      <target>CHIP_IN_ERROR</target>
     </collectRegisterFfdc>
     <ffdc>SBE_VITAL</ffdc>
   </hwpError>
@@ -37,8 +39,9 @@
     <rc>RC_PROC_STOP_DEADMAN_TIMER_BAD_SUBSTEP_NUM</rc>
     <description>The SBE is not at the correct substep number</description>
     <collectRegisterFfdc>
-        <id>REG_FFDC_PROC_SBE_REGISTERS</id>
-        <target>CHIP_IN_ERROR</target>
+      <id>REG_FFDC_PROC_STATUS_AND_SBE_VITAL_REGISTERS</id>
+      <id>REG_FFDC_PROC_SBE_REGISTERS</id>
+      <target>CHIP_IN_ERROR</target>
     </collectRegisterFfdc>
     <ffdc>SBE_VITAL</ffdc>
   </hwpError>
diff --git a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_errors.xml b/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_errors.xml
index f61538e2a..ddd532140 100644
--- a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_errors.xml
+++ b/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_errors.xml
@@ -20,6 +20,7 @@
 <!-- Origin: 30                                                             -->
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
+<!-- $Id: proc_setup_bars_errors.xml,v 1.4 2013/05/23 19:41:05 jmcgill Exp $ -->
 <!-- Error definitions for proc_setup_bars -->
 <hwpErrors>
   <!-- *********************************************************************** -->
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.C
index 08cc3db9d..9882bf2aa 100644
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.C
+++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.C
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_pm_prep_for_reset.C,v 1.18 2013/04/12 01:28:32 stillgs Exp $
+// $Id: p8_pm_prep_for_reset.C,v 1.20 2013/06/20 12:56:24 pchatnah Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_prep_for_reset.C,v $
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2011
@@ -125,7 +125,7 @@
 #include <fapi.H>
 #include "p8_scom_addresses.H"
 #include "p8_pm_prep_for_reset.H"
-#include "p8_cpu_special_wakeup.H"
+// #include "p8_cpu_special_wakeup.H"
 
 extern "C" {
 
@@ -180,7 +180,7 @@ p8_pm_prep_for_reset(   const fapi::Target &i_primary_chip_target ,
 
 
     fapi::ReturnCode rc;
-    uint8_t                         l_functional = 0;
+    //    uint8_t                         l_functional = 0;
     uint8_t                         l_ex_number = 0;
 
     std::vector<fapi::Target>       l_exChiplets;
@@ -210,30 +210,6 @@ p8_pm_prep_for_reset(   const fapi::Target &i_primary_chip_target ,
             FAPI_DBG("Running on DCM");
         }
         
-        //  ******************************************************************
-        //  Mask the FIRs
-        //  ******************************************************************
-
-        FAPI_INF("Executing:p8_pm_firinit in mode PM_RESET");
-
-        FAPI_EXEC_HWP(rc, p8_pm_firinit, i_primary_chip_target , PM_RESET );
-        if (rc)
-        {
-            FAPI_ERR("ERROR: p8_pm_firinit detected failed  result");
-            break;
-        }
-
-        if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
-        {
-
-            FAPI_EXEC_HWP(rc, p8_pm_firinit, i_secondary_chip_target , PM_RESET );
-            if (rc)
-            {
-                FAPI_ERR("ERROR: p8_pm_firinit detected failed  result");
-                break;
-            }
-        }
-
 
         //  ******************************************************************
         //  Put OCC PPC405 into reset
@@ -273,7 +249,7 @@ p8_pm_prep_for_reset(   const fapi::Target &i_primary_chip_target ,
 
         //  ******************************************************************
         //  Put all EX chiplet special wakeup
-        //  ******************************************************************
+        //  *****************************************************************
         //     - call proc_cpu_special_wakeup.C  *chiptarget, ENUM:OCC_SPECIAL_WAKEUP
         //             - For each chiplet,  put into Special Wake-up via the OCC special wake-up bit
 
@@ -281,7 +257,7 @@ p8_pm_prep_for_reset(   const fapi::Target &i_primary_chip_target ,
         rc = fapiGetChildChiplets (  i_primary_chip_target,
                                      TARGET_TYPE_EX_CHIPLET,
                                      l_exChiplets,
-                                     TARGET_STATE_PRESENT);
+                                     TARGET_STATE_FUNCTIONAL);
         if (rc)
         {
             FAPI_ERR("Error from fapiGetChildChiplets!");
@@ -290,22 +266,24 @@ p8_pm_prep_for_reset(   const fapi::Target &i_primary_chip_target ,
 
         FAPI_DBG("Number of EX chiplet on primary  => %u ", l_exChiplets.size());
 
-         // Iterate through the returned chiplets
+	// Iterate through the returned chiplets
         for (uint8_t j=0; j < l_exChiplets.size(); j++)
-        {
-
-            // Determine if it's functional
-            rc = FAPI_ATTR_GET( ATTR_FUNCTIONAL,
-                                &l_exChiplets[j],
-                                l_functional);
-            if (rc)
-            {
-                FAPI_ERR("fapiGetAttribute of ATTR_FUNCTIONAL error");
-                break;
-            }
-
-            if ( l_functional )
+	  {
+	  
+	  /*
+	  // Determine if it's functional
+	  rc = FAPI_ATTR_GET( ATTR_FUNCTIONAL,
+	                          &l_exChiplets[j],
+	                                  l_functional);
+	    if (rc)
             {
+	    FAPI_ERR("fapiGetAttribute of ATTR_FUNCTIONAL error");
+	    break;
+            } 
+	    
+	    if ( l_functional )
+             {
+	  */
                 // The ex is functional let's build the SCOM address
                 rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[j], l_ex_number);
                 FAPI_DBG("Running special wakeup on ex chiplet %d ", l_ex_number);
@@ -320,7 +298,7 @@ p8_pm_prep_for_reset(   const fapi::Target &i_primary_chip_target ,
                     break;    
                 }
 
-            }
+		//}
         }  // chiplet loop
         
         // Exit if error
@@ -345,7 +323,7 @@ p8_pm_prep_for_reset(   const fapi::Target &i_primary_chip_target ,
             rc = fapiGetChildChiplets ( i_secondary_chip_target,
                                         TARGET_TYPE_EX_CHIPLET,
                                         l_exChiplets,
-                                        TARGET_STATE_PRESENT);
+                                        TARGET_STATE_FUNCTIONAL);
             if (rc)
             {
               FAPI_ERR("Error from fapiGetChildChiplets!");
@@ -358,20 +336,23 @@ p8_pm_prep_for_reset(   const fapi::Target &i_primary_chip_target ,
             for (uint8_t j=0; j < l_exChiplets.size(); j++)
             {
 
-                // Determine if it's functional
-                rc = FAPI_ATTR_GET(  ATTR_FUNCTIONAL,
-                         &l_exChiplets[j],
-                         l_functional);
-                if (rc)
-                {
-                    FAPI_ERR("fapiGetAttribute of ATTR_FUNCTIONAL error");
-                    break;
-                }
 
-                if ( l_functional )
-                {
+	      /*
+                // Determine if it's functional
+                 rc = FAPI_ATTR_GET(  ATTR_FUNCTIONAL,
+                          &l_exChiplets[j],
+                          l_functional);
+                 if (rc)
+                 {
+                     FAPI_ERR("fapiGetAttribute of ATTR_FUNCTIONAL error");
+                     break;
+                 }  
+
+                 if ( l_functional )
+                 {
+	      */
                     // The ex is functional
-                    rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[j], l_ex_number);
+	      rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[j], l_ex_number);
                     FAPI_DBG("Running special wakeup on EX chiplet %d ", l_ex_number);
 
                     // Set special wakeup for EX
@@ -383,7 +364,7 @@ p8_pm_prep_for_reset(   const fapi::Target &i_primary_chip_target ,
                         FAPI_ERR("fapiSpecialWakeup: Failed to put CORE %d into special wakeup. With rc = 0x%x",  l_ex_number, (uint32_t)rc);  
                         break;    
                     }
-                }
+		    //               }
             }  // chiplet loop
             
             // Exit if error
@@ -404,6 +385,38 @@ p8_pm_prep_for_reset(   const fapi::Target &i_primary_chip_target ,
 
         }
 
+
+        //  ******************************************************************
+        //  Mask the FIRs
+        //  ******************************************************************
+
+        FAPI_INF("Executing:p8_pm_firinit in mode PM_RESET");
+
+        FAPI_EXEC_HWP(rc, p8_pm_firinit, i_primary_chip_target , PM_RESET );
+        if (rc)
+        {
+            FAPI_ERR("ERROR: p8_pm_firinit detected failed  result");
+            break;
+        }
+
+        if ( i_secondary_chip_target.getType() != TARGET_TYPE_NONE )
+        {
+
+            FAPI_EXEC_HWP(rc, p8_pm_firinit, i_secondary_chip_target , PM_RESET );
+            if (rc)
+            {
+                FAPI_ERR("ERROR: p8_pm_firinit detected failed  result");
+                break;
+            }
+        }
+
+
+
+
+
+
+
+
         //  ******************************************************************
         //  Force Vsafe value into voltage controller
         //  ******************************************************************
@@ -799,7 +812,7 @@ p8_pm_prep_for_reset(   const fapi::Target &i_primary_chip_target ,
         }
 
     } while(0);
-    fapiDelay(300 , 3000 );
+    //    fapiDelay(300 , 3000 );
 
     FAPI_INF("Exiting p8_pm_prep_for_reset");
     
@@ -807,78 +820,81 @@ p8_pm_prep_for_reset(   const fapi::Target &i_primary_chip_target ,
 } // Procedure
 
 
+
+  // ***************************************************** BACKUPS *********************************************************************************
+
 //------------------------------------------------------------------------------
 // Core Status
 //------------------------------------------------------------------------------
-fapi::ReturnCode
-corestat(const fapi::Target& i_target) 
-{
-    fapi::ReturnCode rc;   
+// fapi::ReturnCode
+// corestat(const fapi::Target& i_target) 
+// {
+//     fapi::ReturnCode rc;   
  
-    ecmdDataBufferBase              data(64);
+//     ecmdDataBufferBase              data(64);
     
-    std::vector<fapi::Target>       l_exChiplets;
-    uint8_t                         l_functional = 0;
-    uint8_t                         l_ex_number = 0;
+//     std::vector<fapi::Target>       l_exChiplets;
+//     uint8_t                         l_functional = 0;
+//     uint8_t                         l_ex_number = 0;
     
 
-    FAPI_INF("Core Status ...");
+//     FAPI_INF("Core Status ...");
        
-    rc = fapiGetChildChiplets ( i_target, 
-                                TARGET_TYPE_EX_CHIPLET, 
-                                l_exChiplets, 
-                                TARGET_STATE_FUNCTIONAL);
-	if (rc)
-	{
-	    FAPI_ERR("Error from fapiGetChildChiplets!");
-	    return rc;
-	}
-    FAPI_DBG("Number of chiplets  => %u", l_exChiplets.size());
+//     rc = fapiGetChildChiplets ( i_target, 
+//                                 TARGET_TYPE_EX_CHIPLET, 
+//                                 l_exChiplets, 
+//                                 TARGET_STATE_FUNCTIONAL);
+// 	if (rc)
+// 	{
+// 	    FAPI_ERR("Error from fapiGetChildChiplets!");
+// 	    return rc;
+// 	}
+//     FAPI_DBG("Number of chiplets  => %u", l_exChiplets.size());
     
-    // Iterate through the returned chiplets
-    //for (itr = l_exChiplets.begin(); itr != l_exChiplets.end(); itr++) 
-    for (uint8_t c=0; c < l_exChiplets.size(); c++)
-    {
-        // Determine if it's functional
-        //rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL, itr, l_functional);
-        rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL, &l_exChiplets[c], l_functional);
-        if (rc)
-        {
-            FAPI_ERR("fapiGetAttribute of ATTR_FUNCTIONAL error");
-            break;
-        }
+//     // Iterate through the returned chiplets
+//     //for (itr = l_exChiplets.begin(); itr != l_exChiplets.end(); itr++) 
+//     for (uint8_t c=0; c < l_exChiplets.size(); c++)
+//     {
+//         // Determine if it's functional
+//         //rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL, itr, l_functional);
+//         rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL, &l_exChiplets[c], l_functional);
+//         if (rc)
+//         {
+//             FAPI_ERR("fapiGetAttribute of ATTR_FUNCTIONAL error");
+//             break;
+//         }
         
-        // With TARGET_STATE_FUNCTIONAL above, this check may be redundant
-        if ( l_functional )
-        {
-            // Get the core number
-            //rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, itr, c); 
-            rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[c], l_ex_number);                  
-            if (rc)
-            {
-                FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS error");
-                break;
-            }
-
-            FAPI_DBG("Processing core : %d ", l_ex_number);
+//         // With TARGET_STATE_FUNCTIONAL above, this check may be redundant
+//         if ( l_functional )
+//         {
+//             // Get the core number
+//             //rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, itr, c); 
+//             rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[c], l_ex_number);                  
+//             if (rc)
+//             {
+//                 FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS error");
+//                 break;
+//             }
+
+//             FAPI_DBG("Processing core : %d ", l_ex_number);
     
-            // Read register content
+//             // Read register content
             
-            rc = fapiGetScom( l_exChiplets[c], EX_PERV_SCRATCH0_10013283 , data );
-            if (rc) 
-            {
-                FAPI_ERR("fapiGetScom(EX_OHA_MODE_REG) failed. With rc = 0x%x", (uint32_t)rc);  
-                return rc;    
-            }
-
-            FAPI_DBG ("EX_PERV_SCRATCH0_10013283  :  %016llX", data.getDoubleWord(0));
+//             rc = fapiGetScom( l_exChiplets[c], EX_PERV_SCRATCH0_10013283 , data );
+//             if (rc) 
+//             {
+//                 FAPI_ERR("fapiGetScom(EX_OHA_MODE_REG) failed. With rc = 0x%x", (uint32_t)rc);  
+//                 return rc;    
+//             }
+
+//             FAPI_DBG ("EX_PERV_SCRATCH0_10013283  :  %016llX", data.getDoubleWord(0));
             
-        }
-    }     
+//         }
+//     }     
     
-    return rc;
+//     return rc;
   
-}  //corestat
+// }  //corestat
 
 
 
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.H
index 3dc49870d..ca581bcf0 100644
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.H
+++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.H
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_pm_prep_for_reset.H,v 1.8 2013/03/27 08:34:05 pchatnah Exp $
+// $Id: p8_pm_prep_for_reset.H,v 1.9 2013/06/20 09:36:24 pchatnah Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_prep_for_reset.H,v $
 
 //------------------------------------------------------------------------------
@@ -40,7 +40,7 @@
 #define UNIT_CONFIG     0x1
 #define UNIT_RESET      0x2
 
-#include "proc_cpu_special_wakeup.H"
+// #include "proc_cpu_special_wakeup.H"
 #include "p8_pm.H"
 #include "p8_poregpe_init.H"
 #include "p8_pcbs_init.H"
diff --git a/src/usr/hwpf/hwp/proc_fab_iovalid_errors.xml b/src/usr/hwpf/hwp/proc_fab_iovalid_errors.xml
index 7d462067b..2bfa7b968 100644
--- a/src/usr/hwpf/hwp/proc_fab_iovalid_errors.xml
+++ b/src/usr/hwpf/hwp/proc_fab_iovalid_errors.xml
@@ -20,6 +20,7 @@
 <!-- Origin: 30                                                             -->
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
+<!-- $Id: proc_fab_iovalid_errors.xml,v 1.6 2013/05/22 15:51:27 mjjones Exp $ -->
 <!-- Error definitions for proc_fab_iovalid procedure -->
 <hwpErrors>
   <!-- *********************************************************************** -->
diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_ocb_init_errors.xml b/src/usr/hwpf/hwp/runtime_errors/p8_ocb_init_errors.xml
index 718157655..06ea85209 100644
--- a/src/usr/hwpf/hwp/runtime_errors/p8_ocb_init_errors.xml
+++ b/src/usr/hwpf/hwp/runtime_errors/p8_ocb_init_errors.xml
@@ -5,7 +5,7 @@
 <!--                                                                        -->
 <!-- IBM CONFIDENTIAL                                                       -->
 <!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012                   -->
+<!-- COPYRIGHT International Business Machines Corp. 2012,2013              -->
 <!--                                                                        -->
 <!-- p1                                                                     -->
 <!--                                                                        -->
@@ -20,6 +20,7 @@
 <!-- Origin: 30                                                             -->
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
+<!-- $Id: p8_ocb_init_errors.xml,v 1.3 2013/05/23 18:44:07 stillgs Exp $ -->
 <!-- Error definitions for p8_ocb_init procedure -->
 <hwpErrors>
   <!-- *********************************************************************** -->
diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_occ_control_errors.xml b/src/usr/hwpf/hwp/runtime_errors/p8_occ_control_errors.xml
index dbc02dd70..f218be909 100644
--- a/src/usr/hwpf/hwp/runtime_errors/p8_occ_control_errors.xml
+++ b/src/usr/hwpf/hwp/runtime_errors/p8_occ_control_errors.xml
@@ -5,7 +5,7 @@
 <!--                                                                        -->
 <!-- IBM CONFIDENTIAL                                                       -->
 <!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012                   -->
+<!-- COPYRIGHT International Business Machines Corp. 2012,2013              -->
 <!--                                                                        -->
 <!-- p1                                                                     -->
 <!--                                                                        -->
@@ -20,6 +20,7 @@
 <!-- Origin: 30                                                             -->
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
+<!-- $Id: p8_occ_control_errors.xml,v 1.2 2013/05/23 18:44:08 stillgs Exp $ -->
 <!-- Error definitions for p8_occ_control procedure -->
 <hwpErrors>
   <!-- *********************************************************************** -->
diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_occ_sram_init_errors.xml b/src/usr/hwpf/hwp/runtime_errors/p8_occ_sram_init_errors.xml
index e9249e5b1..c2914f557 100644
--- a/src/usr/hwpf/hwp/runtime_errors/p8_occ_sram_init_errors.xml
+++ b/src/usr/hwpf/hwp/runtime_errors/p8_occ_sram_init_errors.xml
@@ -5,7 +5,7 @@
 <!--                                                                        -->
 <!-- IBM CONFIDENTIAL                                                       -->
 <!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012                   -->
+<!-- COPYRIGHT International Business Machines Corp. 2012,2013              -->
 <!--                                                                        -->
 <!-- p1                                                                     -->
 <!--                                                                        -->
@@ -20,6 +20,7 @@
 <!-- Origin: 30                                                             -->
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
+<!-- $Id: p8_occ_sram_init_errors.xml,v 1.2 2013/05/23 18:44:12 stillgs Exp $ -->
 <!-- Error definitions for p8_occ_sram_init procedure -->
 <hwpErrors>
   <!-- *********************************************************************** -->
diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_oha_init_errors.xml b/src/usr/hwpf/hwp/runtime_errors/p8_oha_init_errors.xml
index df25c895d..ea7161ad6 100644
--- a/src/usr/hwpf/hwp/runtime_errors/p8_oha_init_errors.xml
+++ b/src/usr/hwpf/hwp/runtime_errors/p8_oha_init_errors.xml
@@ -5,7 +5,7 @@
 <!--                                                                        -->
 <!-- IBM CONFIDENTIAL                                                       -->
 <!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012                   -->
+<!-- COPYRIGHT International Business Machines Corp. 2012,2013              -->
 <!--                                                                        -->
 <!-- p1                                                                     -->
 <!--                                                                        -->
@@ -20,12 +20,14 @@
 <!-- Origin: 30                                                             -->
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
+<!-- $Id: p8_oha_init_errors.xml,v 1.3 2013/05/23 18:44:14 stillgs Exp $ -->
 <!-- Error definitions for proc_oha_init procedure -->
 <hwpErrors>
   <!-- *********************************************************************** -->
   <hwpError>
     <rc>RC_PROC_OHA_CODE_PUTGETSCOM_FAILED</rc>
     <description>Register read/write failed in proc_oha_init.</description>
+    <ffdc>ERRORS</ffdc>    
   </hwpError>
   <!-- *********************************************************************** -->
   <hwpError>
diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_pba_init_errors.xml b/src/usr/hwpf/hwp/runtime_errors/p8_pba_init_errors.xml
index 507456009..357edc1de 100644
--- a/src/usr/hwpf/hwp/runtime_errors/p8_pba_init_errors.xml
+++ b/src/usr/hwpf/hwp/runtime_errors/p8_pba_init_errors.xml
@@ -5,7 +5,7 @@
 <!--                                                                        -->
 <!-- IBM CONFIDENTIAL                                                       -->
 <!--                                                                        -->
-<!-- COPYRIGHT International Business Machines Corp. 2012                   -->
+<!-- COPYRIGHT International Business Machines Corp. 2012,2013              -->
 <!--                                                                        -->
 <!-- p1                                                                     -->
 <!--                                                                        -->
@@ -20,6 +20,7 @@
 <!-- Origin: 30                                                             -->
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
+<!-- $Id: p8_pba_init_errors.xml,v 1.3 2013/05/23 18:44:16 stillgs Exp $ -->
 <!-- Error definitions for p8_pba_init procedure -->
 <hwpErrors>
   <!-- *********************************************************************** -->
diff --git a/src/usr/hwpf/hwp/tod_init/proc_tod_utils/proc_tod_utils.xml b/src/usr/hwpf/hwp/tod_init/proc_tod_utils/proc_tod_utils.xml
index c93271551..2a3fd734f 100644
--- a/src/usr/hwpf/hwp/tod_init/proc_tod_utils/proc_tod_utils.xml
+++ b/src/usr/hwpf/hwp/tod_init/proc_tod_utils/proc_tod_utils.xml
@@ -20,6 +20,7 @@
 <!-- Origin: 30                                                             -->
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
+<!-- $Id: proc_tod_utils.xml,v 1.7 2013/05/07 19:14:35 mjjones Exp $ -->
 <!-- Error codes for proc_tod_utils (used by setup, init, status) -->
 <hwpErrors>
   <!-- ******************************************************************** -->