Updating ATTR_PROC_CHIP_MEM_TO_USE to use all bits of group and chip ID

When first created, we assumed the group ID and chip ID's were
both 2 bits, but they're actually 3. This is updating the attribute.

Change-Id: Iabc112f7202d410bd7bceab53c3ad79a1df17368
RTC:176434
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56039
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56112
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>

2 files changed, 12 insertions, 10 deletions

diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_setup_sbe_config.C b/src/import/chips/p9/procedures/hwp/perv/p9_setup_sbe_config.C
index e665fdb4d..02efe855d 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_setup_sbe_config.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_setup_sbe_config.C
@@ -96,8 +96,6 @@ enum P9_SETUP_SBE_CONFIG_Private_Constants
     ATTR_DISABLE_HBBL_VECTORS_BIT      = 3,
     ATTR_MC_SYNC_MODE_BIT              = 4,
     ATTR_SLOW_PCI_REF_CLOCK_BIT        = 5,
-    ATTR_PROC_CHIP_MEM_TO_USE_STARTBIT = 6,
-    ATTR_PROC_CHIP_MEM_TO_USE_LENGTH   = 4,
 
     // Scratch_reg_6
     ATTR_PROC_EFF_FABRIC_GROUP_ID_STARTBIT = 17,
@@ -109,6 +107,8 @@ enum P9_SETUP_SBE_CONFIG_Private_Constants
     ATTR_PROC_FABRIC_GROUP_ID_LENGTH   = 3,
     ATTR_PROC_FABRIC_CHIP_ID_STARTBIT  = 29,
     ATTR_PROC_FABRIC_CHIP_ID_LENGTH    = 3,
+    ATTR_PROC_CHIP_MEM_TO_USE_STARTBIT = 1,
+    ATTR_PROC_CHIP_MEM_TO_USE_LENGTH   = 6,
 };
 
 
@@ -424,7 +424,6 @@ fapi2::ReturnCode p9_setup_sbe_config(const
         uint8_t l_disable_hbbl_vectors;
         uint32_t l_pll_mux;
         uint8_t l_mc_sync_mode;
-        uint8_t l_proc_chip_mem_to_use;
         uint8_t l_slow_pci_ref_clock;
 
         FAPI_DBG("Reading Scratch_reg5");
@@ -447,7 +446,6 @@ fapi2::ReturnCode p9_setup_sbe_config(const
         FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SYS_FORCE_ALL_CORES, FAPI_SYSTEM, l_force_all_cores));
         FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_DISABLE_HBBL_VECTORS, FAPI_SYSTEM, l_disable_hbbl_vectors));
         FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MC_SYNC_MODE, i_target_chip, l_mc_sync_mode));
-        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_CHIP_MEM_TO_USE, FAPI_SYSTEM, l_proc_chip_mem_to_use));
         FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_DD1_SLOW_PCI_REF_CLOCK, FAPI_SYSTEM, l_slow_pci_ref_clock));
 
         // set cache contained flag
@@ -493,11 +491,6 @@ fapi2::ReturnCode p9_setup_sbe_config(const
             l_read_scratch_reg.clearBit<ATTR_MC_SYNC_MODE_BIT>();
         }
 
-        // set which proc memory to use
-        l_read_scratch_reg.insert<ATTR_PROC_CHIP_MEM_TO_USE_STARTBIT,
-                                  ATTR_PROC_CHIP_MEM_TO_USE_LENGTH,
-                                  4>(l_proc_chip_mem_to_use);
-
         // set slow PCI ref clock bit
         if (l_slow_pci_ref_clock == fapi2::ENUM_ATTR_DD1_SLOW_PCI_REF_CLOCK_SLOW)
         {
@@ -534,6 +527,7 @@ fapi2::ReturnCode p9_setup_sbe_config(const
     //set_scratch6_reg
     {
         uint8_t l_pump_mode;
+        uint8_t l_proc_chip_mem_to_use;
 
         FAPI_DBG("Reading Scratch_reg6");
 
@@ -597,6 +591,14 @@ fapi2::ReturnCode p9_setup_sbe_config(const
         l_read_scratch_reg.insertFromRight< ATTR_PROC_EFF_FABRIC_CHIP_ID_STARTBIT, ATTR_PROC_EFF_FABRIC_CHIP_ID_LENGTH >
         (l_read_2);
 
+        FAPI_DBG("Reading ATTR_PROC_CHIP_MEM_TO_USE");
+        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_CHIP_MEM_TO_USE, i_target_chip, l_proc_chip_mem_to_use));
+
+        l_read_scratch_reg.setBit<0>();
+        // set which proc memory to use
+        l_read_scratch_reg.insertFromRight<ATTR_PROC_CHIP_MEM_TO_USE_STARTBIT,
+                                           ATTR_PROC_CHIP_MEM_TO_USE_LENGTH>(l_proc_chip_mem_to_use);
+
         FAPI_DBG("Setting up value of Scratch_reg6");
 
         if ( l_accessViaScom )
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml
index c90ea81bc..d7bd01439 100755
--- a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml
@@ -754,7 +754,7 @@
 
 <attribute>
   <id>ATTR_PROC_CHIP_MEM_TO_USE</id>
-  <targetType>TARGET_TYPE_SYSTEM</targetType>
+  <targetType>TARGET_TYPE_PROC_CHIP</targetType>
   <description>This attribute denotes where our master proc's memory is
     located. In the case that the master-proc does not have usable memory,
     we are going to use another proc's memory to boot. The attribute will be