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authorDan Crowell <dcrowell@us.ibm.com>2017-04-14 11:10:44 -0500
committerMatthew A. Ploetz <maploetz@us.ibm.com>2017-04-26 17:59:20 -0400
commitbe9ac6a00db5d6f6aa48a19340fefb3a8a33cd3c (patch)
treee60fb01bf415365359ff2e87e2f34cbce5d361a5
parent198d144f57d4c7042f04eb3b4c9658d42ab6278d (diff)
downloadtalos-hostboot-be9ac6a00db5d6f6aa48a19340fefb3a8a33cd3c.tar.gz
talos-hostboot-be9ac6a00db5d6f6aa48a19340fefb3a8a33cd3c.zip
Remove devtree code
OPAL is now HDAT-based, removing all references to the Hostboot-generated devtree. Change-Id: I9fc8773f7135d4e0d4799e4cc7c6e3b6ea1da14d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39293 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com>
Diffstat
-rw-r--r--src/include/sys/misc.h5
-rw-r--r--src/include/usr/devtree/devtree_reasoncodes.H45
-rw-r--r--src/include/usr/devtree/devtreeif.H58
-rw-r--r--src/include/usr/i2c/eepromif.H4
-rw-r--r--src/include/usr/i2c/i2cif.H2
-rw-r--r--src/include/usr/isteps/istep21list.H1
-rw-r--r--src/makefile1
-rw-r--r--src/usr/devtree/HBconfig7
-rw-r--r--src/usr/devtree/bld_devtree.C2378
-rw-r--r--src/usr/devtree/devtree.C741
-rw-r--r--src/usr/devtree/devtree.H336
-rw-r--r--src/usr/devtree/dt_doc_v0.2.txt512
-rw-r--r--src/usr/devtree/makefile42
-rw-r--r--src/usr/isteps/istep21/call_host_runtime_setup.C2
-rw-r--r--src/usr/isteps/istep21/call_host_start_payload.C1
-rw-r--r--src/usr/makefile1
-rw-r--r--src/usr/vpd/rtvpd_load.C4
-rw-r--r--src/usr/vpd/runtime/rt_vpd.C6
18 files changed, 11 insertions, 4135 deletions
diff --git a/src/include/sys/misc.h b/src/include/sys/misc.h
index f63de4686..8100805be 100644
--- a/src/include/sys/misc.h
+++ b/src/include/sys/misc.h
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2011,2016 */
+/* Contributors Listed Below - COPYRIGHT 2011,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -107,8 +107,7 @@ extern "C"
* @param[in] i_payload_base The base address (target HRMOR) of the payload.
* @param[in] i_payload_entry The offset from base address of the payload
* entry-point.
- * @param[in] i_payload_data Data pointer fo the payload. For standalone
- * Saphire this is the devtree
+ * @param[in] i_payload_data Data pointer fo the payload.
* @param[in[ i_masterHBInstance Hostboot instance number. for multinode
*/
extern "C" void shutdown(uint64_t i_status,
diff --git a/src/include/usr/devtree/devtree_reasoncodes.H b/src/include/usr/devtree/devtree_reasoncodes.H
deleted file mode 100644
index 7705a08fc..000000000
--- a/src/include/usr/devtree/devtree_reasoncodes.H
+++ /dev/null
@@ -1,45 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG */
-/* This is an automatically generated prolog. */
-/* */
-/* $Source: src/include/usr/devtree/devtree_reasoncodes.H $ */
-/* */
-/* OpenPOWER HostBoot Project */
-/* */
-/* COPYRIGHT International Business Machines Corp. 2012,2014 */
-/* */
-/* Licensed under the Apache License, Version 2.0 (the "License"); */
-/* you may not use this file except in compliance with the License. */
-/* You may obtain a copy of the License at */
-/* */
-/* http://www.apache.org/licenses/LICENSE-2.0 */
-/* */
-/* Unless required by applicable law or agreed to in writing, software */
-/* distributed under the License is distributed on an "AS IS" BASIS, */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
-/* implied. See the License for the specific language governing */
-/* permissions and limitations under the License. */
-/* */
-/* IBM_PROLOG_END_TAG */
-#ifndef __DEVTREE_REASONCODES_H
-#define __DEVTREE_REASONCODES_H
-
-#include <hbotcompid.H>
-
-namespace DEVTREE
-{
- enum DevtreeModuleId
- {
- MOD_DEVTREE_INVALID = 0x00, /**< Zero is invalid module id */
- MOD_DEVTREE_BLD_MEM = 0x01,
- MOD_BLD_VPD_IMAGE = 0x02,
- };
-
- enum DevtreeReasonCode
- {
- RC_ATTR_MEMSIZE_GET_FAIL = DEVTREE_COMP_ID | 0x01,
- RC_ATTR_MEMBASE_GET_FAIL = DEVTREE_COMP_ID | 0x02,
- RC_INSUFFICIENT_SPACE_FOR_RT_VPD = DEVTREE_COMP_ID | 0x03,
- };
-};
-
-#endif
diff --git a/src/include/usr/devtree/devtreeif.H b/src/include/usr/devtree/devtreeif.H
deleted file mode 100644
index 63c8f5f34..000000000
--- a/src/include/usr/devtree/devtreeif.H
+++ /dev/null
@@ -1,58 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG */
-/* This is an automatically generated prolog. */
-/* */
-/* $Source: src/include/usr/devtree/devtreeif.H $ */
-/* */
-/* OpenPOWER HostBoot Project */
-/* */
-/* COPYRIGHT International Business Machines Corp. 2012,2014 */
-/* */
-/* Licensed under the Apache License, Version 2.0 (the "License"); */
-/* you may not use this file except in compliance with the License. */
-/* You may obtain a copy of the License at */
-/* */
-/* http://www.apache.org/licenses/LICENSE-2.0 */
-/* */
-/* Unless required by applicable law or agreed to in writing, software */
-/* distributed under the License is distributed on an "AS IS" BASIS, */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
-/* implied. See the License for the specific language governing */
-/* permissions and limitations under the License. */
-/* */
-/* IBM_PROLOG_END_TAG */
-#ifndef __DEVTREE_IF_H
-#define __DEVTREE_IF_H
-
-#include <errl/errlentry.H>
-
-
-namespace DEVTREE
-{
-
- /**
- * @brief Build flattened dev tree for Sapphire
- *
- * @param[in] i_dtAddr - Address to load devtree. 0 will use a default
- * data area appropriate for non-HDAT Sapphire.
- * @param[in] i_dtSize - Allowable size for the devtree.
- * @param[in] i_smallTree - Build a small devtree appropriate for inside
- * the HDAT area.
- *
- * @return errlHndl_t NULL on success
- */
- errlHndl_t build_flatdevtree( uint64_t i_dtAddr = 0, size_t i_dtSize = 0,
- bool i_smallTree = false);
-
- /**
- * @brief Get the address of the flattened dev tree for Sapphire
- *
- * @return uint64_t - Address if valid, else NULL
- */
- uint64_t get_flatdevtree_phys_addr( void );
-
-
-
-
-}; // end namespace DEVTREE
-
-#endif
diff --git a/src/include/usr/i2c/eepromif.H b/src/include/usr/i2c/eepromif.H
index 6371e6da5..36558cbfe 100644
--- a/src/include/usr/i2c/eepromif.H
+++ b/src/include/usr/i2c/eepromif.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2013,2016 */
+/* Contributors Listed Below - COPYRIGHT 2013,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -56,7 +56,7 @@ bool eepromPresence ( TARGETING::Target * i_target );
/**
* @brief Define a set of information about all EEPROMs in the
- * system (primarily used to populate the devtree)
+ * system (primarily used to populate HDAT)
*/
struct EepromInfo_t
{
diff --git a/src/include/usr/i2c/i2cif.H b/src/include/usr/i2c/i2cif.H
index 607fb58a1..0cbc94a65 100644
--- a/src/include/usr/i2c/i2cif.H
+++ b/src/include/usr/i2c/i2cif.H
@@ -155,7 +155,7 @@ void i2cSetAccessMode( i2cSetAccessModeType i_setModeType );
/**
* @brief Define a set of information about the I2C masters
- * (primarily used to populate the devtree)
+ * (primarily used to populate the HDAT)
*/
struct MasterInfo_t
{
diff --git a/src/include/usr/isteps/istep21list.H b/src/include/usr/isteps/istep21list.H
index f2be3178e..61b0d49e4 100644
--- a/src/include/usr/isteps/istep21list.H
+++ b/src/include/usr/isteps/istep21list.H
@@ -120,7 +120,6 @@ namespace INITSERVICE
const DepModInfo g_istep21Dependancies = {
{
DEP_LIB(libistep21.so),
- DEP_LIB(libdevtree.so),
DEP_LIB(libruntime.so),
DEP_LIB(libp9_cpuWkup.so),
DEP_LIB(libpm.so),
diff --git a/src/makefile b/src/makefile
index 30811069b..92c578055 100644
--- a/src/makefile
+++ b/src/makefile
@@ -187,7 +187,6 @@ EXTENDED_MODULES += $(if $(CONFIG_VPO_COMPILE),,dump)
EXTENDED_MODULES += $(if $(CONFIG_VPO_COMPILE),,runtime)
EXTENDED_MODULES += secureboot_ext
EXTENDED_MODULES += $(if $(CONFIG_TPMDD),secureboot_trusted,)
-EXTENDED_MODULES += devtree
EXTENDED_MODULES += sbe
EXTENDED_MODULES += sbeio
EXTENDED_MODULES += $(if $(CONFIG_HTMGT),htmgt)
diff --git a/src/usr/devtree/HBconfig b/src/usr/devtree/HBconfig
deleted file mode 100644
index 3ce7d2c19..000000000
--- a/src/usr/devtree/HBconfig
+++ /dev/null
@@ -1,7 +0,0 @@
-
-config DISABLE_HOSTBOOT_RUNTIME
- default n
- help
- Disable the Hostboot Runtime (HBRT)
-# Was default y if !HAVE_MBVPD
-# Story 116907 Enable HBRT for OpenPower
diff --git a/src/usr/devtree/bld_devtree.C b/src/usr/devtree/bld_devtree.C
deleted file mode 100644
index 61fc5656b..000000000
--- a/src/usr/devtree/bld_devtree.C
+++ /dev/null
@@ -1,2378 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG */
-/* This is an automatically generated prolog. */
-/* */
-/* $Source: src/usr/devtree/bld_devtree.C $ */
-/* */
-/* OpenPOWER HostBoot Project */
-/* */
-/* Contributors Listed Below - COPYRIGHT 2013,2017 */
-/* [+] Google Inc. */
-/* [+] International Business Machines Corp. */
-/* */
-/* */
-/* Licensed under the Apache License, Version 2.0 (the "License"); */
-/* you may not use this file except in compliance with the License. */
-/* You may obtain a copy of the License at */
-/* */
-/* http://www.apache.org/licenses/LICENSE-2.0 */
-/* */
-/* Unless required by applicable law or agreed to in writing, software */
-/* distributed under the License is distributed on an "AS IS" BASIS, */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
-/* implied. See the License for the specific language governing */
-/* permissions and limitations under the License. */
-/* */
-/* IBM_PROLOG_END_TAG */
-
-#include <trace/interface.H>
-#include <errl/errlentry.H>
-#include <targeting/common/target.H>
-#include <targeting/common/targetservice.H>
-#include <targeting/common/utilFilter.H>
-#include <targeting/attrrp.H>
-#include <devtree/devtree_reasoncodes.H>
-#include <devtree/devtreeif.H>
-#include "devtree.H"
-#include <sys/mmio.h> //THIRTYTWO_GB
-#include <vpd/vpd_if.H>
-#include <stdio.h>
-#include <pnor/pnorif.H>
-#include <sys/mm.h>
-#include <util/align.H>
-#include <vector>
-#include <vfs/vfs.H>
-#include <fsi/fsiif.H>
-#include <config.h>
-#include <devicefw/userif.H>
-#include <vpd/pvpdenums.H>
-#include <i2c/i2cif.H>
-#include <i2c/eepromif.H>
-#include <intr/interrupt.H>
-#include <i2c/tpmddif.H>
-#include <secureboot/trustedbootif.H>
-#include <secureboot/service.H>
-#include <ipmi/ipmisensor.H>
-
-//@TODO RTC:143092
-//#include <fapi.H>
-//#include <fapiPlatHwpInvoker.H> // for fapi::fapiRcToErrl()
-#include <vpd/mvpdenums.H>
-#include <arch/pirformat.H>
-
-trace_desc_t *g_trac_devtree = NULL;
-TRAC_INIT(&g_trac_devtree, "DEVTREE", 4096);
-
-namespace DEVTREE
-{
-using namespace TARGETING;
-
-typedef std::pair<uint64_t,uint64_t> homerAddr_t;
-
-enum BuildConstants
-{
- DEVTREE_DATA_ADDR =0xFF00000, /*256MB - 1MB*/
- DEVTREE_SPACE_SIZE =0x40000, /*256KB*/
- XSCOM_NODE_SHIFT =38, /*Node pos is 25, so 63-25=38*/
- XSCOM_CHIP_SHIFT =35, /*Chip pos is 28, so 63-28=35*/
- CHIPID_NODE_SHIFT =3, /*CHIPID is NNNNCCC, shift 3*/
- CHIPID_PROC_MASK =0x7, /*CHIPID is NNNNCCC, shift 3*/
- PHB0_MASK =0x80,
- MAX_PHBs =4, /*Max PHBs per chip is 4*/
- THREADPERCORE =8, /*8 threads per core*/
- MHZ =1000000,
-
- /* The Cache unit address (and reg property) is mostly free-for-all
- * as long as there is no collisions. On HDAT machines we use the
- * following encoding which I encourage you to also follow to limit
- * surprises:
- *
- * L2 : (0x20 << 24) | PIR (PIR is PIR value of thread 0 of core)
- * L3 : (0x30 << 24) | PIR
- * L3.5 : (0x35 << 24) | PIR */
- L2_HDR = (0x20 << 24),
- L3_HDR = (0x30 << 24),
- CEN_ID_SHIFT = 4,
- CEN_ID_TAG = 0x80000000,
-};
-
-// Opal will set this FIR bit any time a non-checkstop hardware error
-// leads to a crash. PRD will use this FIR bit to analyze appropriately.
-void bld_swCheckstopFir (devTree * i_dt, dtOffset_t & i_parentNode)
-{
- const uint32_t PBEASTFIR_OR = 0x02010c82;
- const uint32_t PBEASTFIR_MASK_AND = 0x02010c84;
- const uint32_t PBEASTFIR_ACT0 = 0x02010c86;
- const uint32_t PBEASTFIR_ACT1 = 0x02010c87;
- uint64_t BIT_31_MASK = 0xfffffffeffffffff;
- uint64_t l_data = 0;
- size_t opsize = sizeof(uint64_t);
-
- errlHndl_t l_errl = NULL;
-
- do
- {
- // unmask all functional proc chip targets
- TARGETING::TargetHandleList l_procTargetList;
- getAllChips(l_procTargetList, TYPE_PROC);
-
- for (size_t proc = 0; proc < l_procTargetList.size(); proc++)
- {
- TARGETING::Target * l_proc = l_procTargetList[proc];
-
- // clear PBEASTFIR_ACT0 bit 31
- l_errl = deviceRead( l_proc,
- &l_data,
- opsize,
- DEVICE_SCOM_ADDRESS(PBEASTFIR_ACT0) );
- if (l_errl) break;
- l_data &= BIT_31_MASK;
- l_errl = deviceWrite( l_proc,
- &l_data,
- opsize,
- DEVICE_SCOM_ADDRESS(PBEASTFIR_ACT0) );
- if (l_errl) break;
-
- // clear PBEASTFIR_ACT1 bit 31
- l_errl = deviceRead( l_proc,
- &l_data,
- opsize,
- DEVICE_SCOM_ADDRESS(PBEASTFIR_ACT1) );
- if (l_errl) break;
- l_data &= BIT_31_MASK;
- l_errl = deviceWrite( l_proc,
- &l_data,
- opsize,
- DEVICE_SCOM_ADDRESS(PBEASTFIR_ACT1) );
- if (l_errl) break;
-
- // clear PBEASTFIR_MASK bit 31 using the AND register
- l_errl = deviceWrite( l_proc,
- &BIT_31_MASK,
- opsize,
- DEVICE_SCOM_ADDRESS(PBEASTFIR_MASK_AND) );
- if (l_errl) break;
- }
-
- // add devtree property
- uint32_t cellProperties [2] = {PBEASTFIR_OR,31}; // PBEASTFIR[31]
- i_dt->addPropertyCells32(i_parentNode,
- "ibm,sw-checkstop-fir",
- cellProperties, 2);
- } while (0);
-
- if (l_errl) // commit error and keep going
- {
- errlCommit(l_errl, DEVTREE_COMP_ID);
- }
-}
-
-//@todo-RTC:123043 -- Should use the functions in RT_TARG
-uint32_t getProcChipId(const TARGETING::Target * i_pProc)
-{
- uint32_t l_fabId = i_pProc->getAttr<TARGETING::ATTR_FABRIC_GROUP_ID>();
- uint32_t l_procPos = i_pProc->getAttr<TARGETING::ATTR_FABRIC_CHIP_ID>();
- return ( (l_fabId << CHIPID_NODE_SHIFT) + l_procPos);
-}
-
-//@todo-RTC:123043 -- Should use the functions in RT_TARG
-uint32_t getMembChipId(const TARGETING::Target * i_pMemb)
-{
- PredicateCTM l_mcs(CLASS_UNIT,TYPE_MCS, MODEL_NA);
- TargetHandleList mcs_list;
- targetService().getAssociated(mcs_list,
- i_pMemb,
- TargetService::PARENT_BY_AFFINITY,
- TargetService::ALL,
- &l_mcs);
-
- if( mcs_list.size() != 1 )
- {
- //should never happen
- return 0;
- }
- Target* l_parentMCS = *(mcs_list.begin());
- uint32_t l_procId = getProcChipId(getParentChip(l_parentMCS));
- uint32_t l_membId = CEN_ID_TAG | (l_procId << CEN_ID_SHIFT);
- l_membId |= l_parentMCS->getAttr<ATTR_CHIP_UNIT>();
- return l_membId;
-}
-
-uint64_t getOccCommonAddr()
-{
- TARGETING::Target* sys = NULL;
- TARGETING::targetService().getTopLevelTarget(sys);
- uint64_t l_physAddr = sys->getAttr<ATTR_OCC_COMMON_AREA_PHYS_ADDR>();
- return l_physAddr;
-}
-
-homerAddr_t getHomerPhysAddr(const TARGETING::Target * i_pProc)
-{
- uint64_t l_homerPhysAddrBase = i_pProc->getAttr<ATTR_HOMER_PHYS_ADDR>();
- uint8_t l_Pos = i_pProc->getAttr<ATTR_POSITION>();
-
- TRACFCOMP( g_trac_devtree, "proc ChipID [%X] HOMER is at %.16X"
- " instance %d",
- getProcChipId(i_pProc), l_homerPhysAddrBase, l_Pos );
-
- return homerAddr_t(l_homerPhysAddrBase, l_Pos);
-}
-
-void add_i2c_info( const TARGETING::Target* i_targ,
- devTree* i_dt,
- dtOffset_t i_node,
- uint64_t i_xscomAddr)
-{
- TRACFCOMP(g_trac_devtree,"add_i2c_info(%X)",TARGETING::get_huid(i_targ));
-
- //get list of all I2C Masters
- std::list<I2C::MasterInfo_t> l_i2cInfo;
- I2C::getMasterInfo( i_targ, l_i2cInfo );
-
- //find all of the EEPROMs connected via i2c
- std::list<EEPROM::EepromInfo_t> l_eepromInfo;
- EEPROM::getEEPROMs( l_eepromInfo );
-
-#ifdef CONFIG_TPMDD
- TPMDD::tpm_info_t tpmInfo;
- errlHndl_t err = NULL;
- //find all TPMs
- TARGETING::TargetHandleList tpmList;
- TRUSTEDBOOT::getTPMs(tpmList);
-#endif
-
- //add any other i2c devices here as needed, e.g. TPM, etc
-
- //figure out what kind of chip we're talking about
- TARGETING::TYPE l_master_type = i_targ->getAttr<TARGETING::ATTR_TYPE>();
- const char* l_masterName = "ibm,unknown";
- const char* l_chipname = "xx";
- uint32_t l_chipid = 0x0;
- if( l_master_type == TARGETING::TYPE_PROC )
- {
- l_masterName = "ibm,power8-i2cm";
- l_chipid = getProcChipId(i_targ);
- l_chipname = "p8";
- }
- else if( l_master_type == TARGETING::TYPE_MEMBUF )
- {
- l_masterName = "ibm,centaur-i2cm";
- l_chipid = getMembChipId(i_targ);
- l_chipname = "cen";
- }
-
- //compatible devices to make Opal/Linux happy
- static const struct
- {
- const char* name;
- size_t byteSize;
- size_t addrBytes;
- } atmel_ids[] = {
- { "atmel,24c128", 16*KILOBYTE, 2 },
- { "atmel,24c256", 32*KILOBYTE, 2 },
- { "atmel,24c02", 256, 1 },
-
- //Currently our minimum is 1KB, even for the 256 byte SPD
- { "atmel,24c02", 1*KILOBYTE, 1 },
- };
-
- /*
- Devtree hierarchy is like so
- i2cm@12345 {
- i2c-bus@0 {
- eeprom@12 {
- }
- }
- i2c-bus@1 {
- eeprom@12 {
- }
- eeprom@34 {
- }
- }
- }
- */
- for( std::list<I2C::MasterInfo_t>::iterator i2cm = l_i2cInfo.begin();
- i2cm != l_i2cInfo.end();
- ++i2cm )
- {
- /*
- i2cm@a0020 {
- reg = <0xa0020 0x20>; << scom address space
- chip-engine# = <0x1>; << i2c engine
- compatible = "ibm,power8-i2cm"; << what Opal wants
- clock-frequency = <0x2faf080>; << local bus in Hz
- #address-cells = <0x1>;
- phandle = <0x10000062>; << auto-filled
- #size-cells = <0x0>;
- linux,phandle = <0x10000062>; << Opal fills in
- }
- */
- dtOffset_t l_i2cNode = i_dt->addNode(i_node,
- "i2cm", i2cm->scomAddr);
- uint32_t l_i2cProp[2] = {
- static_cast<uint32_t>(i2cm->scomAddr),
- 0x20 }; //0x20 is number of scom regs per engine
- i_dt->addPropertyCells32(l_i2cNode, "reg", l_i2cProp, 2);
- i_dt->addPropertyCell32(l_i2cNode, "chip-engine#", i2cm->engine);
- const char* l_i2cCompatStrs[] = {l_masterName, NULL};
- i_dt->addPropertyStrings(l_i2cNode, "compatible", l_i2cCompatStrs);
- i_dt->addPropertyCell32(l_i2cNode, "clock-frequency", i2cm->freq);
- i_dt->addPropertyCell32(l_i2cNode, "#address-cells", 1);
- i_dt->addPropertyCell32(l_i2cNode, "#size-cells", 0);
-
-
- /*I2C busses*/
- std::list<EEPROM::EepromInfo_t>::iterator eep = l_eepromInfo.begin();
- while( eep != l_eepromInfo.end() )
- {
- // ignore the devices that aren't on the current target
- if( eep->i2cMaster != i_targ )
- {
- eep = l_eepromInfo.erase(eep);
- continue;
- }
- // skip the devices that are on a different engine
- else if( eep->engine != i2cm->engine )
- {
- ++eep;
- continue;
- }
-
- /*
- i2c-bus@0 {
- reg = <0x0>;
- bus-frequency = <0x61a80>;
- compatible = "ibm,power8-i2c-port", << Opal fills in
- "ibm,opal-i2c"; << Opal fills in
- ibm,opal-id = <0x1>; << Opal fills in
- ibm,port-name = "p8_00000000_e1p0"; << chip_chipid_eng_port
- #address-cells = <0x1>;
- phandle = <0x10000063>; << auto-filled
- #size-cells = <0x0>;
- linux,phandle = <0x10000063>;
- }
- */
- dtOffset_t l_busNode = i_dt->addNode( l_i2cNode,
- "i2c-bus", eep->port );
- i_dt->addPropertyCell32(l_busNode, "reg", eep->port);
- i_dt->addPropertyCell32(l_busNode, "bus-frequency", eep->busFreq);
- i_dt->addPropertyCell32(l_busNode, "#address-cells", 1);
- i_dt->addPropertyCell32(l_busNode, "#size-cells", 0);
- char portname[20];
- sprintf( portname, "%s_%.8X_e%dp%d",
- l_chipname,
- l_chipid,
- eep->engine,
- eep->port );
- i_dt->addPropertyString(l_busNode,
- "ibm,port-name",
- portname);
-
- // find any other devices on the same port so we can add them
- // all at once
- EEPROM::EepromInfo_t cur_eep = *eep;
- std::list<EEPROM::EepromInfo_t>::iterator eep2 = eep;
- while( eep2 != l_eepromInfo.end() )
- {
- // skip the devices for other busses
- if( !((cur_eep.i2cMaster == eep2->i2cMaster)
- && (cur_eep.engine == eep2->engine)
- && (cur_eep.port == eep2->port)) )
- {
- ++eep2;
- continue;
- }
-
- /*
- eeprom@50 {
- reg = <0x50>; << right-justified 7-bit addr
- label = "system-vpd"; << arbitrary name
- compatible = "atmel,24c64"; << use table above
- status = "ok"; << Opal fills in
- phandle = <0x10000065>; << auto-filled
- linux,phandle = <0x10000065>; << Opal fills in
- }
- */
- dtOffset_t l_eepNode = i_dt->addNode( l_busNode,
- "eeprom",
- eep2->devAddr >> 1 );
- i_dt->addPropertyCell32(l_eepNode, "reg", eep2->devAddr >> 1);
- char l_label[30];
- TARGETING::TYPE l_type = TARGETING::TYPE_NA;
- l_type = eep2->assocTarg->getAttr<TARGETING::ATTR_TYPE>();
- if( (l_type == TARGETING::TYPE_SYS)
- || (l_type == TARGETING::TYPE_NODE) )
- {
- sprintf( l_label, "system-vpd" );
- }
- else if( l_type == TARGETING::TYPE_PROC )
- {
- const char* l_type = "vpd";
- switch( eep2->device )
- {
- case(EEPROM::VPD_PRIMARY):
- l_type = "proc-vpd";
- break;
- case(EEPROM::VPD_BACKUP):
- l_type = "proc-vpd-backup";
- break;
- case(EEPROM::SBE_PRIMARY):
- l_type = "sbe0";
- break;
- case(EEPROM::SBE_BACKUP):
- l_type = "sbe1";
- break;
- default:
- break;
- }
- sprintf( l_label, "%s-%d",
- l_type,
- eep2->assocTarg
- ->getAttr<TARGETING::ATTR_POSITION>() );
- }
- else if( l_type == TARGETING::TYPE_MEMBUF )
- {
- sprintf( l_label, "memb-vpd-%d",
- eep2->assocTarg
- ->getAttr<TARGETING::ATTR_POSITION>() );
- }
- else if( l_type == TARGETING::TYPE_DIMM )
- {
- sprintf( l_label, "dimm-spd-%d",
- eep2->assocTarg
- ->getAttr<TARGETING::ATTR_POSITION>() );
- }
- else
- {
- sprintf( l_label, "unknown" );
- }
- i_dt->addPropertyString(l_eepNode, "label", l_label);
-
- // fill in atmel compatible
- const char* l_compat = "unknown";
- bool l_foundit = false;
- for( size_t a = 0;
- a < (sizeof(atmel_ids)/sizeof(atmel_ids[0]));
- a++ )
- {
- if( (atmel_ids[a].byteSize == (KILOBYTE*eep2->sizeKB))
- || (atmel_ids[a].addrBytes == eep2->addrBytes) )
- {
- l_compat = atmel_ids[a].name;
- l_foundit = true;
- break;
- }
- }
- if( !l_foundit )
- {
- TRACFCOMP( g_trac_devtree, "Could not find matching eeprom device for %s : size=%d,addr=%d", l_label, eep2->sizeKB, eep2->addrBytes );
- }
- i_dt->addPropertyString(l_eepNode, "compatible", l_compat);
-
- // need to increment the outer loop if we're going to
- // remove the element it points to
- if( eep == eep2 )
- {
- ++eep;
- }
- // now remove the device we added so we don't add it again
- eep2 = l_eepromInfo.erase(eep2);
- }
- } // end eeprom iter
-
-
-#ifdef CONFIG_TPMDD
- for(auto pTpm : tpmList)
- {
- // Lookup i2c info for the TPM
- err = TPMDD::tpmReadAttributes(pTpm, tpmInfo,
- TPMDD::TPM_LOCALITY_0);
- if (NULL != err)
- {
- // Unable to get info we skip this guy
- delete err;
- continue;
- }
-
- // ignore the devices that aren't on the current target
- if( tpmInfo.i2cTarget != i_targ )
- {
- continue;
- }
- // skip the devices that are on a different engine
- else if( tpmInfo.engine != i2cm->engine )
- {
- continue;
- }
-
- /*
- i2c-bus@0 {
- reg = <0x0>;
- bus-frequency = <0x61a80>;
- compatible = "ibm,power8-i2c-port", << Opal fills in
- "ibm,opal-i2c"; << Opal fills in
- ibm,opal-id = <0x1>; << Opal fills in
- ibm,port-name = "p8_00000000_e1p0"; << chip_chipid_eng_port
- #address-cells = <0x1>;
- phandle = <0x10000063>; << auto-filled
- #size-cells = <0x0>;
- linux,phandle = <0x10000063>;
- }
- */
- dtOffset_t l_busNode = i_dt->addNode( l_i2cNode,
- "i2c-bus", tpmInfo.port);
- i_dt->addPropertyCell32(l_busNode, "reg", tpmInfo.port);
- i_dt->addPropertyCell32(l_busNode, "bus-frequency",
- tpmInfo.busFreq);
- i_dt->addPropertyCell32(l_busNode, "#address-cells", 1);
- i_dt->addPropertyCell32(l_busNode, "#size-cells", 0);
- char portname[20];
- sprintf( portname, "%s_%.8X_e%dp%d",
- l_chipname,
- l_chipid,
- tpmInfo.engine,
- tpmInfo.port );
- i_dt->addPropertyString(l_busNode,
- "ibm,port-name",
- portname);
-
-
- /*
- tpm@50 {
- reg = <0x50>; << right-justified 7-bit addr
- label = "tpm"; << arbitrary name
- compatible = "nuvoton,npct650", "nuvoton,npct601";
- << from i2c driver
- status = "ok"; << Opal fills in
- phandle = <0x10000065>; << auto-filled
- linux,phandle = <0x10000065>; << Opal fills in
- linux,sml-size = <size of buffer allocated for event log>
- linux,sml-base = <ptr to event log>
- }
- */
- dtOffset_t l_tpmNode = i_dt->addNode( l_busNode,
- "tpm",
- tpmInfo.devAddr >> 1 );
-
- i_dt->addPropertyCell32(l_tpmNode, "reg",
- tpmInfo.devAddr >> 1);
- char l_label[30];
- switch (pTpm->getAttr<TARGETING::ATTR_TPM_ROLE>())
- {
- case TARGETING::TPM_ROLE_TPM_PRIMARY:
- sprintf( l_label, "tpm" );
- break;
- case TARGETING::TPM_ROLE_TPM_BACKUP:
- sprintf( l_label, "tpm-backup" );
- break;
- default:
- break;
- }
- i_dt->addPropertyString(l_tpmNode, "label", l_label);
-
- // fill in nuvoton compatible
- const char* l_compat[] = {"nuvoton,npct650",
- "nuvoton,npct601", NULL};
- i_dt->addPropertyStrings(l_tpmNode, "compatible", l_compat);
-
- // Placeholders for the tpm log which will be filled in later
- // We store info away so we can look up this devtree node later
- TRUSTEDBOOT::setTpmDevtreeInfo(pTpm, i_xscomAddr, i2cm->scomAddr);
- i_dt->addPropertyCell32(l_tpmNode, "linux,sml-size", 0);
- i_dt->addPropertyCell64(l_tpmNode, "linux,sml-base", 0);
- } // end TPM iter
-#endif
-
-
- } // end i2cm iter
-}
-
-
-void bld_getSideInfo(PNOR::SideId i_side,
- uint32_t o_TOCaddress[2],
- uint8_t & o_count,
- bool & o_isGolden)
-{
- errlHndl_t errhdl = NULL;
- PNOR::SideInfo_t l_info;
-
- o_count = 0;
- o_isGolden = false;
-
- errhdl = getSideInfo (i_side, l_info);
- if (!errhdl)
- {
- // return the valid TOC offsets & count of valid TOCs
- if (PNOR::INVALID_OFFSET != l_info.primaryTOC)
- {
- o_TOCaddress[o_count++] = l_info.primaryTOC;
- }
- if (PNOR::INVALID_OFFSET != l_info.backupTOC)
- {
- o_TOCaddress[o_count++] = l_info.backupTOC;
- }
- o_isGolden = l_info.isGolden;
- }
- else
- {
- // commit error and return 0 TOC offsets
- errlCommit(errhdl, DEVTREE_COMP_ID);
- }
-
- return;
-}
-
-void bld_fdt_pnor(devTree * i_dt,
- dtOffset_t i_parentNode)
-{
- do
- {
- uint32_t l_active[2] = {PNOR::INVALID_OFFSET,PNOR::INVALID_OFFSET};
- uint32_t l_golden[2] = {PNOR::INVALID_OFFSET,PNOR::INVALID_OFFSET};
- uint8_t l_count = 0;
- bool l_isGolden = false;
- bool l_goldenFound = false;
- uint8_t l_goldenCount = 0;
- PNOR::PnorInfo_t l_pnorInfo;
-
- //Get pnor address and size
- getPnorInfo (l_pnorInfo);
-
- dtOffset_t l_pnorNode = i_dt->addNode(i_parentNode,
- "pnor",
- l_pnorInfo.mmioOffset);
-
- const uint8_t l_isaLinkage = 0; // 0==Mem
- uint32_t pnor_prop[3] = {l_isaLinkage,
- l_pnorInfo.mmioOffset,
- l_pnorInfo.flashSize};
- i_dt->addPropertyCells32(l_pnorNode, "reg", pnor_prop, 3);
-
- //Add Working/Active parition
- bld_getSideInfo(PNOR::WORKING,l_active,l_count,l_isGolden);
- if (l_count) // valid TOCs present
- {
- i_dt->addPropertyCells32(l_pnorNode,
- "active-image-tocs", l_active, l_count);
- // capture golden
- if (l_isGolden)
- {
- l_golden[0] = l_active[0];
- l_golden[1] = l_active[1];
- l_goldenCount = l_count;
- l_goldenFound = true;
- }
- }
-
-#if CONFIG_PNOR_TWO_SIDE_SUPPORT
- //Add Alternate parition
- uint32_t l_alternate[2] = {PNOR::INVALID_OFFSET,PNOR::INVALID_OFFSET};
-
- bld_getSideInfo(PNOR::ALTERNATE,l_alternate,l_count,l_isGolden);
- if (l_count) // valid TOCs present
- {
- i_dt->addPropertyCells32(l_pnorNode,
- "alternate-image-tocs",l_alternate,l_count);
- // capture golden
- if (l_isGolden)
- {
- l_golden[0] = l_alternate[0];
- l_golden[1] = l_alternate[1];
- l_goldenCount = l_count;
- l_goldenFound = true;
- }
- }
-#endif
-
- //Include golden if there is one
- if (l_goldenFound)
- {
- i_dt->addPropertyCells32(l_pnorNode,
- "golden-image-tocs",l_golden,l_goldenCount);
- }
-
- } while (0);
-
- return;
-}
-
-void bld_xscom_node(devTree * i_dt, dtOffset_t & i_parentNode,
- const TARGETING::Target * i_pProc,
- uint32_t i_chipid,
- bool i_smallTree)
-{
- const char* xscomNodeName = "xscom";
- const char* todNodeName = "chiptod";
- const char* pciNodeName = "pbcq";
-
- /**********************************************************/
- /* Xscom node */
- /**********************************************************/
- uint64_t l_xscomAddr =
- i_pProc->getAttr<TARGETING::ATTR_XSCOM_BASE_ADDRESS>();
-
- dtOffset_t xscomNode = i_dt->addNode(i_parentNode, xscomNodeName,
- l_xscomAddr);
-
- i_dt->addPropertyCell32(xscomNode, "#address-cells", 1);
- i_dt->addPropertyCell32(xscomNode, "#size-cells", 1);
- i_dt->addProperty(xscomNode, "scom-controller");
- const char* xscom_compatStrs[] = {"ibm,xscom","ibm,power8-xscom",NULL};
- i_dt->addPropertyStrings(xscomNode, "compatible", xscom_compatStrs);
-
- i_dt->addPropertyCell32(xscomNode, "ibm,chip-id", i_chipid);
-
- uint64_t xscom_prop[2] = { l_xscomAddr, THIRTYTWO_GB};
- i_dt->addPropertyCells64(xscomNode, "reg", xscom_prop, 2);
-
- // Do not need anything else for small tree
- if (i_smallTree)
- {
- return;
- }
-
- // Add proc chip ECIDs
- ATTR_ECID_type ecid;
- i_pProc->tryGetAttr<ATTR_ECID>(ecid);
- char ecid_ascii[33];
- sprintf(ecid_ascii, "%.16llX%.16llX", ecid[0], ecid[1]);
- i_dt->addPropertyString(xscomNode, "ecid", ecid_ascii);
- CPPASSERT(sizeof(ATTR_ECID_type) == 16);
-
- /*PSI Host Bridge*/
- uint32_t l_psiInfo = 0x2010900; /*PSI Host Bridge Scom addr*/
- dtOffset_t psiNode = i_dt->addNode(xscomNode, "psihb", l_psiInfo);
- const char* psi_compatStrs[] = {"ibm,power8-psihb-x",
- "ibm,psihb-x", NULL};
- i_dt->addPropertyStrings(psiNode, "compatible", psi_compatStrs);
- uint32_t psi_prop[2] = { l_psiInfo, 0x20 }; //# of scoms in range
- i_dt->addPropertyCells32(psiNode, "reg", psi_prop, 2);
- i_dt->addPropertyString(psiNode, "status", "ok");
-
- /*ChipTod*/
- uint32_t l_todInfo = 0x40000; /*Chip tod Scom addr*/
- dtOffset_t todNode = i_dt->addNode(xscomNode, todNodeName, l_todInfo);
- const char* tod_compatStrs[] = {"ibm,power-chiptod",
- "ibm,power8-chiptod", NULL};
- i_dt->addPropertyStrings(todNode, "compatible", tod_compatStrs);
- uint32_t tod_prop[2] = { l_todInfo, 0x34 }; //# of scoms in range
- i_dt->addPropertyCells32(todNode, "reg", tod_prop, 2);
-
- //Mark TOD pri/sec
- uint8_t l_role = i_pProc->getAttr<ATTR_TOD_ROLE>();
- if(l_role & TARGETING::TOD_ROLE_PRIMARY)
- {
- i_dt->addProperty(todNode, "primary");
- }
- if(l_role & TARGETING::TOD_ROLE_SECONDARY)
- {
- i_dt->addProperty(todNode, "secondary");
- }
-
- if(i_chipid == 0x0) //Master chip
- {
- uint32_t l_lpcInfo = 0xB0020; /*ECCB FW addr*/
- dtOffset_t lpcNode = i_dt->addNode(xscomNode,"isa",l_lpcInfo);
- i_dt->addPropertyString(lpcNode, "compatible", "ibm,power8-lpc");
- uint32_t lpc_prop[2] = { l_lpcInfo, 0x4 }; //# of scoms in range
- i_dt->addPropertyCells32(lpcNode, "reg", lpc_prop, 2);
- i_dt->addPropertyCell32(lpcNode, "#address-cells", 2);
- i_dt->addPropertyCell32(lpcNode, "#size-cells", 1);
-
- bld_fdt_pnor (i_dt, lpcNode);
-
- }
-
- /*NX*/
- uint32_t l_nxInfo = 0x2010000; /*NX Scom addr*/
- dtOffset_t nxNode = i_dt->addNode(xscomNode, "nx", l_nxInfo);
- const char* nx_compatStrs[] = {"ibm,power-nx",
- "ibm,power8-nx", NULL};
- i_dt->addPropertyStrings(nxNode, "compatible", nx_compatStrs);
- uint32_t nx_prop[2] = { l_nxInfo, 0x4000 }; //# of scoms in range
- i_dt->addPropertyCells32(nxNode, "reg", nx_prop, 2);
-
-
- /*PCIE*/
- uint8_t l_phbActive =
- i_pProc->getAttr<TARGETING::ATTR_PROC_PCIE_PHB_ACTIVE>();
-
- TRACFCOMP( g_trac_devtree, "Chip %X PHB Active mask %X",
- i_chipid, l_phbActive);
-
- for(uint32_t l_phb =0; l_phb < MAX_PHBs; l_phb++)
- {
- if(!(l_phbActive & (PHB0_MASK>>l_phb)))
- {
- continue;
- }
-
- TRACFCOMP( g_trac_devtree, "Adding PHB %d", l_phb);
-
- /*PHB is active, add to Xscom map*/
- uint32_t l_peInfo = 0x02012000 + (l_phb * 0x400);
- uint32_t l_pciInfo = 0x09012000 + (l_phb * 0x400);
- uint32_t l_spciInfo = 0x09013c00 + (l_phb * 0x40);
- dtOffset_t pcieNode = i_dt->addNode(xscomNode,pciNodeName,l_peInfo);
- const char* pcie_compatStrs[] = {"ibm,power8-pbcq", NULL};
- i_dt->addPropertyStrings(pcieNode, "compatible", pcie_compatStrs);
- uint32_t pcie_prop[6] = { l_peInfo, 0x20, //# of scoms in range
- l_pciInfo, 0x5, //# of scoms in range
- l_spciInfo, 0x15}; //# of scoms in range
- i_dt->addPropertyCells32(pcieNode, "reg", pcie_prop, 6);
- i_dt->addPropertyCell32(pcieNode, "ibm,phb-index", l_phb);
- i_dt->addProperty(pcieNode, "ibm,use-ab-detect");
- }
-
- /*I2C Masters*/
- add_i2c_info( i_pProc, i_dt, xscomNode, l_xscomAddr );
-
-}
-
-uint32_t bld_l3_node(devTree * i_dt, dtOffset_t & i_parentNode,
- uint32_t i_pir)
-{
- uint32_t l3Id = i_pir | L3_HDR;
-
- /* Build L3 Cache information */
- dtOffset_t l3Node = i_dt->addNode(i_parentNode, "l3-cache",l3Id);
- i_dt->addPropertyString(l3Node, "device_type", "cache");
- i_dt->addPropertyCell32(l3Node, "reg", l3Id);
- i_dt->addProperty(l3Node, "cache-unified");
- i_dt->addPropertyCell32(l3Node, "d-cache-sets", 0x8);
- i_dt->addPropertyCell32(l3Node, "i-cache-sets", 0x8);
- i_dt->addPropertyCell32(l3Node, "d-cache-size", 0x800000); //8MB
- i_dt->addPropertyCell32(l3Node, "i-cache-size", 0x800000); //8MB
- i_dt->addPropertyString(l3Node, "status", "okay");
-
- return i_dt->getPhandle(l3Node);
-}
-
-uint32_t bld_l2_node(devTree * i_dt, dtOffset_t & i_parentNode,
- uint32_t i_pir, uint32_t i_nextCacheHandle)
-{
- uint32_t l2Id = i_pir | L2_HDR;
-
- /* Build l2 Cache information */
- dtOffset_t l2Node = i_dt->addNode(i_parentNode, "l2-cache",l2Id);
- i_dt->addPropertyString(l2Node, "device_type", "cache");
- i_dt->addPropertyCell32(l2Node, "reg", l2Id);
- i_dt->addProperty(l2Node, "cache-unified");
- i_dt->addPropertyCell32(l2Node, "d-cache-sets", 0x8);
- i_dt->addPropertyCell32(l2Node, "i-cache-sets", 0x8);
- i_dt->addPropertyCell32(l2Node, "d-cache-size", 0x80000); //512KB
- i_dt->addPropertyCell32(l2Node, "i-cache-size", 0x80000); //512KB
- i_dt->addPropertyString(l2Node, "status", "okay");
- i_dt->addPropertyCell32(l2Node, "next-level-cache", i_nextCacheHandle);
-
-
- return i_dt->getPhandle(l2Node);
-}
-
-uint32_t bld_cpu_node(devTree * i_dt, dtOffset_t & i_parentNode,
- const TARGETING::Target * i_ex,
- PIR_t i_pir, uint32_t i_chipId,
- uint32_t i_nextCacheHandle)
-{
- /*
- * The following node must exist for each *core* in the system. The unit
- * address (number after the @) is the hexadecimal HW CPU number (PIR value)
- * of thread 0 of that core.
- */
-
- uint32_t paFeatures[2] = { 0x0600f63f, 0xc70080c0 };
- uint32_t pageSizes[4] = { 0xc, 0x10, 0x18, 0x22 };
- uint32_t segmentSizes[4] = { 0x1c, 0x28, 0xffffffff, 0xffffffff };
- uint32_t segmentPageSizes[] =
- {
- 12, 0x0, 3, /* 4k SLB page size, L,LP = 0,x1, 3 page size encodings */
- 12, 0x0, /* 4K PTE page size, L,LP = 0,x0 */
- 16, 0x7, /* 64K PTE page size, L,LP = 1,x7 */
- 24, 0x38, /* 16M PTE page size, L,LP = 1,x38 */
- 16, 0x110, 2, /* 64K SLB page size, L,LP = 1,x1, 2 page size encodings*/
- 16, 0x1, /* 64K PTE page size, L,LP = 1,x1 */
- 24, 0x8, /* 16M PTE page size, L,LP = 1,x8 */
- 20, 0x130, 1, /* 1M SLB page size, L,LP = 1,x3, 1 page size encoding */
- 20, 0x2, /* 1M PTE page size, L,LP = 1,x2 */
- 24, 0x100, 1, /* 16M SLB page size, L,LP = 1,x0, 1 page size encoding */
- 24, 0x0, /* 16M PTE page size, L,LP = 1,x0 */
- 34, 0x120, 1, /* 16G SLB page size, L,LP = 1,x2, 1 page size encoding */
- 34, 0x3 /* 16G PTE page size, L,LP = 1,x3 */
- };
-
-
- dtOffset_t cpuNode = i_dt->addNode(i_parentNode, "PowerPC,POWER8",
- i_pir.word);
- i_dt->addPropertyString(cpuNode, "device_type", "cpu");
- i_dt->addProperty(cpuNode, "64-bit");
- i_dt->addProperty(cpuNode, "32-64-bridge");
- i_dt->addProperty(cpuNode, "graphics");
- i_dt->addProperty(cpuNode, "general-purpose");
- i_dt->addPropertyString(cpuNode, "status", "okay");
- i_dt->addPropertyCell32(cpuNode, "reg", i_pir.word);
- i_dt->addPropertyCell32(cpuNode, "ibm,pir", i_pir.word);
- i_dt->addPropertyCell32(cpuNode, "ibm,chip-id", i_chipId);
-
- uint32_t numThreads = 0;
- TARGETING::Target* sys = NULL;
- TARGETING::targetService().getTopLevelTarget(sys);
- uint64_t en_threads = sys->getAttr<TARGETING::ATTR_ENABLED_THREADS>();
-
- uint32_t interruptServerNum[THREADPERCORE];
- for(size_t i = 0; i < THREADPERCORE ; i++)
- {
- if (en_threads & (0x8000000000000000 >> i))
- {
- i_pir.threadId = i;
- interruptServerNum[numThreads++] = i_pir.word;
- }
- }
- i_dt->addPropertyCells32(cpuNode, "ibm,ppc-interrupt-server#s",
- interruptServerNum, numThreads);
-
- /* Fill in the actual PVR of chip -- it is only a 32 bit reg*/
- uint32_t l_pvr = mmio_pvr_read() & 0xFFFFFFFF;
- i_dt->addPropertyCell32(cpuNode, "cpu-version", l_pvr);
-
- i_dt->addPropertyCells32(cpuNode, "ibm,processor-segment-sizes",
- segmentSizes,
- sizeof(segmentSizes) / sizeof(uint32_t));
- i_dt->addPropertyCells32(cpuNode, "ibm,processor-page-sizes",
- pageSizes,
- sizeof(pageSizes) / sizeof(uint32_t));
- i_dt->addPropertyCells32(cpuNode, "ibm,segment-page-sizes",
- segmentPageSizes,
- sizeof(segmentPageSizes)/sizeof(uint32_t));
- i_dt->addPropertyCells32(cpuNode, "ibm,pa-features",
- paFeatures,
- sizeof(paFeatures)/sizeof(uint32_t));
-
- i_dt->addPropertyCell32(cpuNode, "ibm,slb-size", 32);
- i_dt->addPropertyCell32(cpuNode, "ibm,dfp", 1);
- i_dt->addPropertyCell32(cpuNode, "ibm,vmx", 2);
- i_dt->addPropertyCell32(cpuNode, "ibm,purr", 1);
- i_dt->addPropertyCell32(cpuNode, "ibm,spurr", 1);
-
- //Set core clock freq
- uint64_t freq = 0;
-
-#ifdef CONFIG_HTMGT
- if(sys->getAttr<TARGETING::ATTR_HTMGT_SAFEMODE>())
- {
- // Safe mode on, OCC failed to load. Set safe freq
- freq = sys->getAttr<TARGETING::ATTR_BOOT_FREQ_MHZ>();
- }
- else
- {
- // Safe mode off, set nominal freq
- freq = sys->getAttr<TARGETING::ATTR_NOMINAL_FREQ_MHZ>();
- }
-#elif CONFIG_SET_NOMINAL_PSTATE
- // Set nominal core freq if CONFIG_SET_NOMINAL_PSTATE is enabled
- freq = sys->getAttr<TARGETING::ATTR_NOMINAL_FREQ_MHZ>();
-#else
- // Else, set safe core freq
- freq = sys->getAttr<TARGETING::ATTR_BOOT_FREQ_MHZ>();
-#endif
-
- freq *= MHZ;
-
- uint32_t ex_freq[2] = {static_cast<uint32_t>(freq >> 32),
- static_cast<uint32_t>(freq & 0xFFFFFFFF)};
- if(ex_freq[0] == 0) //Only create if fits into 32 bits
- {
- i_dt->addPropertyCell32(cpuNode, "clock-frequency", ex_freq[1]);
- }
- i_dt->addPropertyCells32(cpuNode, "ibm,extended-clock-frequency",
- ex_freq, 2);
-
- uint32_t timebase_freq[2] = {0, 512000000};
- i_dt->addPropertyCell32(cpuNode, "timebase-frequency", timebase_freq[1]);
- i_dt->addPropertyCells32(cpuNode, "ibm,extended-timebase-frequency",
- timebase_freq, 2);
-
-
- i_dt->addPropertyCell32(cpuNode, "reservation-granule-size", 0x80);
- i_dt->addPropertyCell32(cpuNode, "d-tlb-size", 0x800);
- i_dt->addPropertyCell32(cpuNode, "i-tlb-size", 0x0);
- i_dt->addPropertyCell32(cpuNode, "tlb-size", 0x800);
- i_dt->addPropertyCell32(cpuNode, "d-tlb-sets", 0x4);
- i_dt->addPropertyCell32(cpuNode, "i-tlb-sets", 0x0);
- i_dt->addPropertyCell32(cpuNode, "tlb-sets", 0x4);
- i_dt->addPropertyCell32(cpuNode, "d-cache-block-size", 0x80);
- i_dt->addPropertyCell32(cpuNode, "i-cache-block-size", 0x80);
- i_dt->addPropertyCell32(cpuNode, "d-cache-size", 0x10000);
- i_dt->addPropertyCell32(cpuNode, "i-cache-size", 0x8000);
- i_dt->addPropertyCell32(cpuNode, "i-cache-sets", 0x4);
- i_dt->addPropertyCell32(cpuNode, "d-cache-sets", 0x8);
- i_dt->addPropertyCell64(cpuNode, "performance-monitor", 0x1);
- i_dt->addPropertyCell32(cpuNode, "next-level-cache", i_nextCacheHandle);
-
- return i_dt->getPhandle(cpuNode);
-}
-
-uint32_t bld_intr_node(devTree * i_dt, dtOffset_t & i_parentNode,
- const TARGETING::Target * i_ex,
- PIR_t i_pir)
-
-{
- /*
- * Interrupt presentation controller (ICP) nodes
- *
- * There is some flexibility as to how many of these are presents since
- * a given node can represent multiple ICPs. When generating from HDAT we
- * chose to create one per core
- */
-
- uint64_t l_ibase = INTR::getIntpAddr(i_ex, 0); //IBASE ADDRESS
-
- dtOffset_t intNode = i_dt->addNode(i_parentNode, "interrupt-controller",
- l_ibase);
-
- const char* intr_compatStrs[] = {"ibm,ppc-xicp", "ibm,power8-xicp",NULL};
- i_dt->addPropertyStrings(intNode, "compatible", intr_compatStrs);
- i_dt->addProperty(intNode,"interrupt-controller");
- i_dt->addPropertyCell32(intNode, "#address-cells", 0);
- i_dt->addPropertyCell32(intNode, "#interrupt-cells", 1);
- i_dt->addPropertyString(intNode, "device_type",
- "PowerPC-External-Interrupt-Presentation");
-
- TARGETING::Target* sys = NULL;
- TARGETING::targetService().getTopLevelTarget(sys);
- uint64_t en_threads = sys->getAttr<TARGETING::ATTR_ENABLED_THREADS>();
- uint32_t numThreads = 0;
-
- uint64_t intr_prop[THREADPERCORE][2];
- for(size_t i=0; i < THREADPERCORE; i++)
- {
- if (en_threads & (0x8000000000000000 >> i))
- {
- intr_prop[numThreads][0] = INTR::getIntpAddr(i_ex, i);
- intr_prop[numThreads][1] = 0x1000;
- numThreads++;
- }
- }
- i_dt->addPropertyCells64(intNode, "reg",
- reinterpret_cast<uint64_t*>(intr_prop),
- numThreads * 2);
-
- uint32_t int_serv[2] = { i_pir.word, numThreads};
- i_dt->addPropertyCells32(intNode, "ibm,interrupt-server-ranges",
- int_serv, 2);
-
- return i_dt->getPhandle(intNode);
-}
-
-
-void add_reserved_mem(devTree * i_dt,
- std::vector<homerAddr_t>& i_homerAddr,
- uint64_t i_extraAddr[],
- uint64_t i_extraSize[],
- const char* i_extraStr[],
- uint64_t i_extraCnt)
-{
- /*
- * TODO RTC: 131056 remove non-node reserved memory entries
- * - reserved-names and reserved-ranges
- * - reserved map ??
- * hints are provided for the scope of code to remove
- * The reserved-names and reserve-ranges properties work hand in hand.
- * The first one is a list of strings providing a "name" for each entry
- * in the second one using the traditional "vendor,name" format.
- *
- * The reserved-ranges property contains a list of ranges, each in the
- * form of 2 cells of address and 2 cells of size (64-bit x2 so each
- * entry is 4 cells) indicating regions of memory that are reserved
- * and must not be overwritten by skiboot or subsequently by the Linux
- * Kernel.
- *
- * Corresponding entries must also be created in the "reserved map" part
- * of the flat device-tree (which is a binary list in the header of the
- * fdt).
- * **** remove to here
- *
- * Reserved memory is passed in a node-based format. An instance
- * number distinquishes homer regions.
- *
- * Unless a component (skiboot or Linux) specifically knows about a region
- * (usually based on its name) and decides to change or remove it, all
- * these regions are passed as-is to Linux and to subsequent kernels
- * across kexec and are kept preserved.
- */
-
- dtOffset_t rootNode = i_dt->findNode("/");
-
- size_t l_num = i_homerAddr.size();
-
- // 131056: Won't need these
- const char* homerStr = "ibm,slw-occ-image";
- const char* reserve_strs[l_num+i_extraCnt+1];
- uint64_t ranges[l_num+i_extraCnt][2];
- uint64_t cell_count = sizeof(ranges) / sizeof(uint64_t);
- uint64_t res_mem_addrs[l_num+i_extraCnt];
- uint64_t res_mem_sizes[l_num+i_extraCnt];
-
- // create the nodes for the node based format
- dtOffset_t rootMemNode = i_dt->addNode(rootNode, "ibm,hostboot");
- i_dt->addPropertyCell32(rootMemNode, "#address-cells", 2);
- i_dt->addPropertyCell32(rootMemNode, "#size-cells", 2);
- dtOffset_t reservedMemNode = i_dt->addNode(rootMemNode, "reserved-memory");
- i_dt->addPropertyCell32(reservedMemNode, "#address-cells", 2);
- i_dt->addPropertyCell32(reservedMemNode, "#size-cells", 2);
- i_dt->addProperty(reservedMemNode, "ranges");
-
- for(size_t i = 0; i<l_num; i++)
- {
- uint64_t l_homerAddr = i_homerAddr[i].first;
- uint64_t l_homerInstance = i_homerAddr[i].second;
- TRACFCOMP( g_trac_devtree, "Reserved Region %s @ %lx, %lx instance %d",
- homerStr,
- l_homerAddr,
- VMM_HOMER_INSTANCE_SIZE,
- l_homerInstance);
-
- // 131056: Won't need these
- reserve_strs[i] = homerStr;
- ranges[i][0] = l_homerAddr;
- ranges[i][1] = VMM_HOMER_INSTANCE_SIZE;
- res_mem_addrs[i] = l_homerAddr;
- res_mem_sizes[i] = VMM_HOMER_INSTANCE_SIZE;
-
- // add node style inclulding homer instance.
- dtOffset_t homerNode = i_dt->addNode(reservedMemNode,
- "ibm,homer-image",
- l_homerAddr);
- uint64_t propertyCells[2]={l_homerAddr, VMM_HOMER_INSTANCE_SIZE};
- i_dt->addPropertyCells64(homerNode, "reg", propertyCells, 2);
- const char* propertyStrs[] = {"ibm,homer-image", NULL};
- i_dt->addPropertyStrings(homerNode, "ibm,prd-label",propertyStrs);
- i_dt->addPropertyCell32(homerNode, "ibm,prd-instance",
- l_homerInstance);
- }
-
- for(size_t i = 0; i < i_extraCnt; i++)
- {
- if (i_extraAddr[i])
- {
- TRACFCOMP( g_trac_devtree, "Reserved Region %s @ %lx, %lx",
- i_extraStr[i], i_extraAddr[i], i_extraSize[i]);
-
- // 131056: Won't need these
- reserve_strs[l_num] = i_extraStr[i];
- ranges[l_num][0] = i_extraAddr[i];
- ranges[l_num][1] = i_extraSize[i];
- res_mem_addrs[l_num] = i_extraAddr[i];
- res_mem_sizes[l_num] = i_extraSize[i];
- l_num++;
-
- // add node style entry
- dtOffset_t extraNode = i_dt->addNode(reservedMemNode,
- i_extraStr[i],
- i_extraAddr[i]);
- uint64_t propertyCells[2]={i_extraAddr[i],i_extraSize[i]};
- i_dt->addPropertyCells64(extraNode, "reg", propertyCells, 2);
- const char* propertyStrs[] = {i_extraStr[i], NULL};
- i_dt->addPropertyStrings(extraNode, "ibm,prd-label",propertyStrs);
- }
- else
- {
- cell_count -= sizeof(ranges[0]) / sizeof(uint64_t);
- }
- }
- // add node style occ common node
- const char* occStr = "ibm,occ-common-area";
- uint64_t l_occCommonPhysAddr = getOccCommonAddr();
- uint64_t l_occCommonPhysSize = VMM_OCC_COMMON_SIZE;
- TRACFCOMP( g_trac_devtree, "Reserved Region %s @ %lx, %lx",
- occStr, l_occCommonPhysAddr, l_occCommonPhysSize);
- dtOffset_t occNode = i_dt->addNode(reservedMemNode,
- occStr,
- l_occCommonPhysAddr);
- uint64_t propertyCells[2]={l_occCommonPhysAddr, l_occCommonPhysSize};
- i_dt->addPropertyCells64(occNode, "reg", propertyCells, 2);
- const char* propertyStrs[] = {occStr, NULL};
- i_dt->addPropertyStrings(occNode, "ibm,prd-label",propertyStrs);
-
- // 131056: Won't need the rest
- reserve_strs[l_num] = NULL;
- i_dt->addPropertyStrings(rootNode, "reserved-names", reserve_strs);
- i_dt->addPropertyCells64(rootNode, "reserved-ranges",
- reinterpret_cast<uint64_t*>(ranges),
- cell_count);
-
- // added per comment from Dean Sanner
- // cell_count has limit of DT_MAX_MEM_RESERVE = 16. Is this enough
- // for all processors + 1 vpd area + 1 target area?
- i_dt->populateReservedMem(res_mem_addrs, res_mem_sizes, cell_count);
-}
-
-void load_hbrt_image(uint64_t& io_address)
-{
- errlHndl_t l_errl = NULL;
-
- do
- {
-
- PNOR::SectionInfo_t l_pnorInfo;
- l_errl = getSectionInfo( PNOR::HB_RUNTIME , l_pnorInfo);
- if (l_errl) { break; }
-
- // Find start of image.
- // For Secureboot we might need to deal with the header but
- // for now that is hidden by the PNOR-RP.
- uint64_t image_start = l_pnorInfo.vaddr;
-
- // The "VFS_LAST_ADDRESS" variable is 2 pages in.
- uint64_t vfs_last_address =
- *reinterpret_cast<uint64_t*>(image_start + 2*PAGE_SIZE);
-
- // At the end of the image are the relocations, get the number.
- uint64_t relocate_count =
- *reinterpret_cast<uint64_t*>(image_start + vfs_last_address);
-
- // Sum up the total size.
- uint64_t image_size = vfs_last_address +
- (relocate_count+1)*sizeof(uint64_t);
-
- TRACFCOMP(g_trac_devtree, "HBRT image: start = %lx, size = %lx",
- image_start, image_size);
- io_address -= ALIGN_PAGE(image_size);
- // Align to 64KB for Opal
- io_address = ALIGN_DOWN_X(io_address,64*KILOBYTE);
-
- // Copy image.
- void* memArea = mm_block_map(reinterpret_cast<void*>(io_address),
- ALIGN_PAGE(image_size));
- memcpy(memArea, reinterpret_cast<void*>(image_start), image_size);
- mm_block_unmap(memArea);
-
- } while (0);
-
- if (l_errl)
- {
- io_address = 0;
- errlCommit(l_errl, DEVTREE_COMP_ID);
- }
-}
-
-void load_tpmlog(devTree * i_dt, uint64_t& io_address)
-{
-
- do
- {
-#ifdef CONFIG_TPMDD
- errlHndl_t l_errl = NULL;
-
- // TPM log
- TARGETING::TargetHandleList tpmList;
- TRUSTEDBOOT::getTPMs(tpmList);
-
- size_t l_allocatedSize = 0;
- uint32_t* l_propAllocSize = NULL;
- uint64_t* l_propAddr = NULL;
- TPMDD::tpm_info_t l_tpmInfo;
- uint64_t l_scomAddr = 0;
- uint32_t l_masterOffset = 0;
- uint8_t l_i2cBus = 0;
- uint8_t l_tpmAddr = 0;
- char l_nodePath[100];
- dtOffset_t l_tpmNode;
-
- for(auto pTpm : tpmList)
- {
-
- l_errl = TRUSTEDBOOT::getTpmLogDevtreeInfo(pTpm,
- io_address,
- l_allocatedSize,
- l_scomAddr,
- l_masterOffset);
-
- if (l_errl)
- {
- errlCommit(l_errl, DEVTREE_COMP_ID);
- continue;
- }
-
- // We need to build the devtree path to find this TPM node
- // Lookup i2c info for the TPM
- l_errl = TPMDD::tpmReadAttributes(pTpm, l_tpmInfo,
- TPMDD::TPM_LOCALITY_0);
- if (l_errl)
- {
- errlCommit(l_errl, DEVTREE_COMP_ID);
- continue;
- }
-
- l_i2cBus = l_tpmInfo.port;
- l_tpmAddr = l_tpmInfo.devAddr >> 1;
-
- sprintf(l_nodePath, "/xscom@%lx/i2cm@%x/i2c-bus@%x/tpm@%x",
- l_scomAddr, l_masterOffset, l_i2cBus, l_tpmAddr);
-
- TRACFCOMP(g_trac_devtree,"Searching for TPM Node %s",
- l_nodePath);
- l_tpmNode = i_dt->findNode(l_nodePath);
-
- l_propAllocSize = reinterpret_cast<uint32_t*>(
- i_dt->findProperty(l_tpmNode,
- "linux,sml-size"));
- l_propAddr = reinterpret_cast<uint64_t*>(
- i_dt->findProperty(l_tpmNode,
- "linux,sml-base"));
-
- if (NULL == l_propAllocSize ||
- NULL == l_propAddr)
- {
- TRACFCOMP(g_trac_devtree,ERR_MRK" Unable to find "
- "sml TPM properties");
- continue;
- }
-
- // Store the values in the devtree nodes
- *l_propAllocSize = l_allocatedSize;
- *l_propAddr = io_address;
- }
-#endif
-
- } while (0);
-
-}
-
-errlHndl_t bld_fdt_system(devTree * i_dt, bool i_smallTree)
-{
- errlHndl_t errhdl = NULL;
-
- dtOffset_t rootNode = i_dt->findNode("/");
-
- //Common settings
- /* Define supported power states -- options:
- nap, deep-sleep, fast-sleep, rvwinkle*/
- const char* pmode_compatStrs[] = {"nap", "fast-sleep", "rvwinkle", NULL};
- i_dt->addPropertyStrings(rootNode, "ibm,enabled-idle-states",
- pmode_compatStrs);
-
- // Nothing to do for small trees currently.
- if (!i_smallTree)
- {
- /* Add devtree property for checkstop escalation */
- bld_swCheckstopFir(i_dt,rootNode);
-
- //===== compatible =====
- /* Fetch the MRW-defined compatible model from attributes */
- ATTR_OPAL_MODEL_type l_model = {0};
- TARGETING::Target* sys = NULL;
- TARGETING::targetService().getTopLevelTarget(sys);
- sys->tryGetAttr<TARGETING::ATTR_OPAL_MODEL>(l_model);
-
- /* Add compatibility value */
- const char* l_compats[] = { "ibm,powernv", l_model, NULL };
- i_dt->addPropertyStrings(rootNode, "compatible", l_compats);
-
- //===== model =====
- /* Add system model value
- Depending on the vintage of the planar VPD, there are 3 places
- we need to look for this data.
- 1) OSYS:MM
- 2) OPFR:DR
- 3) Default to 'unknown'
- */
- bool foundvpd = false;
- TARGETING::TargetHandleList l_nodeTargetList;
- PredicateCTM predNode(CLASS_ENC, TYPE_NODE);
- PredicateHwas predFunctional;
- predFunctional.functional(true);
- PredicatePostfixExpr nodeCheckExpr;
- nodeCheckExpr.push(&predNode).push(&predFunctional).And();
-
- targetService().getAssociated(l_nodeTargetList, sys,
- TargetService::CHILD, TargetService::IMMEDIATE,
- &nodeCheckExpr);
-
- //if can't find a node for the PVPD, default to unknown
- if (l_nodeTargetList.size())
- {
- TARGETING::Target * l_pNode = l_nodeTargetList[0];
- size_t vpdSize = 0x0;
-
- // Note: First read with NULL for o_buffer sets vpdSize to the
- // correct length
- errhdl = deviceRead( l_pNode,
- NULL,
- vpdSize,
- DEVICE_PVPD_ADDRESS( PVPD::OSYS,
- PVPD::MM ));
-
- if(errhdl)
- {
- TRACFCOMP(g_trac_devtree,ERR_MRK" Couldn't get OSYS:MM size for HUID=0x%.8X",
- TARGETING::get_huid(l_pNode));
-
- // Try the OPFR record
- errlHndl_t opfr_errhdl = deviceRead( l_pNode,
- NULL,
- vpdSize,
- DEVICE_PVPD_ADDRESS( PVPD::OPFR,
- PVPD::DR ));
- if(opfr_errhdl)
- {
- TRACFCOMP(g_trac_devtree,ERR_MRK" Couldn't get OPFR:DR size for HUID=0x%.8X",
- TARGETING::get_huid(l_pNode));
- delete opfr_errhdl; //delete OPFR log, VPD is just bad
- }
- else
- {
- delete errhdl; //ignore lack of OSYS due to older vpd
- errhdl = NULL;
- char drBuf[vpdSize+1];
- memset(&drBuf, 0x0, (vpdSize+1)); //null terminated str
- errhdl = deviceRead( l_pNode,
- reinterpret_cast<void*>( &drBuf ),
- vpdSize,
- DEVICE_PVPD_ADDRESS( PVPD::OPFR,
- PVPD::DR ));
-
- if(errhdl)
- {
- TRACFCOMP(g_trac_devtree,ERR_MRK" Couldn't read OPFR:DR for HUID=0x%.8X",
- TARGETING::get_huid(l_pNode));
- }
- else
- {
- foundvpd = true;
- i_dt->addPropertyString(rootNode, "model", drBuf);
- }
- }
- }
- else
- {
- char mmBuf[vpdSize+1];
- memset(&mmBuf, 0x0, (vpdSize+1)); //ensure null terminated str
- errhdl = deviceRead( l_pNode,
- reinterpret_cast<void*>( &mmBuf ),
- vpdSize,
- DEVICE_PVPD_ADDRESS( PVPD::OSYS,
- PVPD::MM ));
-
- if(errhdl)
- {
- TRACFCOMP(g_trac_devtree,ERR_MRK" Couldn't read OSYS:MM for HUID=0x%.8X",
- TARGETING::get_huid(l_pNode));
- }
- else
- {
- foundvpd = true;
- i_dt->addPropertyString(rootNode, "model", mmBuf);
- }
- }
- }
-
- // just commit any errors we get, this isn't critical
- if( errhdl )
- {
- errlCommit(errhdl, DEVTREE_COMP_ID); //commit original OSYS log
- }
-
- if( !foundvpd ) //chassis info not found, default to unknown
- {
- TRACFCOMP(g_trac_devtree,ERR_MRK" VPD not found, model defaulted to unknown");
- i_dt->addPropertyString(rootNode, "model", "unknown");
- }
-
- //===== system-id =====
- /* Add system-id value
- 1) OSYS:SS
- 2) Default to 'unavailable'
- */
- foundvpd = false;
- if( l_nodeTargetList.size() )
- {
- TARGETING::Target * l_pNode = l_nodeTargetList[0];
- size_t vpdSize = 0x0;
-
- // Note: First read with NULL for o_buffer sets vpdSize to the
- // correct length
- errhdl = deviceRead( l_pNode,
- NULL,
- vpdSize,
- DEVICE_PVPD_ADDRESS( PVPD::OSYS,
- PVPD::SS ));
-
- if(errhdl)
- {
- TRACFCOMP(g_trac_devtree,ERR_MRK" Couldn't get OSYS:SS size for HUID=0x%.8X",
- TARGETING::get_huid(l_pNode));
- // Note - not supporting old vpd versions without OSYS here
- }
- else
- {
- char ssBuf[vpdSize+1];
- memset(&ssBuf, 0x0, (vpdSize+1)); //ensure null terminated str
- errhdl = deviceRead( l_pNode,
- reinterpret_cast<void*>( &ssBuf ),
- vpdSize,
- DEVICE_PVPD_ADDRESS( PVPD::OSYS,
- PVPD::SS ));
-
- if(errhdl)
- {
- TRACFCOMP(g_trac_devtree,ERR_MRK" Couldn't read OSYS:SS for HUID=0x%.8X",
- TARGETING::get_huid(l_pNode));
- }
- else
- {
- foundvpd = true;
- i_dt->addPropertyString(rootNode, "system-id", ssBuf);
- }
- }
- }
- // just delete any errors we get, this isn't critical
- if( errhdl )
- {
- // since there are old parts out in the wild without
- // this data, we can't log an error
- delete errhdl;
- errhdl = NULL;
- }
- if( !foundvpd ) //serial number not found, default to unavailable
- {
- i_dt->addPropertyString(rootNode, "system-id", "unavailable");
- }
- }
-
- return errhdl;
-}
-
-
-errlHndl_t bld_fdt_cpu(devTree * i_dt,
- std::vector<homerAddr_t>& o_homerRegions,
- bool i_smallTree)
-{
- errlHndl_t errhdl = NULL;
-
- /* Find the / node and add a cpus node under it. */
- dtOffset_t rootNode = i_dt->findNode("/");
- dtOffset_t cpusNode = NULL;
- if (!i_smallTree)
- {
- cpusNode = i_dt->addNode(rootNode, "cpus");
-
- /* Add the # address & size cell properties to /cpus. */
- i_dt->addPropertyCell32(cpusNode, "#address-cells", 1);
- i_dt->addPropertyCell32(cpusNode, "#size-cells", 0);
- }
-
- // Get all functional proc chip targets
- TARGETING::TargetHandleList l_procTargetList;
- getAllChips(l_procTargetList, TYPE_PROC);
-
- for (size_t proc = 0; (!errhdl) && (proc < l_procTargetList.size()); proc++)
- {
- const TARGETING::Target * l_pProc = l_procTargetList[proc];
-
- uint32_t l_chipid = getProcChipId(l_pProc);
-
- // For small tree, only add xscom if master processor
- TARGETING::Target* l_pMasterProc = NULL;
- TARGETING::targetService().masterProcChipTargetHandle(l_pMasterProc);
- if((!i_smallTree) || (l_pProc == l_pMasterProc) )
- {
- bld_xscom_node(i_dt, rootNode, l_pProc, l_chipid, i_smallTree);
- }
- if (i_smallTree) // nothing else for small tree
- {
- continue;
- }
-
- //Each processor will have a HOMER image that needs
- //to be reserved -- save it away
- o_homerRegions.push_back(getHomerPhysAddr(l_pProc));
-
- TARGETING::TargetHandleList l_corelist;
- getChildChiplets( l_corelist, l_pProc, TYPE_CORE );
- for (size_t core = 0; core < l_corelist.size(); core++)
- {
- const TARGETING::Target * l_core = l_corelist[core];
- if(l_core->getAttr<TARGETING::ATTR_HWAS_STATE>().functional != true)
- {
- continue; //Not functional
- }
-
- /* Proc ID Reg is GG GGCC CPPP PPTT Where
- GGGG is Group number
- CCC is Chip
- PPPPP is the core number
- TT is Thread num
- */
- uint32_t l_coreNum = l_core->getAttr<TARGETING::ATTR_CHIP_UNIT>();
- PIR_t pir(0);
- pir.groupId = PIR_t::groupFromChipId(l_chipid);
- pir.chipId = PIR_t::chipFromChipId(l_chipid);
- pir.coreId = l_coreNum;
-
- TRACFCOMP( g_trac_devtree, "Added pir[%x] chipid 0x%x core %d",
- pir.word, l_chipid, l_coreNum );
-
- cpusNode = i_dt->findNode("/cpus");
-
- uint32_t l3pHandle = bld_l3_node(i_dt, cpusNode, pir.word);
- uint32_t l2pHandle = bld_l2_node(i_dt, cpusNode, pir.word,
- l3pHandle);
- bld_cpu_node(i_dt, cpusNode, l_core, pir, l_chipid, l2pHandle);
-
- rootNode = i_dt->findNode("/");
- bld_intr_node(i_dt, rootNode, l_core, pir);
- }
- }
-
- return errhdl;
-}
-
-errlHndl_t bld_fdt_reserved_mem(devTree * i_dt,
- std::vector<homerAddr_t>& i_homerRegions,
- bool i_smallTree)
-{
- errlHndl_t errhdl = NULL;
-
- // VPD
- uint64_t l_vpd_addr = 0;
-
- errhdl = VPD::vpd_load_rt_image(l_vpd_addr);
-
- // Targeting
- uint64_t l_targ_addr = l_vpd_addr;
- TARGETING::AttrRP::save(l_targ_addr);
-
- // HBRT image
- uint64_t l_hbrt_addr = l_targ_addr;
- load_hbrt_image(l_hbrt_addr);
-
-#ifdef CONFIG_TPMDD
- // TPM log
- uint64_t l_tpmlog_addr = l_hbrt_addr;
- uint64_t l_tpmlog_size = 0;
- load_tpmlog(i_dt, l_tpmlog_addr);
- l_tpmlog_size = l_hbrt_addr - l_tpmlog_addr;
- if (0 == l_tpmlog_size)
- {
- l_tpmlog_addr = 0;
- }
-#endif
-
- uint64_t l_extra_addrs[] = { l_vpd_addr, l_targ_addr, l_hbrt_addr
-#ifdef CONFIG_TPMDD
- ,l_tpmlog_addr
-#endif
- };
- uint64_t l_extra_sizes[] = { VMM_RT_VPD_SIZE,
- l_vpd_addr - l_targ_addr,
- l_targ_addr - l_hbrt_addr
-#ifdef CONFIG_TPMDD
- ,l_tpmlog_size
-#endif
- };
- const char* l_extra_addrs_str[] =
- { "ibm,hbrt-vpd-image" ,
- "ibm,hbrt-target-image",
- "ibm,hbrt-code-image"
-#ifdef CONFIG_TPMDD
- ,"ibm,tpmlog"
-#endif
- };
- size_t l_extra_addr_cnt = sizeof(l_extra_addrs) / sizeof(uint64_t);
-
- //Add in reserved memory for HOMER images and HBRT sections.
- add_reserved_mem(i_dt,
- i_homerRegions,
- l_extra_addrs,
- l_extra_sizes,
- l_extra_addrs_str,
- l_extra_addr_cnt);
-
- return errhdl;
-
-}
-
-errlHndl_t bld_fdt_mem(devTree * i_dt, bool i_smallTree)
-{
- // Nothing to do for small trees currently.
- if (i_smallTree) { return NULL; }
-
- errlHndl_t errhdl = NULL;
- bool rc;
-
- /*
- * The "memory" nodes represent physical memory in the system. They
- * do not represent DIMMs, memory controllers or Centaurs, thus will
- * be expressed separately.
- *
- * In order to be able to handle affinity propertly, we require that
- * a memory node is created for each range of memory that has a different
- * "affinity", which in practice means for each chip since we don't
- * support memory interleaved across multiple chips on P8.
- *
- * Additionally, it is *not* required that one chip = one memory node,
- * it is perfectly acceptable to break down the memory of one chip into
- * multiple memory nodes (typically skiboot does that if the two MCs
- * are not interlaved).
- */
-
- do
- {
- /* Find the / node and add a memory node(s) under it. */
- dtOffset_t rootNode = i_dt->findNode("/");
-
- // Grab a system object to work with
- TARGETING::Target* sys = NULL;
- TARGETING::targetService().getTopLevelTarget(sys);
-
- // Get all functional proc chip targets
- TARGETING::TargetHandleList l_cpuTargetList;
- getAllChips(l_cpuTargetList, TYPE_PROC);
-
- for ( size_t proc = 0;
- (!errhdl) && (proc < l_cpuTargetList.size()); proc++ )
- {
- const TARGETING::Target * l_pProc = l_cpuTargetList[proc];
-
- uint64_t l_bases[8] = {0,};
- uint64_t l_sizes[8] = {0,};
- rc = l_pProc->tryGetAttr<TARGETING::ATTR_PROC_MEM_BASES>(l_bases);
- if(!rc)
- {
- /*@
- * @errortype
- * @reasoncode DEVTREE::RC_ATTR_MEMBASE_GET_FAIL
- * @moduleid DEVTREE::MOD_DEVTREE_BLD_MEM
- * @userdata1 Return code from ATTR_GET
- * @userdata2 Attribute Id that failed
- * @devdesc Error retrieving attribute
- */
- errhdl=new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE,
- MOD_DEVTREE_BLD_MEM,
- RC_ATTR_MEMBASE_GET_FAIL,
- rc,
- ATTR_PROC_MEM_BASES);
- break;
- }
-
- rc = l_pProc->tryGetAttr<TARGETING::ATTR_PROC_MEM_SIZES>(l_sizes);
- if(!rc)
- {
- /*@
- * @errortype
- * @reasoncode DEVTREE::RC_ATTR_MEMSIZE_GET_FAIL
- * @moduleid DEVTREE::MOD_DEVTREE_BLD_MEM
- * @userdata1 Return code from ATTR_GET
- * @userdata2 Attribute Id that failed
- * @devdesc Error retrieving attribute
- */
- errhdl=new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE,
- MOD_DEVTREE_BLD_MEM,
- RC_ATTR_MEMSIZE_GET_FAIL,
- rc,
- ATTR_PROC_MEM_SIZES);
- break;
- }
-
- for (size_t i=0; i< 8; i++)
- {
- if(l_sizes[i]) //non zero means that there is memory present
- {
- dtOffset_t memNode = i_dt->addNode(rootNode, "memory",
- l_bases[i]);
- i_dt->addPropertyString(memNode, "device_type","memory");
- uint64_t propertyCells[2] = {l_bases[i],l_sizes[i]};
- i_dt->addPropertyCells64(memNode, "reg", propertyCells, 2);
-
- //Add the attached proc chip for affinity
- i_dt->addPropertyCell32(memNode, "ibm,chip-id",
- getProcChipId(l_pProc));
-
- }
- }
- }
-
- /***************************************************************/
- /* Now loop on all the centaurs in the system and add their */
- /* inband scom address */
- /***************************************************************/
- rootNode = i_dt->findNode("/");
-
- // Get all functional memb chip targets
- TARGETING::TargetHandleList l_memBufList;
- getAllChips(l_memBufList, TYPE_MEMBUF);
-
- for ( size_t memb = 0;
- (!errhdl) && (memb < l_memBufList.size()); memb++ )
- {
- TARGETING::Target * l_pMemB = l_memBufList[memb];
-
- //Get MMIO Offset from parent MCS attribute.
- PredicateCTM l_mcs(CLASS_UNIT,TYPE_MCS, MODEL_NA);
-
- TargetHandleList mcs_list;
- targetService().getAssociated(mcs_list,
- l_pMemB,
- TargetService::PARENT_BY_AFFINITY,
- TargetService::ALL,
- &l_mcs);
-
- if( mcs_list.size() != 1 )
- {
- //This error should have already been caught in
- //the inband Scom DD.... going to skip creating node
- //if true
- TRACFCOMP(g_trac_devtree,ERR_MRK" MCS for 0x%x not found",
- TARGETING::get_huid(l_pMemB));
- continue;
- }
- Target* parentMCS = *(mcs_list.begin());
- uint64_t l_ibscomBase =
- parentMCS->getAttr<ATTR_IBSCOM_MCS_BASE_ADDR>();
-
-
- dtOffset_t membNode = i_dt->addNode(rootNode, "memory-buffer",
- l_ibscomBase);
- uint64_t propertyCells[2] = {l_ibscomBase,THIRTYTWO_GB};
- i_dt->addPropertyCells64(membNode, "reg", propertyCells, 2);
- i_dt->addPropertyCell32(membNode, "#address-cells", 1);
- i_dt->addPropertyCell32(membNode, "#size-cells", 1);
-
- uint32_t l_ec = l_pMemB->getAttr<ATTR_EC>();
- char cenVerStr[32];
- snprintf(cenVerStr, 32, "ibm,centaur-v%.2x", l_ec);
- const char* intr_compatStrs[] = {"ibm,centaur", cenVerStr,NULL};
- i_dt->addPropertyStrings(membNode, "compatible", intr_compatStrs);
-
-
- if(l_pMemB->
- getAttr<TARGETING::ATTR_SCOM_SWITCHES>().useInbandScom == 0x0)
- {
- i_dt->addProperty(membNode,"use-fsi");
- }
-
- //Add the attached proc chip for affinity
- uint32_t l_procId = getProcChipId(getParentChip(parentMCS));
- i_dt->addPropertyCell32(membNode, "ibm,fsi-master-chip-id",
- l_procId);
-
- uint32_t l_cenId = getMembChipId(l_pMemB);
- i_dt->addPropertyCell32(membNode, "ibm,chip-id",l_cenId);
-
- //Add the CMFSI (which CMFSI 0 or 1) and port
- FSI::FsiLinkInfo_t linkinfo;
- FSI::getFsiLinkInfo( l_pMemB, linkinfo );
- uint32_t cmfsiCells[2] =
- {linkinfo.mPort,linkinfo.link};
- i_dt->addPropertyCells32(membNode, "ibm,fsi-master-port",
- cmfsiCells, 2);
-
- //Add any I2C devices hanging off this chip
- add_i2c_info( l_pMemB, i_dt, membNode, l_ibscomBase);
-
- // Add membuf ECIDs
- ATTR_ECID_type ecid;
- l_pMemB->tryGetAttr<ATTR_ECID>(ecid);
- char ecid_ascii[33];
- sprintf(ecid_ascii, "%.16llX%.16llX", ecid[0], ecid[1]);
- i_dt->addPropertyString(membNode, "ecid", ecid_ascii);
- CPPASSERT(sizeof(ATTR_ECID_type) == 16);
- }
-
-
- }while(0);
- return errhdl;
-}
-
-
-#ifdef CONFIG_BMC_IPMI
-enum
-{
- ENTITY_ID_MASK = 0x00FF,
- SENSOR_TYPE_MASK = 0xFF00,
-};
-
-/* create a node for each IPMI sensor in the system, the sensor unit number
- corresponds to the BMC assigned sensor number */
-uint32_t bld_sensor_node(devTree * i_dt, const dtOffset_t & i_parentNode,
- const uint16_t sensorData[],
- uint32_t instance, uint32_t chipId )
-{
-
- SENSOR::sensorReadingType readType;
-
- // pass in the sensor name to get back the supported offsets and the event
- // reading type for this sensor.
- uint32_t offsets = SENSOR::getSensorOffsets(
- static_cast<TARGETING::SENSOR_NAME>(
- sensorData[TARGETING::IPMI_SENSOR_ARRAY_NAME_OFFSET]),
- readType);
-
- const uint16_t sensorNumber = sensorData[
- TARGETING::IPMI_SENSOR_ARRAY_NUMBER_OFFSET];
-
- // the sensor name is a combination of the sensor type + entity ID
- const uint16_t sensorType = (
- sensorData[TARGETING::IPMI_SENSOR_ARRAY_NAME_OFFSET]
- & SENSOR_TYPE_MASK) >> 8;
-
- const uint16_t entityId =
- sensorData[TARGETING::IPMI_SENSOR_ARRAY_NAME_OFFSET] & ENTITY_ID_MASK;
-
- /* Build sensor node based on sensor number */
- dtOffset_t sensorNode = i_dt->addNode(i_parentNode, "sensor", sensorNumber);
-
- /* compatibility strings -- currently only one */
- const char* compatStr[] = {"ibm,ipmi-sensor", NULL};
-
- i_dt->addPropertyStrings(sensorNode, "compatible", compatStr);
-
- i_dt->addPropertyCell32(sensorNode, "reg", sensorNumber);
-
- // add sensor type
- i_dt->addPropertyCell32(sensorNode, "ipmi-sensor-type", sensorType);
- i_dt->addPropertyCell32(sensorNode, "ipmi-entity-id", entityId);
- i_dt->addPropertyCell32(sensorNode, "ipmi-entity-instance", instance);
- i_dt->addPropertyCell32(sensorNode, "ipmi-sensor-offsets", offsets);
- i_dt->addPropertyCell32(sensorNode, "ipmi-sensor-reading-type", readType);
-
- // currently we only add the chip ID to the OCC sensor
- if(chipId != 0xFF )
- {
- i_dt->addPropertyCell32(sensorNode, "ibm,chip-id", chipId);
- }
-
- /* return the phandle for this sensor */
- return i_dt->getPhandle(sensorNode);
-}
-
-
-// build the sensor node for a given target
-uint32_t bld_sensor_node(devTree * i_dt, const dtOffset_t & i_sensorNode,
- TARGETING::Target * i_pTarget )
-{
-
- AttributeTraits<ATTR_IPMI_SENSORS>::Type l_sensors;
- uint16_t array_rows = (sizeof(l_sensors)/sizeof(l_sensors[0]));
-
- /* if there is an IPMI_SENSORS attribute, parse it and create a node
- * for each sensor */
- if ( i_pTarget->tryGetAttr<ATTR_IPMI_SENSORS>(l_sensors) )
- {
- uint32_t chipId = 0xFF;
-
- AttributeTraits<ATTR_IPMI_INSTANCE>::Type l_instance;
-
- l_instance = i_pTarget->getAttr<TARGETING::ATTR_IPMI_INSTANCE>();
-
- // add the chip id to the OCC sensor since OPAL needs it to figure out
- // which OCC it is.
- if( TARGETING::TYPE_OCC == i_pTarget->getAttr<TARGETING::ATTR_TYPE>())
- {
- ConstTargetHandle_t proc = getParentChip(i_pTarget);
-
- chipId = getProcChipId( proc );
- }
-
- for(uint16_t i=0; i< array_rows; i++)
- {
- /* if the sensor number is 0xFF move on */
- if( l_sensors[i][IPMI_SENSOR_ARRAY_NUMBER_OFFSET] != 0xFF )
- {
- /* use this row to create the next sensor node - ignoring
- * return value for now */
- bld_sensor_node(i_dt, i_sensorNode, l_sensors[i],
- l_instance , chipId );
- }
- else
- {
- /* move on to the next target */
- break;
- }
- }
- }
-
- // return the phandle
- return i_dt->getPhandle(i_sensorNode);
-}
-
-
-/*
-* The "sensors" node contains sub-nodes for each of the IPMI sensors known to
-* the BMC.
-*/
-errlHndl_t bld_fdt_sensors(devTree * i_dt, const dtOffset_t & i_parentNode,
- const bool i_smallTree)
-{
- errlHndl_t errhdl = NULL;
-
- /* Nothing to do for small trees currently. */
- if (i_smallTree) { return NULL; }
-
- const char* sensorNodeName = "sensors";
-
- /* add the Sensors node to the BMC node */
- dtOffset_t sensorNode = i_dt->addNode(i_parentNode, sensorNodeName);
-
- i_dt->addPropertyString(sensorNode, "name", sensorNodeName );
-
- /* Add the # address & size cell properties to /sensors node. */
- i_dt->addPropertyCell32(sensorNode, "#address-cells", 1);
- i_dt->addPropertyCell32(sensorNode, "#size-cells", 0);
-
- /* loop through all the targets and get the IPMI sensor data if it
- exists */
- for (TargetIterator itr = TARGETING::targetService().begin();
- itr != TARGETING::targetService().end(); ++itr)
- {
- /* create node entries for this targets sensors if they exist
- * ignoring return value for now */
- bld_sensor_node(i_dt, sensorNode, *itr );
- }
-
- return errhdl;
-}
-
-/* add the BMC node to the device tree, this node will hold any BMC info needed
- in the device tree */
-errlHndl_t bld_fdt_bmc(devTree * i_dt, bool i_smallTree)
-{
- errlHndl_t errhdl = NULL;
-
- /* Nothing to do for small trees currently. */
- if (i_smallTree) { return NULL; }
-
- /* Find the root node. */
- dtOffset_t rootNode = i_dt->findNode("/");
-
- const char* bmcNodeName = "bmc";
-
- /* add the BMC node under the root node */
- dtOffset_t bmcNode = i_dt->addNode(rootNode, bmcNodeName);
-
- /* Add the # address & size cell properties to /bmc node. */
- i_dt->addPropertyCell32(bmcNode, "#address-cells", 1);
- i_dt->addPropertyCell32(bmcNode, "#size-cells", 0);
-
- i_dt->addPropertyString(bmcNode, "name", bmcNodeName );
-
- /* create a node to hold the sensors */
- errhdl = bld_fdt_sensors( i_dt, bmcNode, i_smallTree );
-
- return errhdl;
-}
-#endif
-
-errlHndl_t bld_fdt_vpd(devTree * i_dt, bool i_smallTree)
-{
- // Nothing to do for small trees currently.
- if (i_smallTree) { return NULL; }
-
- errlHndl_t errhdl = NULL;
- size_t vpdSize;
-
- do
- {
- /* Find the / node and add a vpd node under it. */
- dtOffset_t rootNode = i_dt->findNode("/");
- dtOffset_t vpdNode = i_dt->addNode(rootNode, "vpd");
-
- // Grab a system object to work with
- TARGETING::Target* sys = NULL;
- TARGETING::targetService().getTopLevelTarget(sys);
-
-
- /***************************************************************/
- /* Add the ibm,vpd for all functional procs */
- /***************************************************************/
- // Add vpd (VINI record) for all functional procs
- // and #V for all functional cores
- TARGETING::TargetHandleList l_cpuTargetList;
- getAllChips(l_cpuTargetList, TYPE_PROC);
-
- for ( size_t proc = 0;
- (!errhdl) && (proc < l_cpuTargetList.size()); proc++ )
- {
- TARGETING::Target * l_pProc = l_cpuTargetList[proc];
-
- uint32_t l_procId = getProcChipId(l_pProc);
- dtOffset_t procNode = i_dt->addNode(vpdNode, "processor",
- l_procId);
-
- // Read entire VINI record to stuff in devtree
- // Note: First read with NULL for o_buffer sets vpdSize to the
- // correct length
- errhdl = deviceRead( l_pProc,
- NULL,
- vpdSize,
- DEVICE_MVPD_ADDRESS( MVPD::VINI,
- MVPD::FULL_RECORD ));
-
- if(errhdl)
- {
- TRACFCOMP(g_trac_devtree,ERR_MRK" Couldn't get VINI size for HUID=0x%.8X",
- TARGETING::get_huid(l_pProc));
- break;
- }
-
- uint8_t viniBuf[vpdSize];
-
- errhdl = deviceRead( l_pProc,
- reinterpret_cast<void*>( &viniBuf ),
- vpdSize,
- DEVICE_MVPD_ADDRESS( MVPD::VINI,
- MVPD::FULL_RECORD ));
-
- if(errhdl)
- {
- TRACFCOMP(g_trac_devtree,ERR_MRK" Couldn't read VINI for HUID=0x%.8X",
- TARGETING::get_huid(l_pProc));
- break;
- }
-
- //Add the proc chips vpd
- i_dt->addPropertyBytes(procNode, "ibm,vpd", viniBuf, vpdSize);
-
- /***************************************************************/
- /* Add the #V bucket for each functional core */
- /***************************************************************/
-
- //@TODO RTC:143092
-#if 0
- TARGETING::TargetHandleList l_corelist;
- fapi::Target l_pFapiProc(fapi::TARGET_TYPE_PROC_CHIP,
- (const_cast<TARGETING::Target*>(l_pProc) ));
-
- getChildChiplets( l_corelist, l_pProc, TYPE_CORE );
- for (size_t core = 0; core < l_corelist.size(); core++)
- {
- const TARGETING::Target * l_core = l_corelist[core];
-
- uint32_t l_coreNum =
- l_core->getAttr<TARGETING::ATTR_CHIP_UNIT>();
- PIR_t pir(0);
- pir.groupId = PIR_t::groupFromChipId(l_procId);
- pir.chipId = PIR_t::chipFromChipId(l_procId);
- pir.coreId = l_coreNum;
-
- // Get #V bucket data
- uint32_t l_record = (uint32_t) MVPD::LRP0 + l_coreNum;
- fapi::voltageBucketData_t l_poundVdata = {0};
- fapi::ReturnCode l_rc = fapiGetPoundVBucketData(l_pFapiProc,
- l_record,
- l_poundVdata);
- if(l_rc)
- {
- TRACFCOMP( g_trac_devtree,ERR_MRK"Error getting #V data for HUID:"
- "0x%08X",
- l_pProc->getAttr<TARGETING::ATTR_HUID>());
-
- // Convert fapi returnCode to Error handle
- errhdl = fapiRcToErrl(l_rc);
- break;
- }
-
- //Add the attached core
- dtOffset_t coreNode = i_dt->addNode(procNode, "cpu",
- pir.word);
-
- i_dt->addPropertyBytes(coreNode, "frequency,voltage",
- reinterpret_cast<uint8_t*>( &l_poundVdata),
- sizeof(fapi::voltageBucketData_t));
- }
- if(errhdl)
- {
- break;
- }
-#endif
- }
- if(errhdl)
- {
- break;
- }
-
-#if 0 //TODO RTC123250 -- re-enable once fixed
- /***************************************************************/
- /* Now loop on all the dimms in the system and add their spd */
- /***************************************************************/
-
- // Get all functional dimm targets
- TARGETING::TargetHandleList l_dimmList;
- getAllLogicalCards(l_dimmList, TYPE_DIMM);
- size_t spdSize;
-
- for ( size_t dimm = 0;
- (!errhdl) && (dimm < l_dimmList.size()); dimm++ )
- {
- TARGETING::Target * l_pDimm = l_dimmList[dimm];
- uint32_t l_huid = TARGETING::get_huid(l_pDimm);
-
- dtOffset_t dimmNode = i_dt->addNode(vpdNode, "dimm",
- l_huid);
-
- // Read entire SPD record to stuff in devtree
- // Note: First read with NULL for o_buffer sets spdSize to the
- // correct length
- errhdl = deviceRead( l_pDimm,
- NULL,
- spdSize,
- DEVICE_SPD_ADDRESS(SPD::ENTIRE_SPD));
-
- if(errhdl)
- {
- TRACFCOMP(g_trac_devtree,ERR_MRK" Couldn't get SPD size for HUID=0x%.8X",
- TARGETING::get_huid(l_pDimm));
- break;
- }
-
- uint8_t spdBuf[spdSize];
-
- errhdl = deviceRead( l_pDimm,
- reinterpret_cast<void*>( &spdBuf ),
- spdSize,
- DEVICE_SPD_ADDRESS(SPD::ENTIRE_SPD));
-
- if(errhdl)
- {
- TRACFCOMP(g_trac_devtree,ERR_MRK" Couldn't read SPD for HUID=0x%.8X",
- TARGETING::get_huid(l_pDimm));
- break;
- }
-
- //Add the dimm spd
- i_dt->addPropertyBytes(dimmNode, "spd", spdBuf, spdSize);
- }
- if(errhdl)
- {
- break;
- }
-#endif
-
- }while(0);
-
- return errhdl;
-}
-
-errlHndl_t bld_fdt_secureboot(devTree * i_dt, bool i_smallTree)
-{
- // Nothing to do for small trees currently.
- if (i_smallTree) { return NULL; }
-
- errlHndl_t errhdl = NULL;
-
- do
- {
- /* Find the / node and add a secureboot node under it. */
- dtOffset_t rootNode = i_dt->findNode("/");
-
- dtOffset_t secBootNode = i_dt->addNode(rootNode, "ibm,secureboot");
- sha2_hash_t hw_key_hash;
- SECUREBOOT::getHwKeyHash(hw_key_hash);
-
- i_dt->addPropertyBytes(secBootNode, "hw-key-hash",
- reinterpret_cast<uint8_t*>(hw_key_hash),
- sizeof(hw_key_hash));
-
- i_dt->addPropertyString(secBootNode, "hash-algo", "sha512");
-
- /* compatibility strings -- currently only one */
- const char* compatStr[] = {"ibm,secureboot-v1", NULL};
- i_dt->addPropertyStrings(secBootNode, "compatible", compatStr);
-
- if (SECUREBOOT::enabled())
- {
- i_dt->addProperty(secBootNode, "secure-enabled");
- }
-#ifdef CONFIG_TPMDD
- if (TRUSTEDBOOT::enabled())
- {
- i_dt->addProperty(secBootNode, "trusted-enabled");
- }
-#endif
-
- } while(0);
-
- return errhdl;
-}
-
-errlHndl_t build_flatdevtree( uint64_t i_dtAddr, size_t i_dtSize,
- bool i_smallTree )
-{
- errlHndl_t errhdl = NULL;
- devTree * dt = &Singleton<devTree>::instance();
- bool devTreeVirtual = true;
-
- do
- {
- if (0 == i_dtAddr)
- {
- i_dtAddr = DEVTREE_DATA_ADDR;
- i_dtSize = DEVTREE_SPACE_SIZE;
- devTreeVirtual = false;
- }
-
- TRACFCOMP( g_trac_devtree, "---devtree init---" );
- dt->initialize(i_dtAddr, i_dtSize, devTreeVirtual);
- errhdl = bld_fdt_system(dt, i_smallTree);
- if (errhdl)
- {
- break;
- }
-
- std::vector<homerAddr_t> l_homerRegions;
-
- TRACFCOMP( g_trac_devtree, "---devtree cpu ---" );
- errhdl = bld_fdt_cpu(dt, l_homerRegions, i_smallTree);
- if(errhdl)
- {
- break;
- }
-
-#ifndef CONFIG_DISABLE_HOSTBOOT_RUNTIME
- TRACFCOMP( g_trac_devtree, "---devtree reserved mem ---" );
- errhdl = bld_fdt_reserved_mem(dt, l_homerRegions, i_smallTree);
- if(errhdl)
- {
- break;
- }
-#endif
- TRACFCOMP( g_trac_devtree, "---devtree mem ---" );
- errhdl = bld_fdt_mem(dt, i_smallTree);
- if(errhdl)
- {
- break;
- }
-
-#ifdef CONFIG_BMC_IPMI
- TRACFCOMP( g_trac_devtree, "---devtree BMC ---" );
- errhdl = bld_fdt_bmc(dt, i_smallTree);
- if(errhdl)
- {
- break;
- }
-#endif
-
- TRACFCOMP( g_trac_devtree, "---devtree vpd ---" );
- errhdl = bld_fdt_vpd(dt, i_smallTree);
- if(errhdl)
- {
- break;
- }
-
- TRACFCOMP( g_trac_devtree, "---devtree secureboot ---" );
- errhdl = bld_fdt_secureboot(dt, i_smallTree);
- if(errhdl)
- {
- break;
- }
- }while(0);
-
- return errhdl;
-}
-
-
-uint64_t get_flatdevtree_phys_addr()
-{
- return Singleton<devTree>::instance().getBlobPhys();
-}
-
-}
diff --git a/src/usr/devtree/devtree.C b/src/usr/devtree/devtree.C
deleted file mode 100644
index 6bdeff33a..000000000
--- a/src/usr/devtree/devtree.C
+++ /dev/null
@@ -1,741 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG */
-/* This is an automatically generated prolog. */
-/* */
-/* $Source: src/usr/devtree/devtree.C $ */
-/* */
-/* OpenPOWER HostBoot Project */
-/* */
-/* Contributors Listed Below - COPYRIGHT 2013,2015 */
-/* [+] International Business Machines Corp. */
-/* */
-/* */
-/* Licensed under the Apache License, Version 2.0 (the "License"); */
-/* you may not use this file except in compliance with the License. */
-/* You may obtain a copy of the License at */
-/* */
-/* http://www.apache.org/licenses/LICENSE-2.0 */
-/* */
-/* Unless required by applicable law or agreed to in writing, software */
-/* distributed under the License is distributed on an "AS IS" BASIS, */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
-/* implied. See the License for the specific language governing */
-/* permissions and limitations under the License. */
-/* */
-/* IBM_PROLOG_END_TAG */
-#include <stdio.h>
-#include <string.h>
-#include <assert.h>
-#include "devtree.H"
-#include <sys/mm.h>
-#include <limits.h>
-
-extern trace_desc_t *g_trac_devtree;
-
-#define DEBUGOUT(msg...)
-#define DEBUGOUTB(data,len,msg...)
-//#define DEBUGOUT(msg...) TRACFCOMP(g_trac_devtree,msg)
-//#define DEBUGOUTB(data,len,msg...) DEBUGOUT(msg);TRACFBIN(g_trac_devtree,"",data,len);
-
-namespace DEVTREE
-{
-
-uint64_t devTree::getBlobPhys()
-{
- return mPhysAddr;
-}
-
-uint32_t devTree::getSize()
-{
- return mHeader->totalSize;
-}
-
-void devTree::initialize(uint64_t i_addr, size_t i_maxSize, bool i_virtual)
-{
- /* Initialize the device tree header. */
- mMaxSize = i_maxSize;
- if (i_virtual)
- {
- mPhysAddr = 0;
- mSpace = reinterpret_cast<char*>(i_addr);
- }
- else
- {
- mPhysAddr = i_addr;
- mSpace= static_cast<char*>
- (mm_block_map(reinterpret_cast<void*>(mPhysAddr),
- mMaxSize));
- }
- memset(mSpace, 0, mMaxSize);
- mNextPhandle = 0x10000000;
-
- TRACFCOMP( g_trac_devtree, "FDT located @ v:%p p:0x%x", mSpace, mPhysAddr);
-
- mHeader->magicNumber = DT_MAGIC;
- mHeader->totalSize = (sizeof(*mHeader) +
- (sizeof(dtReserveEntry_t) * DT_MAX_MEM_RESERVE));
- mHeader->offsetStruct = mHeader->totalSize;
- mHeader->offsetStrings = mHeader->totalSize;
- mHeader->offsetReservedMemMap = sizeof(*mHeader);
- mHeader->version = DT_CUR_VERSION;
- mHeader->lastCompatVersion = DT_COMPAT_VERSION;
- mHeader->bootCpuId = 0;
- mHeader->sizeStrings = 0;
- mHeader->sizeStruct = 0;
-
- /* Create the initial root node. */
- uint32_t* curWord = getStructSectionAtOffset(0);
- *curWord++ = DT_BEGIN_NODE;
- *curWord++ = 0;
- *curWord++ = DT_END_NODE;
- *curWord = DT_END;
-
- /* Adjust offsets and sizes to account for the root node we just added*/
- uint32_t structSizeAdded = sizeof(uint32_t) * 4;
- mHeader->offsetStrings += structSizeAdded;
- mHeader->sizeStruct += structSizeAdded;
- mHeader->totalSize += structSizeAdded;
-
- /* Add the standard root node properties. */
- dtOffset_t rootNode = findNode("/");
- addPropertyCell32(rootNode, "#address-cells", 2);
- addPropertyCell32(rootNode, "#size-cells", 2);
-
- //"Get" the phandle -- this will add one to root node as
- //it doesn't already have one
- getPhandle(rootNode);
-}
-
-void devTree::setBootCpu(uint32_t pir)
-{
- mHeader->bootCpuId = pir;
-}
-
-dtOffset_t devTree::findNode(const char* nodePath)
-{
- /* Get structure section and start out with the name of first node*/
- uint32_t* curWord = getStructSectionAtOffset(0);
- dtOffset_t curOffset = 0;
-
- if(strlen(nodePath) == 1)
- {
- if(nodePath[0] == '/')
- {
- return 0;
- }
- else
- {
- return DT_INVALID_OFFSET;
- }
- }
-
- nodePath++;
- int nodeNestLevel = 0;
- curWord += 2;
- curOffset += 8;
- do
- {
- nodeNestLevel = 0;
- /* Figure out how long the name of the current portion
- of the path we're looking for is. */
- int currentPathLength = 0;
- while(nodePath[currentPathLength] &&
- (nodePath[currentPathLength] != '/'))
- {
- currentPathLength++;
- }
- int done = 0;
- do
- {
- switch(*curWord)
- {
- case DT_BEGIN_NODE:
- {
- if(nodeNestLevel == 0)
- {
- if(memcmp(curWord+1, nodePath, currentPathLength) == 0)
- {
- if(nodePath[currentPathLength] == NULL)
- {
- return curOffset;
- }
- else
- {
- done = 1;
- }
- }
- }
-
- nodeNestLevel++;
-
- /* Figure out how far to advance to get past this node entry
- Start by skipping over the node name. */
- int nodeSkipWords = getNodeTagAndNameWords(curOffset);
- curWord += nodeSkipWords;
- curOffset += nodeSkipWords * 4;
- }
- break;
-
- case DT_END_NODE:
- {
- if(nodeNestLevel == 0)
- {
- return DT_INVALID_OFFSET;
- }
- else
- {
- nodeNestLevel--;
- /* Skip over the node end tag. */
- curWord++;
- curOffset += 4;
- }
- }
- break;
-
- case DT_PROP:
- {
- /* Skip over the property. */
- curWord++;
- int propSkiWords = ((*curWord + 3) / 4) + 2;
- curWord += propSkiWords;
- curOffset += (propSkiWords + 1) * 4;
- }
- break;
-
- case DT_NOP:
- {
- curWord++;
- curOffset += 4;
- }
- break;
-
- case DT_END:
- return DT_INVALID_OFFSET;
- break;
-
- default:
- return DT_INVALID_OFFSET;
- break;
- }
- }
- while(!done);
- nodePath += currentPathLength + 1;
- }
- while(*nodePath != NULL);
-
- /* We should never get here. */
- return DT_INVALID_OFFSET;
-}
-
-dtOffset_t devTree::addNode(dtOffset_t parentNodeOffset, const char* nodeName)
-{
- DEBUGOUT("DT> addNode:%s",nodeName);
- uint32_t* curWord = getStructSectionAtOffset(parentNodeOffset);
- int skipWords = getNodeTagAndNameWords(parentNodeOffset);
-
- curWord += skipWords;
- dtOffset_t newNodeOffset = parentNodeOffset + (skipWords * 4);
-
- /* There is a FDT rule that nodes must be after properties
- so skip over any properties. */
- while(*curWord == DT_PROP)
- {
- int propertyWords = getPropertyWords(newNodeOffset);
- curWord += propertyWords;
- newNodeOffset += propertyWords * 4;
- }
-
- size_t newNodeNameLength = strlen(nodeName);
- int newNodeNameWords = (newNodeNameLength + 4) / 4;
- insertStructSpace(newNodeOffset, newNodeNameWords + 2);
-
- *curWord++ = DT_BEGIN_NODE;
- for(int i = 0; i < newNodeNameWords; ++i)
- {
- *curWord = 0;
- memcpy(curWord, nodeName + (i * 4),
- newNodeNameLength < 4 ? newNodeNameLength : 4);
- if(newNodeNameLength < 4)
- {
- newNodeNameLength = 0;
- }
- else
- {
- newNodeNameLength -= 4;
- }
- curWord++;
- }
-
- *curWord = DT_END_NODE;
-
- /* Always tack on a pHandle to each new node*/
- uint32_t newPhandle = mNextPhandle++;
- addPropertyCell32(newNodeOffset, "phandle", newPhandle);
-
- return newNodeOffset;
-}
-
-dtOffset_t devTree::addNode(dtOffset_t parentNodeOffset,
- const char* nodeName, uint64_t unitAddress)
-{
- char nodeNameWithUnitAddress[1024];
- sprintf(nodeNameWithUnitAddress, "%s@%lx", nodeName, unitAddress);
- return addNode(parentNodeOffset, nodeNameWithUnitAddress);
-}
-
-void devTree::addProperty(dtOffset_t parentNodeOffset, const char* propertyName)
-{
- uint32_t* curWord = getStructSectionAtOffset(parentNodeOffset);
- int skipWords = getNodeTagAndNameWords(parentNodeOffset);
-
- curWord += skipWords;
- dtOffset_t newPropertyOffset = parentNodeOffset + (skipWords * 4);
- insertStructSpace(newPropertyOffset, 3);
-
- *curWord++ = DT_PROP;
- *curWord++ = 0;
- *curWord++ = addString(propertyName);
- DEBUGOUT("DT> addProperty:%s",propertyName);
-}
-
-void devTree::addPropertyString(dtOffset_t parentNodeOffset,
- const char* propertyName,
- const char* propertyData)
-{
- DEBUGOUT("DT> addPropertyString:%s=%s",propertyName,propertyData);
- uint32_t* curWord = getStructSectionAtOffset(parentNodeOffset);
- int skipWords = getNodeTagAndNameWords(parentNodeOffset);
-
- curWord += skipWords;
- dtOffset_t newPropertyOffset = parentNodeOffset + (skipWords * 4);
- size_t newPropertyDataLength = strlen(propertyData);
- int newPropertyDataWords = (newPropertyDataLength + 4) / 4;
- insertStructSpace(newPropertyOffset, newPropertyDataWords + 3);
-
- *curWord++ = DT_PROP;
- *curWord++ = newPropertyDataLength + 1;
- *curWord++ = addString(propertyName);
-
- for(int i = 0; i < newPropertyDataWords; ++i)
- {
- *curWord = 0;
- memcpy(curWord, propertyData + (i * 4),
- newPropertyDataLength < 4 ? newPropertyDataLength : 4);
- if(newPropertyDataLength < 4)
- {
- newPropertyDataLength = 0;
- }
- else
- {
- newPropertyDataLength -= 4;
- }
- curWord++;
- }
-}
-
-void devTree::addPropertyBytes(dtOffset_t parentNodeOffset,
- const char* propertyName,
- const uint8_t* propertyData,
- uint32_t numBytes)
-{
- DEBUGOUTB(propertyData,numBytes,"DT> addPropertyBytes:%s=",propertyName);
- uint32_t* curWord = getStructSectionAtOffset(parentNodeOffset);
- int skipWords = getNodeTagAndNameWords(parentNodeOffset);
-
- curWord += skipWords;
- dtOffset_t newPropertyOffset = parentNodeOffset + (skipWords * 4);
- size_t newPropertyDataLength = numBytes;
- int newPropertyDataWords = (newPropertyDataLength + 3) / 4;
- insertStructSpace(newPropertyOffset, newPropertyDataWords + 3);
-
- *curWord++ = DT_PROP;
- *curWord++ = newPropertyDataLength;
- *curWord++ = addString(propertyName);
-
- for(int i = 0; i < newPropertyDataWords; ++i)
- {
- *curWord = 0;
- memcpy(curWord, propertyData + (i * 4),
- newPropertyDataLength < 4 ? newPropertyDataLength : 4);
- if(newPropertyDataLength < 4)
- {
- newPropertyDataLength = 0;
- }
- else
- {
- newPropertyDataLength -= 4;
- }
- curWord++;
- }
-}
-
-void devTree::addPropertyStrings(dtOffset_t parentNodeOffset,
- const char* propertyName,
- const char** propertyData)
-{
- uint32_t* curWord = getStructSectionAtOffset(parentNodeOffset);
- int skipWords = getNodeTagAndNameWords(parentNodeOffset);
-
- size_t totalDataSize = 0;
- int numStrings = 0;
- /* Figure out the total size of the data in the property. */
- for(int stringIndex = 0;
- propertyData[stringIndex] && *propertyData[stringIndex]; stringIndex++)
- {
- totalDataSize += strlen(propertyData[stringIndex]) + 1;
- numStrings++;
- }
-
- curWord += skipWords;
- dtOffset_t newPropertyOffset = parentNodeOffset + (skipWords * 4);
- size_t newPropertyDataLength = totalDataSize;
- int newPropertyDataWords = (newPropertyDataLength + 3) / 4;
- insertStructSpace(newPropertyOffset, newPropertyDataWords + 3);
-
- *curWord++ = DT_PROP;
- *curWord++ = newPropertyDataLength ;
- *curWord++ = addString(propertyName);
- DEBUGOUT("DT> addPropertyStrings:%s",propertyName);
-
- for(int i = 0; i < newPropertyDataWords; ++i)
- {
- *(curWord + i) = 0;
- }
-
- char* target = (char*)curWord;
- for(int stringIndex = 0; stringIndex < numStrings; stringIndex++)
- {
- DEBUGOUT("DT> %s",propertyData[stringIndex]);
- size_t curStringLen = strlen(propertyData[stringIndex]);
- memcpy(target, propertyData[stringIndex], curStringLen);
- target += curStringLen + 1;
- }
-}
-
-void devTree::addPropertyCell32(dtOffset_t parentNodeOffset,
- const char* propertyName,
- const uint32_t cell)
-{
- uint32_t cells[1] = { cell };
- addPropertyCells32(parentNodeOffset, propertyName, cells, 1);
-}
-
-void devTree::addPropertyCell64(dtOffset_t parentNodeOffset,
- const char* propertyName,
- const uint64_t cell)
-{
- uint64_t cells[1] = { cell };
- addPropertyCells64(parentNodeOffset, propertyName, cells, 1);
-}
-
-void devTree::addPropertyCells32(dtOffset_t parentNodeOffset,
- const char* propertyName,
- uint32_t cells[], uint32_t numCells)
-{
- uint32_t* curWord = getStructSectionAtOffset(parentNodeOffset);
- int skipWords = getNodeTagAndNameWords(parentNodeOffset);
-
- curWord += skipWords;
- dtOffset_t newPropertyOffset = parentNodeOffset + (skipWords * 4);
- int newPropertyDataLength = numCells * 4;
- int newPropertyDataWords = numCells;
- insertStructSpace(newPropertyOffset, newPropertyDataWords + 3);
-
- *curWord++ = DT_PROP;
- *curWord++ = newPropertyDataLength;
- *curWord++ = addString(propertyName);
- DEBUGOUT("DT> addPropertyCells32:%s",propertyName);
-
- for(uint32_t i = 0; i < numCells; ++i)
- {
- DEBUGOUT("DT> %.8X",cells[i]);
- *curWord++ = cells[i];
- }
-}
-
-void devTree::addPropertyCells64(dtOffset_t parentNodeOffset,
- const char* propertyName,
- uint64_t cells[], uint32_t numCells)
-{
- uint32_t* curWord = getStructSectionAtOffset(parentNodeOffset);
- int skipWords = getNodeTagAndNameWords(parentNodeOffset);
-
- curWord += skipWords;
- dtOffset_t newPropertyOffset = parentNodeOffset + (skipWords * 4);
- int newPropertyDataLength = numCells * 8;
- int newPropertyDataWords = numCells * 2;
- insertStructSpace(newPropertyOffset, newPropertyDataWords + 3);
-
- *curWord++ = DT_PROP;
- *curWord++ = newPropertyDataLength;
- *curWord++ = addString(propertyName);
- DEBUGOUT("DT> addPropertyCells32:%s",propertyName);
-
- for(uint32_t i = 0; i < numCells; ++i)
- {
- DEBUGOUT("DT> %.16X",cells[i]);
- *curWord++ = cells[i] >> 32;
- *curWord++ = cells[i];
- }
-}
-
-int devTree::getNodeTagAndNameWords(dtOffset_t nodeOffset)
-{
- size_t nodeNameAndTagWords = 1;
- uint32_t* curWord = getStructSectionAtOffset(nodeOffset);
- nodeNameAndTagWords += (strlen((char*)(curWord + 1)) + 4) / 4;
- return nodeNameAndTagWords;
-}
-
-void devTree::insertStructSpace(uint32_t offset, int numNewWords)
-{
- uint32_t* firstWord = getStructSectionAtOffset(0);
- int numCurrentWords = mHeader->sizeStruct / 4;
- /* Mode the string section out of the way first. */
- shiftStringsSection(numNewWords * 4);
- /* Now insert space into the struct section. */
- assert((mHeader->totalSize + (numNewWords * 4)) < mMaxSize);
- mHeader->sizeStruct += numNewWords * 4;
- mHeader->totalSize += numNewWords * 4;
-
- uint32_t* srcWord = firstWord + numCurrentWords - 1;
- uint32_t* tgtWord = firstWord + numCurrentWords + numNewWords - 1;
- int numCopyWords = numCurrentWords - (offset / 4);
- while(numCopyWords--)
- {
- *tgtWord = *srcWord;
- tgtWord--;
- srcWord--;
- };
-}
-
-void devTree::shiftStringsSection(int shiftSize)
-{
- /* We always move it forward so copy it from the end to the beginning. */
- uint32_t stringSectionSize = mHeader->sizeStrings;
- char* src = mSpace + mHeader->offsetStrings;
- char* tgt = src + shiftSize;
-
- memmove(tgt, src, stringSectionSize);
-
- mHeader->offsetStrings += shiftSize;
-
- /* Clear out the area we just shifted out of so that it's easier to
- debug the blob. */
- memset(src, 0, shiftSize);
-}
-
-int devTree::getPropertyWords(int propertyOffset)
-{
- int propertyWords = 3;
- uint32_t* curWord = getStructSectionAtOffset(propertyOffset);
- curWord++; /* Skip over the DT_PROP tag */
- propertyWords += (*curWord + 3) / 4;
- return propertyWords;
-}
-
-dtOffset_t devTree::addString(const char *string)
-{
- dtOffset_t stringOffset = 0;
- size_t stringSize = strlen(string) + 1;
- char* stringSection = mSpace + mHeader->offsetStrings;
- uint32_t stringSectionSize = mHeader->sizeStrings;
-
- /* Search for the string as long as we know it could still be there. */
- while(stringSize <= (stringSectionSize - stringOffset))
- {
- if(memcmp(stringSection, string, stringSize) == 0)
- {
- return stringOffset;
- }
- else
- {
- size_t curStringLength = strlen(stringSection) + 1;
- stringOffset += curStringLength;
- stringSection += curStringLength;
- }
- }
-
- /* We didn't find a string to reuse so tack this one on the end. */
- stringOffset = mHeader->sizeStrings;
- memcpy(mSpace + mHeader->offsetStrings + stringOffset, string, stringSize);
- assert((mHeader->totalSize + stringSize) < mMaxSize);
- mHeader->sizeStrings += stringSize;
- mHeader->totalSize += stringSize;
- return stringOffset;
-}
-
-bool devTree::locateStringOffset(const char* string, uint32_t& stringOffset)
-{
- bool foundStringOffset = false;
- stringOffset = 0;
- size_t stringSize = strlen(string) + 1;
- char* stringSection = mSpace + mHeader->offsetStrings;
- uint32_t stringSectionSize = mHeader->sizeStrings;
-
- /* Search for the string as long as we know it could still be there. */
- while(stringSize <= (stringSectionSize - stringOffset))
- {
- if(memcmp(stringSection, string, stringSize) == 0)
- {
- foundStringOffset = true;
- break;
- }
- else
- {
- size_t curStringLength = strlen(stringSection) + 1;
- stringOffset += curStringLength;
- stringSection += curStringLength;
- }
- }
-
- return foundStringOffset;
-}
-
-void* devTree::findProperty(dtOffset_t nodeOffset, const char* propertyName)
-{
- uint32_t nameOffset = 0;
- void *propertyData = NULL;
-
- if(locateStringOffset(propertyName, nameOffset))
- {
- uint32_t* curWord = getStructSectionAtOffset(nodeOffset);
- int skipWords = getNodeTagAndNameWords(nodeOffset);
-
- curWord += skipWords;
- dtOffset_t curOffset = nodeOffset + (skipWords * 4);
-
- while(*curWord == DT_PROP)
- {
- /* Check if this is the property we are searching for. */
- if(*(curWord + 2) == nameOffset)
- {
- /* It is, we found it. */
- return (void*)(curWord + 3);
- }
- else
- {
- int propertyWords = getPropertyWords(curOffset);
- curWord += propertyWords;
- curOffset += propertyWords * 4;
- }
- }
- }
-
- return propertyData;
-}
-
-uint32_t devTree::getPhandle(dtOffset_t nodeOffset)
-{
- uint32_t* phandlePtr = (uint32_t*) findProperty(nodeOffset, "phandle");
- if(phandlePtr)
- {
- return *phandlePtr;
- }
-
- /* We didn't find a phandle, so we need to add one. */
- uint32_t newPhandle = mNextPhandle++;
- addPropertyCell32(nodeOffset, "phandle", newPhandle);
- return newPhandle;
-}
-
-void devTree::appendPropertyBytes(dtOffset_t parentNode,
- const char* propertyName,
- const uint8_t* propertyData,
- uint32_t numBytes)
-{
- uint32_t nameOffset = 0;
-
- if(locateStringOffset(propertyName, nameOffset))
- {
- uint32_t* curWord = getStructSectionAtOffset(parentNode);
- int skipWords = getNodeTagAndNameWords(parentNode);
-
- curWord += skipWords;
- dtOffset_t curOffset = parentNode + (skipWords * 4);
-
- while(*curWord == DT_PROP)
- {
- /* Check if this is the property we are searching for. */
- if(*(curWord + 2) == nameOffset)
- {
- /* It is, we found it. */
- uint32_t curPropertyDataLength = *(curWord + 1);
- *(curWord + 1) = curPropertyDataLength + numBytes;
- uint8_t* newDataLocation = ((uint8_t*)(curWord + 3))
- + curPropertyDataLength;
- uint32_t curPropertyDataWords = (curPropertyDataLength + 3) / 4;
- uint32_t newPropertyDataWords = (curPropertyDataLength
- + numBytes + 3) / 4;
- uint32_t propertyDataWordsToAdd = newPropertyDataWords
- - curPropertyDataWords;
- if(propertyDataWordsToAdd)
- {
- uint32_t insertOffset =curOffset +
- ((3 + curPropertyDataWords) * 4);
- insertStructSpace(insertOffset, propertyDataWordsToAdd);
- }
- memcpy(newDataLocation, propertyData, numBytes);
- break;
- }
- else
- {
- int propertyWords = getPropertyWords(curOffset);
- curWord += propertyWords;
- curOffset += propertyWords * 4;
- }
- }
- }
-}
-
-int devTree::populateReservedMem(uint64_t i_addrs[],
- uint64_t i_sizes[],
- size_t i_num)
-{
- int rc = 1;
-
- //if requested num is less than max, update
- if(i_num < DT_MAX_MEM_RESERVE)
- {
- dtReserveEntry* reserveMemMap = reinterpret_cast<dtReserveEntry*>
- (mSpace + mHeader->offsetReservedMemMap);
-
- for(size_t i=0; i<i_num; i++)
- {
- reserveMemMap->address = i_addrs[i];
- reserveMemMap->size = i_sizes[i];
-
- reserveMemMap++;
- }
-
- rc = 0;
- }
-
- return rc;
-}
-
-
-/********************
-Internal Methods
-********************/
-
-/**
- * @brief Constructor
-*/
-devTree::devTree()
-:mSpace(NULL), mMaxSize(0)
-{
- //Nothing right now...
-}
-
-/**
- * @brief Destructor
- */
-devTree::~devTree()
-{
- if (mPhysAddr)
- {
- mm_block_unmap(mSpace);
- }
-}
-
-}
diff --git a/src/usr/devtree/devtree.H b/src/usr/devtree/devtree.H
deleted file mode 100644
index a65504774..000000000
--- a/src/usr/devtree/devtree.H
+++ /dev/null
@@ -1,336 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG */
-/* This is an automatically generated prolog. */
-/* */
-/* $Source: src/usr/devtree/devtree.H $ */
-/* */
-/* OpenPOWER HostBoot Project */
-/* */
-/* Contributors Listed Below - COPYRIGHT 2013,2015 */
-/* [+] International Business Machines Corp. */
-/* */
-/* */
-/* Licensed under the Apache License, Version 2.0 (the "License"); */
-/* you may not use this file except in compliance with the License. */
-/* You may obtain a copy of the License at */
-/* */
-/* http://www.apache.org/licenses/LICENSE-2.0 */
-/* */
-/* Unless required by applicable law or agreed to in writing, software */
-/* distributed under the License is distributed on an "AS IS" BASIS, */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
-/* implied. See the License for the specific language governing */
-/* permissions and limitations under the License. */
-/* */
-/* IBM_PROLOG_END_TAG */
-#include <devtree/devtreeif.H>
-
-#ifndef _DEVTREE_H
-#define _DEVTREE_H
-
-namespace DEVTREE
-{
-typedef size_t dtOffset_t;
-
-
- /**
- * The devtree class that does the actual work of
- * generating and manipulating the devtree
- *
- */
- class devTree
- {
- public:
-
- /**
- * Initialize the FDT at address and size
- * @param[in] i_addr Address to place FDT at
- * @param[in] i_maxSize Size of FDT
- * @param[in] i_virtual Address is virtual.
- */
- void initialize(uint64_t i_addr, size_t i_maxSize, bool i_virtual);
-
- /**
- * Find given node (e.g. "/lpc") in the FDT
- * @param[in] nodePath NULL terminated string of the path
- * @return dtOffset_t into FDT of node location
- */
- dtOffset_t findNode(const char* nodePath);
-
- /**
- * Find and return a pointer to a property within a node
- * @param[in] nodeOffset Offset into FDT to start looking
- * @param[in] propertyName NULL terminated string of the property
- to get
- * @return void* pointer to dtOffset_t into FDT of node location
- */
- void* findProperty(dtOffset_t nodeOffset, const char* propertyName);
-
- /**
- * Add a new node under the parent node
- * @param[in] parentNode Offset to parent node
- * @param[in] nodeName NULL terminated string of node to add
- * @return dtOffset_t into FDT of node location
- */
- dtOffset_t addNode(dtOffset_t parentNode, const char* nodeName);
-
- /**
- * Add a new node under the parent node with address
- * @param[in] parentNode Offset to parent node
- * @param[in] nodeName NULL terminated string of node to add
- * @param[in] unitAddress Address of the node
- * @return dtOffset_t into FDT of node location
- */
- dtOffset_t addNode(dtOffset_t parentNode, const char* nodeName,
- uint64_t unitAddress);
-
- /**
- * Add a property to a node with no data
- * @param[in] parentNode Offset to node to add property to
- * @param[in] propertyName NULL terminated string of property name
- */
- void addProperty(dtOffset_t parentNode, const char* propertyName);
-
- /**
- * Add a property to a node with free form bytes
- * @param[in] parentNode Offset to node to add property to
- * @param[in] propertyName NULL terminated string of property name
- * @param[in] propertyData Data to add
- * @param[in] numBytes Number of data bytes
- */
- void addPropertyBytes(dtOffset_t parentNode, const char* propertyName,
- const uint8_t* propertyData, uint32_t numBytes);
-
- /**
- * Add a property to a node with string data
- * @param[in] parentNode Offset to node to add property to
- * @param[in] propertyName NULL terminated string of property name
- * @param[in] propertyData NULL terminated string data
- */
- void addPropertyString(dtOffset_t parentNode, const char* propertyName,
- const char* propertyData);
-
- /**
- * Add a property to a node with array of strings
- * @param[in] parentNode Offset to node to add property to
- * @param[in] propertyName NULL terminated string of property name
- * @param[in] propertyData NULL terminated array of strings, last
- * string must be NULL
- */
- void addPropertyStrings(dtOffset_t parentNode, const char* propertyName,
- const char** propertyData);
-
- /**
- * Add a property to a node with a 32 bit "cell" (aka uint32_t data)
- * @param[in] parentNode Offset to node to add property to
- * @param[in] propertyName NULL terminated string of property name
- * @param[in] cell Data to add
- */
- void addPropertyCell32(dtOffset_t parentNode, const char* propertyName,
- const uint32_t cell);
-
- /**
- * Add a property to a node with a 64 bit "cell" (aka uint64_t data)
- * @param[in] parentNode Offset to node to add property to
- * @param[in] propertyName NULL terminated string of property name
- * @param[in] cell Data to add
- */
- void addPropertyCell64(dtOffset_t parentNode, const char* propertyName,
- const uint64_t cell);
-
- /**
- * Add a property to a node with a 32 bit array of "cells"
- * (aka uint32_t data)
- * @param[in] parentNode Offset to node to add property to
- * @param[in] propertyName NULL terminated string of property name
- * @param[in] cells Array of uint32_t data
- * @param[in] numCells Number of cells
- */
- void addPropertyCells32(dtOffset_t parentNode, const char* propertyName,
- uint32_t cells[], uint32_t numCells);
-
- /**
- * Add a property to a node with a 64 bit array of "cells"
- * (aka uint64_t data)
- * @param[in] parentNode Offset to node to add property to
- * @param[in] propertyName NULL terminated string of property name
- * @param[in] cells Array of uint64_t data
- * @param[in] numCells Number of cells
- */
- void addPropertyCells64(dtOffset_t parentNode, const char* propertyName,
- uint64_t cells[], uint32_t numCells);
-
- /**
- * Return the physical "blob" address to the start of the FDT
- * @return uin64_t to the start of the FDT memory
- */
- uint64_t getBlobPhys();
-
- /**
- * Each devtree node has a "handle" number. This function returns the
- * handle number for given node.
- * @param[in] nodeOffset Offset to node
- * @return uin32_t Handle number for node
- */
- uint32_t getPhandle(dtOffset_t nodeOffset);
-
- /**
- * Append bytes to a property
- * @param[in] parentNode Offset to node to add property to
- * @param[in] propertyName NULL terminated string of property name
- * @param[in] propertyData Data to add
- * @param[in] numBytes Number of data bytes
- */
- void appendPropertyBytes(dtOffset_t parentNode,
- const char* propertyName,
- const uint8_t* propertyData,
- uint32_t numBytes);
-
- /**
- * Populate reserved memory regions
- * @param[in] i_addrs Array of addresses to set in reserved memory
- * @param[in] i_sizes Array of sizes to set in reserved memory
- * @param[in] i_num Number of elements in the arrays
- * @return int, zero on successes otherwise non zero
- */
- int populateReservedMem(uint64_t i_addrs[],
- uint64_t i_sizes[],
- size_t i_num);
-
- /**
- * Return the current size of the FDT (not max)
- * @return uin32_t Size of the FDT
- */
- uint32_t getSize();
-
-
- protected:
- /*Constructor*/
- devTree();
-
- /*Destructor*/
- ~devTree();
-
- /**
- * Get the internal struct section at node offset
- * @param[in] offset Offset to node
- * @return uin32_t* pointer to struct section
- */
- inline uint32_t* getStructSectionAtOffset(dtOffset_t offset);
-
- /**
- * Utility function to get the length fo the tag/name words for
- * given node
- * @param[in] nodeOffset Offset to node
- * @return int Words consumed by tag/name in FDT
- */
- int getNodeTagAndNameWords(dtOffset_t nodeOffset);
-
- /**
- * Utility function to get the length fo the tag/name words for
- * given node
- * @param[in] nodeOffset Offset to node
- * @return int Words consumed by tag/name in FDT
- */
- void insertStructSpace(uint32_t offset, int numNewWords);
-
- /**
- * Utility function to shift the string section
- * @param[in] shiftSize Amount to shift
- */
- void shiftStringsSection(int shiftSize);
-
- /**
- * Get number of words for property
- * @param[in] propertyOffset Offset of property
- * @return int Words consumed by Property
- */
- int getPropertyWords(int propertyOffset);
-
- /**
- * Utility function to add String to string table
- * @param[in] string NULL terminated string to add
- * @return dtOffset_t Offset string was added at
- */
- dtOffset_t addString(const char *string);
-
- /**
- * Set the boot CPU PIR into FDT
- * @param[in] pir PIR value for boot processor
- */
- void setBootCpu(uint32_t pir);
-
- /**
- * Utility function to locate string in string table
- * @param[in] string NULL terminated string to find
- * @param[out] stringOffset Offset if found
- * @return bool True if found
- */
- bool locateStringOffset(const char* string, uint32_t& stringOffset);
-
-
- private:
-
- enum Constants {
- DT_MAGIC =0xd00dfeed,
- DT_CUR_VERSION =0x11,
- DT_COMPAT_VERSION =0x10,
-
- DT_BEGIN_NODE =0x1,
- DT_END_NODE =0x2,
- DT_PROP =0x3,
- DT_NOP =0x4,
- DT_END =0x9,
- DT_INVALID_OFFSET =0xFFFFFFFF,
-
-
- DT_MAX_MEM_RESERVE =16,
-
- };
-
-
- typedef struct dtHeader
- {
- uint32_t magicNumber;
- uint32_t totalSize;
- uint32_t offsetStruct;
- uint32_t offsetStrings;
- uint32_t offsetReservedMemMap;
- uint32_t version;
- uint32_t lastCompatVersion;
- uint32_t bootCpuId;
- uint32_t sizeStrings;
- uint32_t sizeStruct;
- }
- dtHeader_t;
-
- typedef struct dtReserveEntry
- {
- uint64_t address;
- uint64_t size;
- }
- dtReserveEntry_t;
-
-
-
- union
- {
- dtHeader_t* mHeader;
- char* mSpace;
- };
- uint32_t mNextPhandle;
- size_t mMaxSize;
- uint64_t mPhysAddr;
-
- // let my testcase poke around
- friend class devTreeTest;
-
- };
-
-
-
- uint32_t* devTree::getStructSectionAtOffset(dtOffset_t offset)
- {
- return (uint32_t*) (mSpace + mHeader->offsetStruct + offset);
- }
-}
-#endif /* _DEVTREE_H */
diff --git a/src/usr/devtree/dt_doc_v0.2.txt b/src/usr/devtree/dt_doc_v0.2.txt
deleted file mode 100644
index 74167648b..000000000
--- a/src/usr/devtree/dt_doc_v0.2.txt
+++ /dev/null
@@ -1,512 +0,0 @@
-/*
- * Sapphire device-tree requirements
- *
- * Version: 0.2
- *
- * This documents the generated device-tree requirements, this is based on
- * a commented device-tree dump obtained from a DT generated by Sapphire
- * itself from an HDAT.
- */
-
-/*
- * General comments:
- *
- * - skiboot does not require nodes to have phandle properties, but
- * if you have them then *all* nodes must have them including the
- * root of the device-tree (currently a HB bug !). It is recommended
- * to have them since they are needed to represent the cache levels.
- *
- * NOTE: The example tree below only has phandle properties for
- * nodes that are referenced by other nodes. This is *not* correct
- * and is purely done for keeping this document smaller, make sure
- * to follow the rule above.
- *
- * - Only the "phandle" property is required. Sapphire also generates
- * a "linux,phandle" for backward compatibility but doesn't require
- * it as an input
- *
- * - Any property not specifically documented must be put in "as is"
- *
- * - All ibm,chip-id properties contain a HW chip ID which correspond
- * on P8 to the PIR value shifted right by 7 bits, ie. it's a 6-bit
- * value made of a 3-bit node number and a 3-bit chip number.
- *
- * - Unit addresses (@xxxx part of node names) should if possible use
- * lower case hexadecimal to be consistent with what skiboot does
- * and to help some stupid parsers out there...
- */
-
-/*
- * Version history
- *
- * 2013/10/08 : Version 0.1
- *
- * 2013/10/09 : Version 0.2
- *
- * - Add comment about case of unit addresses
- * - Add missing lpc node definition
- * - Add example UART node on LPC
- * - Remove "status" property from PSI xsco nodes
- */
-
-/dts-v1/;
-
-
-/*
- * Here are the reserve map entries. They should exactly match the
- * reserved-ranges property of the root node (see documentation
- * of that property)
- */
-
-/memreserve/ 0x00000007fe600000 0x0000000000100000;
-/memreserve/ 0x00000007fe200000 0x0000000000100000;
-/memreserve/ 0x0000000031e00000 0x00000000003e0000;
-/memreserve/ 0x0000000031000000 0x0000000000e00000;
-/memreserve/ 0x0000000030400000 0x0000000000c00000;
-/memreserve/ 0x0000000030000000 0x0000000000400000;
-/memreserve/ 0x0000000400000000 0x0000000000600450;
-
-/* Root node */
-/ {
- /*
- * "compatible" properties are string lists (ASCII strings separated by
- * \0 characters) indicating the overall compatibility from the more
- * specific to the least specific.
- *
- * The root node compatible property *must* contain "ibm,powernv" for
- * Linux to have the powernv platform match the machine. It is recommended
- * to add a slightly more precise property (first in order) indicating more
- * precisely the board type. We don't currently do that in HDAT based
- * setups but will.
- *
- * The standard naming is "vendor,name" so in your case, something like
- *
- * compatible = "vend,demo","ibm,powernv";
- *
- * would work. Or even better:
- *
- * compatible = "vend,demo-v1","vend,demo","ibm,powernv";
- */
- compatible = "ibm,powernv";
-
- /* mandatory */
- #address-cells = <0x2>;
- #size-cells = <0x2>;
-
- /* User visible board name (will be shown in /proc/cpuinfo) */
- model = "Machine Name";
-
- /*
- * The reserved-names and reserve-names properties work hand in hand. The first one
- * is a list of strings providing a "name" for each entry in the second one using
- * the traditional "vendor,name" format.
- *
- * The reserved-ranges property contains a list of ranges, each in the form of 2 cells
- * of address and 2 cells of size (64-bit x2 so each entry is 4 cells) indicating
- * regions of memory that are reserved and must not be overwritten by skiboot or
- * subsequently by the Linux Kernel.
- *
- * Corresponding entries must also be created in the "reserved map" part of the flat
- * device-tree (which is a binary list in the header of the fdt).
- *
- * Unless a component (skiboot or Linux) specifically knows about a region (usually
- * based on its name) and decides to change or remove it, all these regions are
- * passed as-is to Linux and to subsequent kernels accross kexec and are kept
- * preserved.
- *
- * NOTE: Do *NOT* copy the entries below, they are just an example and are actually
- * created by skiboot itself. They represent the SLW image as "detected" by reading
- * the PBA BARs and skiboot own memory allocations.
- *
- * I would recommend that you put in there the SLW and OCC (or HOMER as one block
- * if that's how you use it) and any additional memory you want to preserve such
- * as FW log buffers etc...
- */
-
- reserved-names = "ibm,slw-image", "ibm,slw-image", "ibm,firmware-stacks", "ibm,firmware-data", "ibm,firmware-heap", "ibm,firmware-code", "memory@400000000";
- reserved-ranges = <0x7 0xfe600000 0x0 0x100000 0x7 0xfe200000 0x0 0x100000 0x0 0x31e00000 0x0 0x3e0000 0x0 0x31000000 0x0 0xe00000 0x0 0x30400000 0x0 0xc00000 0x0 0x30000000 0x0 0x400000 0x4 0x0 0x0 0x600450>;
-
- /* Mandatory */
- cpus {
- #address-cells = <0x1>;
- #size-cells = <0x0>;
-
- /*
- * The following node must exist for each *core* in the system. The unit
- * address (number after the @) is the hexadecimal HW CPU number (PIR value)
- * of thread 0 of that core.
- */
- PowerPC,POWER8@20 {
- /* mandatory/standard properties */
- device_type = "cpu";
- 64-bit;
- 32-64-bridge;
- graphics;
- general-purpose;
-
- /*
- * The "status" property indicate whether the core is functional. It's
- * a string containing "okay" for a good core or "bad" for a non-functional
- * one. You can also just ommit the non-functional ones from the DT
- */
- status = "okay";
-
- /*
- * This is the same value as the PIR of thread 0 of that core
- * (ie same as the @xx part of the node name)
- */
- reg = <0x20>;
-
- /* same as above */
- ibm,pir = <0x20>;
-
- /* chip ID of this core */
- ibm,chip-id = <0x0>;
-
- /*
- * interrupt server numbers (aka HW processor numbers) of all threads
- * on that core. This should have 8 numbers and the first one should
- * have the same value as the above ibm,pir and reg properties
- */
- ibm,ppc-interrupt-server#s = <0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27>;
-
- /*
- * This is the "architected processor version" as defined in PAPR. Just
- * stick to 0x0f000004 for P8 and things will be fine
- */
- cpu-version = <0x0f000004>;
-
- /*
- * These are various definitions of the page sizes and segment sizes
- * supported by the MMU, those values are fine for P8 for now
- */
- ibm,processor-segment-sizes = <0x1c 0x28 0xffffffff 0xffffffff>;
- ibm,processor-page-sizes = <0xc 0x10 0x18 0x22>;
- ibm,segment-page-sizes = <0xc 0x0 0x3 0xc 0x0 0x10 0x7 0x18 0x38 0x10 0x110 0x2 0x10 0x1 0x18 0x8 0x18 0x100 0x1 0x18 0x0 0x22 0x120 0x1 0x22 0x3>;
-
- /*
- * Similarily that might need to be reviewed later but will do for now...
- */
- ibm,pa-features = <0x6 0x0 0xf6 0x3f 0xc7 0x0 0x80 0xc0>;
-
- /* SLB size, use as-is */
- ibm,slb-size = <0x20>;
-
- /* VSX support, use as-is */
- ibm,vmx = <0x2>;
-
- /* DFP support, use as-is */
- ibm,dfp = <0x2>;
-
- /* PURR/SPURR support, use as-is */
- ibm,purr = <0x1>;
- ibm,spurr = <0x1>;
-
- /*
- * Old-style core clock frequency. Only create this property if the frequency fits
- * in a 32-bit number. Do not create it if it doesn't
- */
- clock-frequency = <0xf5552d00>;
-
- /*
- * mandatory: 64-bit version of the core clock frequency, always create this
- * property.
- */
- ibm,extended-clock-frequency = <0x0 0xf5552d00>;
-
- /* Timebase freq has a fixed value, always use that */
- timebase-frequency = <0x1e848000>;
-
- /* Same */
- ibm,extended-timebase-frequency = <0x0 0x1e848000>;
-
- /* Use as-is, values might need to be adjusted but that will do for now */
- reservation-granule-size = <0x80>;
- d-tlb-size = <0x800>;
- i-tlb-size = <0x0>;
- tlb-size = <0x800>;
- d-tlb-sets = <0x4>;
- i-tlb-sets = <0x0>;
- tlb-sets = <0x4>;
- d-cache-block-size = <0x80>;
- i-cache-block-size = <0x80>;
- d-cache-size = <0x10000>;
- i-cache-size = <0x8000>;
- i-cache-sets = <0x4>;
- d-cache-sets = <0x8>;
- performance-monitor = <0x0 0x1>;
-
- /*
- * optional: phandle of the node representing the L2 cache for this core,
- * note: it can also be named "next-level-cache", Linux will support both
- * and Sapphire doesn't currently use those properties, just passes them
- * along to Linux
- */
- l2-cache = < 0x4 >;
- };
-
- /*
- * Cache nodes. Those are siblings of the processor nodes under /cpus and
- * represent the various level of caches.
- *
- * The unit address (and reg property) is mostly free-for-all as long as
- * there is no collisions. On HDAT machines we use the following encoding
- * which I encourage you to also follow to limit surprises:
- *
- * L2 : (0x20 << 24) | PIR (PIR is PIR value of thread 0 of core)
- * L3 : (0x30 << 24) | PIR
- * L3.5 : (0x35 << 24) | PIR
- *
- * In addition, each cache points to the next level cache via its
- * own "l2-cache" (or "next-level-cache") property, so the core node
- * points to the L2, the L2 points to the L3 etc...
- */
-
- l2-cache@20000020 {
- phandle = <0x4>;
- device_type = "cache";
- reg = <0x20000020>;
- status = "okay";
- cache-unified;
- d-cache-sets = <0x8>;
- i-cache-sets = <0x8>;
- d-cache-size = <0x80000>;
- i-cache-size = <0x80000>;
- l2-cache = <0x5>;
- };
-
- l3-cache@30000020 {
- phandle = <0x5>;
- device_type = "cache";
- reg = <0x30000020>;
- status = "bad";
- cache-unified;
- d-cache-sets = <0x8>;
- i-cache-sets = <0x8>;
- d-cache-size = <0x800000>;
- i-cache-size = <0x800000>;
- };
-
- };
-
- /*
- * Interrupt presentation controller (ICP) nodes
- *
- * There is some flexibility as to how many of these are presents since
- * a given node can represent multiple ICPs. When generating from HDAT we
- * chose to create one per core
- */
- interrupt-controller@3ffff80020000 {
- /* Mandatory */
- compatible = "IBM,ppc-xicp", "IBM,power8-icp";
- interrupt-controller;
- #address-cells = <0x0>;
- #interrupt-cells = <0x1>;
- device_type = "PowerPC-External-Interrupt-Presentation";
-
- /*
- * Range of HW CPU IDs represented by that node. In this example
- * the core starting at PIR 0x20 and 8 threads, which corresponds
- * to the CPU node of the example above. The property in theory
- * supports multiple ranges but Linux doesn't.
- */
- ibm,interrupt-server-ranges = <0x20 0x8>;
-
- /*
- * For each server in the above range, the physical address of the
- * ICP register block and its size. Since the root node #address-cells
- * and #size-cells properties are both "2", each entry is thus
- * 2 cells address and 2 cells size (64-bit each).
- */
- reg = <0x3ffff 0x80020000 0x0 0x1000 0x3ffff 0x80021000 0x0 0x1000 0x3ffff 0x80022000 0x0 0x1000 0x3ffff 0x80023000 0x0 0x1000 0x3ffff 0x80024000 0x0 0x1000 0x3ffff 0x80025000 0x0 0x1000 0x3ffff 0x80026000 0x0 0x1000 0x3ffff 0x80027000 0x0 0x1000>;
- };
-
- /*
- * The "memory" nodes represent physical memory in the system. They
- * do not represent DIMMs, memory controllers or Centaurs, thus will
- * be expressed separately.
- *
- * In order to be able to handle affinity propertly, we require that
- * a memory node is created for each range of memory that has a different
- * "affinity", which in practice means for each chip since we don't
- * support memory interleaved accross multiple chips on P8.
- *
- * Additionally, it is *not* required that one chip = one memory node,
- * it is perfectly acceptable to break down the memory of one chip into
- * multiple memory nodes (typically skiboot does that if the two MCs
- * are not interlaved).
- */
- memory@0 {
- device_type = "memory";
-
- /*
- * We support multiple entries in the ibm,chip-id property for
- * memory nodes in case the memory is interleaved accross multiple
- * chips but that shouldn't happen on P8
- */
- ibm,chip-id = <0x0>;
-
- /* The "reg" property is 4 cells, as usual for a child of
- * the root node, 2 cells of address and 2 cells of size
- */
- reg = <0x0 0x0 0x4 0x0>;
- };
-
- /*
- * The XSCOM node. This is the closest thing to a "chip" node we have.
- * there must be one per chip in the system (thus a DCM has two) and
- * while it represents the "parent" of various devices on the PIB/PCB
- * that we want to expose, it is also used to store all sort of
- * miscellaneous per-chip information on HDAT based systems (such
- * as VPDs).
- */
- xscom@3fc0000000000 {
- /* standard & mandatory */
- #address-cells = <0x1>;
- #size-cells = <0x1>;
- scom-controller;
- compatible = "ibm,xscom", "ibm,power8-xscom";
-
- /* The chip ID as usual ... */
- ibm,chip-id = <0x0>;
-
- /* The base address of xscom for that chip */
- reg = <0x3fc00 0x0 0x8 0x0>;
-
- /*
- * This comes from HDAT and I *think* is the raw content of the
- * module VPD eeprom (and thus doesn't have a standard ASCII keyword
- * VPD format). We don't currently use it though ...
- */
- ibm,module-vpd = < ... big pile of binary data ... >;
-
- /* PSI host bridge XSCOM register set */
- psihb@2010900 {
- reg = <0x2010900 0x20>;
- compatible = "ibm,power8-psihb-x", "ibm,psihb-x";
- };
-
- /* Chip TOD XSCOM register set */
- chiptod@40000 {
- reg = <0x40000 0x34>;
- compatible = "ibm,power-chiptod", "ibm,power8-chiptod";
-
- /*
- * Create that property with no value if this chip has
- * the Primary TOD in the topology. If it has the secondary
- * one (backup master ?) use "secondary".
- */
- primary;
- };
-
- /* NX XSCOM register set */
- nx@2010000 {
- reg = <0x2010000 0x4000>;
- compatible = "ibm,power-nx", "ibm,power8-nx";
- };
-
- /*
- * PCI "PE Master" XSCOM register set for each active PHB
- *
- * For now, do *not* create these if the PHB isn't connected,
- * clocked, or the PHY/HSS not configured.
- */
- pbcq@2012000 {
- reg = <0x2012000 0x20 0x9012000 0x5 0x9013c00 0x15>;
- compatible = "ibm,power8-pbcq";
-
- /* Indicate the PHB index on the chip, ie, 0,1 or 2 */
- ibm,phb-index = <0x0>;
-
- /* Create that property to use the IBM-style "A/B" dual input
- * slot presence detect mechanism.
- */
- ibm,use-ab-detect;
-
- /*
- * TBD: Lane equalization values. Not currently used by
- * skiboot but will have to be sorted out
- */
- ibm,lane_eq = <0x0>;
- };
-
- pbcq@2012400 {
- reg = <0x2012400 0x20 0x9012400 0x5 0x9013c40 0x15>;
- compatible = "ibm,power8-pbcq";
- ibm,phb-index = <0x1>;
- ibm,use-ab-detect;
- ibm,lane_eq = <0x0>;
- };
-
- /*
- * Here's the LPC bus. Ideally each chip has one but in
- * practice it's ok to only populate the ones actually
- * used for something. This is not an exact representation
- * of HW, in that case we would have eccb -> opb -> lpc,
- * but instead we just have an lpc node and the address is
- * the base of the ECCB register set for it
- *
- * Devices on the LPC are represented as children nodes,
- * see example below for a standard UART.
- */
- lpc@b0020 {
- /*
- * Empty property indicating this is the primary
- * LPC bus. It will be used for the default UART
- * if any and this is the bus that will be used
- * by Linux as the virtual 64k of IO ports
- */
- primary;
-
- /*
- * 2 cells of address, the first one indicates the
- * address type, see below
- */
- #address-cells = <0x2>;
- #size-cells = <0x1>;
- reg = <0xb0020 0x4>;
- compatible = "ibm,power8-lpc";
-
- /*
- * Example device: a UART on IO ports.
- *
- * LPC address have 2 cells. The first cell is the
- * address type as follow:
- *
- * 0 : LPC memory space
- * 1 : LPC IO space
- * 2: LPC FW space
- *
- * (This corresponds to the OPAL_LPC_* arguments
- * passed to the opal_lpc_read/write functions)
- *
- * The unit address follows the old ISA convention
- * for open firmware which prefixes IO ports with "i".
- *
- * (This is not critical and can be 1,3f8 if that's
- * problematic to generate)
- */
- serial@i3f8 {
- reg = <0x1 0x3f8 8>;
- compatible = "ns16550", "pnpPNP,501";
-
- /* Baud rate generator base frequency */
- clock-frequency = < 1843200 >;
-
- /* Default speed to use */
- current-speed = < 115200 >;
-
- /* Historical, helps Linux */
- device_type = "serial";
-
- /*
- * Indicate which chip ID the interrupt
- * is routed to (we assume it will always
- * be the "host error interrupt" (aka
- * "TPM interrupt" of that chip).
- */
- ibm,irq-chip-id = <0x0>;
- }
- };
- };
-};
diff --git a/src/usr/devtree/makefile b/src/usr/devtree/makefile
deleted file mode 100644
index 9532e1ae8..000000000
--- a/src/usr/devtree/makefile
+++ /dev/null
@@ -1,42 +0,0 @@
-# IBM_PROLOG_BEGIN_TAG
-# This is an automatically generated prolog.
-#
-# $Source: src/usr/devtree/makefile $
-#
-# OpenPOWER HostBoot Project
-#
-# Contributors Listed Below - COPYRIGHT 2013,2016
-# [+] International Business Machines Corp.
-#
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# permissions and limitations under the License.
-#
-# IBM_PROLOG_END_TAG
-
-#
-# The runtime module provides code to handle manipulating data
-# for the host. For example, verifying HDAT fields and writing
-# attribute data for HostServices.
-#
-
-ROOTPATH = ../../..
-MODULE = devtree
-
-## support for fapi
-EXTRAINCDIR += ${ROOTPATH}/src/include/usr/ecmddatabuffer
-
-
-OBJS += devtree.o
-OBJS += bld_devtree.o
-
-include ${ROOTPATH}/config.mk
diff --git a/src/usr/isteps/istep21/call_host_runtime_setup.C b/src/usr/isteps/istep21/call_host_runtime_setup.C
index 11a562b8b..540d4f680 100644
--- a/src/usr/isteps/istep21/call_host_runtime_setup.C
+++ b/src/usr/isteps/istep21/call_host_runtime_setup.C
@@ -34,7 +34,6 @@
#include <vfs/vfs.H>
#include <htmgt/htmgt.H>
#include <runtime/runtime.H>
-#include <devtree/devtreeif.H>
#include <runtime/customize_attrs_for_payload.H>
#include <targeting/common/util.H>
#include <vpd/vpd_if.H>
@@ -275,6 +274,7 @@ void* call_host_runtime_setup (void *io_pArgs)
if( TARGETING::is_sapphire_load()
&& (!INITSERVICE::spBaseServicesEnabled()) )
{
+ //@fixme-RTC:172836-broken for HDAT mode?
// Update the VPD switches for golden side boot
// Must do this before building the devtree
l_err = VPD::goldenSwitchUpdate();
diff --git a/src/usr/isteps/istep21/call_host_start_payload.C b/src/usr/isteps/istep21/call_host_start_payload.C
index 3dcdd83b0..45873f1b0 100644
--- a/src/usr/isteps/istep21/call_host_start_payload.C
+++ b/src/usr/isteps/istep21/call_host_start_payload.C
@@ -42,7 +42,6 @@
#include <kernel/console.H>
#include <util/misc.H>
#include <sys/mm.h>
-#include <devtree/devtreeif.H>
#include <kernel/ipc.H> // for internode data areas
#include <mbox/ipc_msg_types.H>
#include <devicefw/userif.H>
diff --git a/src/usr/makefile b/src/usr/makefile
index 64df5222e..17b0283b1 100644
--- a/src/usr/makefile
+++ b/src/usr/makefile
@@ -56,7 +56,6 @@ SUBDIRS += runtime.d
SUBDIRS += ibscom.d
SUBDIRS += dump.d
SUBDIRS += secureboot.d
-SUBDIRS += devtree.d
SUBDIRS += sbe.d
SUBDIRS += sbeio.d
SUBDIRS += gpio.d
diff --git a/src/usr/vpd/rtvpd_load.C b/src/usr/vpd/rtvpd_load.C
index 3695c8de0..af528692c 100644
--- a/src/usr/vpd/rtvpd_load.C
+++ b/src/usr/vpd/rtvpd_load.C
@@ -116,7 +116,7 @@ errlHndl_t VPD::vpd_load_rt_image(uint64_t & o_vpd_addr)
{
o_vpd_addr = TARGETING::get_top_mem_addr();
assert (o_vpd_addr != 0,
- "bld_devtree: Top of memory was 0!");
+ "vpd_load_rt_image: Top of memory was 0!");
o_vpd_addr -= VMM_RT_VPD_OFFSET;
@@ -124,7 +124,7 @@ errlHndl_t VPD::vpd_load_rt_image(uint64_t & o_vpd_addr)
VMM_RT_VPD_SIZE);
vpd_ptr = reinterpret_cast<uint8_t*>(vptr);
- assert(vptr != NULL,"bld_devtree: Could not map VPD memory");
+ assert(vptr != NULL,"vpd_load_rt_image: Could not map VPD memory");
}
err = bld_vpd_image(PNOR::DIMM_JEDEC_VPD,
diff --git a/src/usr/vpd/runtime/rt_vpd.C b/src/usr/vpd/runtime/rt_vpd.C
index e57d6d7d2..44ca261bf 100644
--- a/src/usr/vpd/runtime/rt_vpd.C
+++ b/src/usr/vpd/runtime/rt_vpd.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2013,2015 */
+/* Contributors Listed Below - COPYRIGHT 2013,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -64,8 +64,8 @@ struct rtVpdInit
// The VPD code that is common to IPL and runtime uses the
// pnorCacheValid switch. During a golden-side boot this switch
// gets cleared when the VPD cache is invalidated. At runtime
- // we may need to use the VPD cache (really the devtree data in
- // memory) so we copy the RT switch to the common switch.
+ // we may need to use the VPD cache in memory so we copy the RT
+ // switch to the common switch.
// Find all the targets with VPD switches
for (TARGETING::TargetIterator target =
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