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| author | Dan Crowell <dcrowell@us.ibm.com> | 2017-02-17 10:57:21 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-02-17 15:34:31 -0500 |
| commit | bb06eaf2fb81057a729f97ad4b91fb956542a29d (patch) | |
| tree | 5fa7a67f511c6a6355b5b2a2c9ddae0929376b3d | |
| parent | bb5b0d4f27a75272f74e10a78d36df322fe3c348 (diff) | |
| download | talos-hostboot-bb06eaf2fb81057a729f97ad4b91fb956542a29d.tar.gz talos-hostboot-bb06eaf2fb81057a729f97ad4b91fb956542a29d.zip | |
Dummy commit to remove broken file mirrors
Change-Id: I6b9fd341e605cbd3d4d58544f39305b677b05025
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36644
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
9 files changed, 0 insertions, 2750 deletions
diff --git a/src/import/chips/p9/procedures/hwp/ffdc/p9_pib2pcb_mux_seq.C b/src/import/chips/p9/procedures/hwp/ffdc/p9_pib2pcb_mux_seq.C deleted file mode 100644 index 77557a72f..000000000 --- a/src/import/chips/p9/procedures/hwp/ffdc/p9_pib2pcb_mux_seq.C +++ /dev/null @@ -1,170 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/import/chips/p9/procedures/hwp/ffdc/p9_pib2pcb_mux_seq.C $ */ -/* */ -/* OpenPOWER HostBoot Project */ -/* */ -/* Contributors Listed Below - COPYRIGHT 2016 */ -/* [+] International Business Machines Corp. */ -/* */ -/* */ -/* Licensed under the Apache License, Version 2.0 (the "License"); */ -/* you may not use this file except in compliance with the License. */ -/* You may obtain a copy of the License at */ -/* */ -/* http://www.apache.org/licenses/LICENSE-2.0 */ -/* */ -/* Unless required by applicable law or agreed to in writing, software */ -/* distributed under the License is distributed on an "AS IS" BASIS, */ -/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ -/* implied. See the License for the specific language governing */ -/* permissions and limitations under the License. */ -/* */ -/* IBM_PROLOG_END_TAG */ -//------------------------------------------------------------------------------ -/// @file p9_pib2pcb_mux_seq.C -/// -/// @brief Pib2pcb mux sequence -//------------------------------------------------------------------------------ -// *HWP HW Owner : Anusha Reddy Rangareddygari <anusrang@in.ibm.com> -// *HWP HW Backup Owner : <> -// *HWP FW Owner : <> -// *HWP Team : Perv -// *HWP Level : 2 -// *HWP Consumed by : SE:HB -//------------------------------------------------------------------------------ - - -//## auto_generated -#include <fapi2.H> -#include "p9_pib2pcb_mux_seq.H" - -#include <p9_perv_scom_addresses.H> -#include <p9_perv_scom_addresses_fld.H> - - -fapi2::ReturnCode p9_pib2pcb_mux_seq(const fapi2::ffdc_t& i_chip, - fapi2::ReturnCode& o_rc) -{ - fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> l_target_chip = - *(reinterpret_cast<const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> *>(i_chip.ptr())); - - fapi2::buffer<uint64_t>l_sl_clock_status; - fapi2::buffer<uint64_t>l_nsl_clock_status; - fapi2::buffer<uint64_t>l_ary_clock_status; - - fapi2::ffdc_t UNIT_FFDC_DATA_SL; - fapi2::ffdc_t UNIT_FFDC_DATA_NSL; - fapi2::ffdc_t UNIT_FFDC_DATA_ARY; - fapi2::ffdc_t UNIT_FFDC_DATA_SCAN_REGION; - fapi2::ffdc_t UNIT_FFDC_DATA_CLK_REGION; - fapi2::ffdc_t UNIT_FFDC_DATA_OPCG0; - fapi2::ffdc_t UNIT_FFDC_DATA_OPCG1; - fapi2::ffdc_t UNIT_FFDC_DATA_OPCG2; - - fapi2::buffer<uint32_t> l_data32_root_ctrl0; - fapi2::buffer<uint32_t> l_data32; - fapi2::buffer<uint64_t> l_read_reg; - FAPI_INF("p9_pib2pcb_mux_seq: Entering ..."); - - //Setting ROOT_CTRL0 register value - FAPI_TRY(fapi2::getCfamRegister(l_target_chip, PERV_ROOT_CTRL0_FSI, l_data32_root_ctrl0)); - l_data32_root_ctrl0.clearBit<PERV_ROOT_CTRL0_SET_VDD2VIO_LVL_FENCE_DC>(); //CFAM.ROOT_CTRL0.VDD2VIO_LVL_FENCE_DC = 0 - FAPI_TRY(fapi2::putCfamRegister(l_target_chip, PERV_ROOT_CTRL0_FSI, l_data32_root_ctrl0)); - - //Setting PERV_CTRL0 register value - FAPI_TRY(fapi2::getCfamRegister(l_target_chip, PERV_PERV_CTRL0_FSI, l_data32)); - l_data32.setBit<31>(); //CFAM.PERV_CTRL0.TP_PLLCHIPLET_FORCE_OUT_EN_DC = 1 - FAPI_TRY(fapi2::putCfamRegister(l_target_chip, PERV_PERV_CTRL0_FSI, l_data32)); - - //Setting ROOT_CTRL0 register value - //CFAM.ROOT_CTRL0.TPFSI_TP_FENCE_VTLIO_DC = 0 - l_data32_root_ctrl0.clearBit<PERV_ROOT_CTRL0_SET_TPFSI_TP_FENCE_VTLIO_DC>(); - FAPI_TRY(fapi2::putCfamRegister(l_target_chip, PERV_ROOT_CTRL0_FSI, l_data32_root_ctrl0)); - - //Setting ROOT_CTRL0 register value - l_data32_root_ctrl0.clearBit<PERV_ROOT_CTRL0_SET_FENCE0_DC>(); //CFAM.ROOT_CTRL0.FENCE0_DC = 0 - l_data32_root_ctrl0.clearBit<PERV_ROOT_CTRL0_SET_FENCE1_DC>(); //CFAM.ROOT_CTRL0.FENCE1_DC = 0 - l_data32_root_ctrl0.clearBit<PERV_ROOT_CTRL0_SET_FENCE2_DC>(); //CFAM.ROOT_CTRL0.FENCE2_DC = 0 - FAPI_TRY(fapi2::putCfamRegister(l_target_chip, PERV_ROOT_CTRL0_FSI, l_data32_root_ctrl0)); - - //Setting ROOT_CTRL0 register value - l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_SET_OOB_MUX>(); //CFAM.ROOT_CTRL0.OOB_MUX = 1 - FAPI_TRY(fapi2::putCfamRegister(l_target_chip, PERV_ROOT_CTRL0_FSI, l_data32_root_ctrl0)); - - //Setting ROOT_CTRL0 register value - l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_SET_PCB_RESET_DC>(); //CFAM.ROOT_CTRL0.PCB_RESET_DC = 1 - FAPI_TRY(fapi2::putCfamRegister(l_target_chip, PERV_ROOT_CTRL0_FSI, l_data32_root_ctrl0)); - - //Setting ROOT_CTRL0 register value - l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_SET_PIB2PCB_DC>(); //CFAM.ROOT_CTRL0.PIB2PCB_DC = 1 - FAPI_TRY(fapi2::putCfamRegister(l_target_chip, PERV_ROOT_CTRL0_FSI, l_data32_root_ctrl0)); - - //Setting ROOT_CTRL0 register value - l_data32_root_ctrl0.clearBit<PERV_ROOT_CTRL0_SET_PCB_RESET_DC>(); //CFAM.ROOT_CTRL0.PCB_RESET_DC = 0 - FAPI_TRY(fapi2::putCfamRegister(l_target_chip, PERV_ROOT_CTRL0_FSI, l_data32_root_ctrl0)); - - FAPI_INF("p9_pib2pcb_mux_seq: Check for Clocks running SL"); - //Getting CLOCK_STAT_SL register value - FAPI_TRY(fapi2::getScom(l_target_chip, PERV_TP_CLOCK_STAT_SL, - l_sl_clock_status)); //l_sl_clock_status = PERV.CLOCK_STAT_SL - - UNIT_FFDC_DATA_SL.ptr() = l_sl_clock_status.pointer(); - UNIT_FFDC_DATA_SL.size() = l_sl_clock_status.template getLength<uint64_t>(); - - //Getting CLOCK_STAT_NSL register value - FAPI_TRY(fapi2::getScom(l_target_chip, PERV_TP_CLOCK_STAT_NSL, - l_nsl_clock_status)); //l_nsl_clock_status = PERV.CLOCK_STAT_NSL - - UNIT_FFDC_DATA_NSL.ptr() = l_nsl_clock_status.pointer(); - UNIT_FFDC_DATA_NSL.size() = l_nsl_clock_status.template getLength<uint64_t>(); - - //Getting CLOCK_STAT_ARY register value - FAPI_TRY(fapi2::getScom(l_target_chip, PERV_TP_CLOCK_STAT_ARY, - l_ary_clock_status)); //l_ary_clock_status = PERV.CLOCK_STAT_ARY - - UNIT_FFDC_DATA_ARY.ptr() = l_ary_clock_status.pointer(); - UNIT_FFDC_DATA_ARY.size() = l_ary_clock_status.template getLength<uint64_t>(); - - FAPI_INF("p9_pib2pcb_mux_seq: SL Clock status register is %#018lX, %#018lX, %#018lX,", l_sl_clock_status, - l_nsl_clock_status, l_ary_clock_status); - - FAPI_TRY(fapi2::getScom(l_target_chip, PERV_TP_SCAN_REGION_TYPE, l_read_reg)); - - UNIT_FFDC_DATA_SCAN_REGION.ptr() = l_read_reg.pointer(); - UNIT_FFDC_DATA_SCAN_REGION.size() = l_read_reg.template getLength<uint64_t>(); - FAPI_INF("p9_pib2pcb_mux_seq: Scan region and type is %#018lX", l_read_reg); - - FAPI_TRY(fapi2::getScom(l_target_chip, PERV_TP_CLK_REGION, l_read_reg)); - - UNIT_FFDC_DATA_CLK_REGION.ptr() = l_read_reg.pointer(); - UNIT_FFDC_DATA_CLK_REGION.size() = l_read_reg.template getLength<uint64_t>(); - FAPI_INF("p9_pib2pcb_mux_seq: Clk region and type is %#018lX", l_read_reg); - - // Add FFDC specified by RC_RC_COLLECT_CC_STATUS_REGISTERS - FAPI_ADD_INFO_TO_HWP_ERROR(o_rc, RC_COLLECT_CC_STATUS_REGISTERS); - - FAPI_TRY(fapi2::getScom(l_target_chip, PERV_TP_OPCG_REG0, l_read_reg)); - - UNIT_FFDC_DATA_OPCG0.ptr() = l_read_reg.pointer(); - UNIT_FFDC_DATA_OPCG0.size() = l_read_reg.template getLength<uint64_t>(); - - FAPI_TRY(fapi2::getScom(l_target_chip, PERV_TP_OPCG_REG1, l_read_reg)); - - UNIT_FFDC_DATA_OPCG1.ptr() = l_read_reg.pointer(); - UNIT_FFDC_DATA_OPCG1.size() = l_read_reg.template getLength<uint64_t>(); - - FAPI_TRY(fapi2::getScom(l_target_chip, PERV_TP_OPCG_REG2, l_read_reg)); - - UNIT_FFDC_DATA_OPCG2.ptr() = l_read_reg.pointer(); - UNIT_FFDC_DATA_OPCG2.size() = l_read_reg.template getLength<uint64_t>(); - - // Add FFDC specified by RC_OPCG_REGISTERS - FAPI_ADD_INFO_TO_HWP_ERROR(o_rc, RC_OPCG_REGISTERS); - - FAPI_INF("p9_pib2pcb_mux_seq: Exiting ..."); -fapi_try_exit: - return fapi2::current_err; - -} diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_cxa_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_cxa_scom.C deleted file mode 100644 index 0dbd7ffa0..000000000 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_cxa_scom.C +++ /dev/null @@ -1,107 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/import/chips/p9/procedures/hwp/initfiles/p9_cxa_scom.C $ */ -/* */ -/* OpenPOWER HostBoot Project */ -/* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ -/* [+] International Business Machines Corp. */ -/* */ -/* */ -/* Licensed under the Apache License, Version 2.0 (the "License"); */ -/* you may not use this file except in compliance with the License. */ -/* You may obtain a copy of the License at */ -/* */ -/* http://www.apache.org/licenses/LICENSE-2.0 */ -/* */ -/* Unless required by applicable law or agreed to in writing, software */ -/* distributed under the License is distributed on an "AS IS" BASIS, */ -/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ -/* implied. See the License for the specific language governing */ -/* permissions and limitations under the License. */ -/* */ -/* IBM_PROLOG_END_TAG */ -#include "p9_cxa_scom.H" -#include <stdint.h> -#include <stddef.h> -#include <fapi2.H> - -using namespace fapi2; - -constexpr uint64_t literal_0x80031F98D8717 = 0x80031F98D8717; -constexpr uint64_t literal_0x0B1C000104060 = 0x0B1C000104060; -constexpr uint64_t literal_0x2B9C0001240E0 = 0x2B9C0001240E0; -constexpr uint64_t literal_0b0000 = 0b0000; -constexpr uint64_t literal_0b111 = 0b111; -constexpr uint64_t literal_0b0010 = 0b0010; -constexpr uint64_t literal_0b0001 = 0b0001; - -fapi2::ReturnCode p9_cxa_scom(const fapi2::Target<fapi2::TARGET_TYPE_CAPP>& TGT0, - const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>& TGT1) -{ - { - fapi2::ATTR_PROC_FABRIC_PUMP_MODE_Type l_TGT1_ATTR_PROC_FABRIC_PUMP_MODE; - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_PUMP_MODE, TGT1, l_TGT1_ATTR_PROC_FABRIC_PUMP_MODE)); - fapi2::buffer<uint64_t> l_scom_buffer; - { - FAPI_TRY(fapi2::getScom( TGT0, 0x2010803ull, l_scom_buffer )); - - l_scom_buffer.insert<0, 52, 0, uint64_t>(literal_0x80031F98D8717 ); - FAPI_TRY(fapi2::putScom(TGT0, 0x2010803ull, l_scom_buffer)); - } - { - FAPI_TRY(fapi2::getScom( TGT0, 0x2010806ull, l_scom_buffer )); - - l_scom_buffer.insert<0, 52, 12, uint64_t>(literal_0x0B1C000104060 ); - FAPI_TRY(fapi2::putScom(TGT0, 0x2010806ull, l_scom_buffer)); - } - { - FAPI_TRY(fapi2::getScom( TGT0, 0x2010807ull, l_scom_buffer )); - - l_scom_buffer.insert<0, 52, 12, uint64_t>(literal_0x2B9C0001240E0 ); - FAPI_TRY(fapi2::putScom(TGT0, 0x2010807ull, l_scom_buffer)); - } - { - FAPI_TRY(fapi2::getScom( TGT0, 0x2010818ull, l_scom_buffer )); - - constexpr auto l_CAPP0_CXA_TOP_CXA_APC0_APCCTL_ADR_BAR_MODE_OFF = 0x0; - l_scom_buffer.insert<1, 1, 63, uint64_t>(l_CAPP0_CXA_TOP_CXA_APC0_APCCTL_ADR_BAR_MODE_OFF ); - - if ((l_TGT1_ATTR_PROC_FABRIC_PUMP_MODE == fapi2::ENUM_ATTR_PROC_FABRIC_PUMP_MODE_CHIP_IS_GROUP)) - { - constexpr auto l_CAPP0_CXA_TOP_CXA_APC0_APCCTL_SKIP_G_ON = 0x1; - l_scom_buffer.insert<6, 1, 63, uint64_t>(l_CAPP0_CXA_TOP_CXA_APC0_APCCTL_SKIP_G_ON ); - } - else if ((l_TGT1_ATTR_PROC_FABRIC_PUMP_MODE == fapi2::ENUM_ATTR_PROC_FABRIC_PUMP_MODE_CHIP_IS_NODE)) - { - constexpr auto l_CAPP0_CXA_TOP_CXA_APC0_APCCTL_SKIP_G_OFF = 0x0; - l_scom_buffer.insert<6, 1, 63, uint64_t>(l_CAPP0_CXA_TOP_CXA_APC0_APCCTL_SKIP_G_OFF ); - } - - FAPI_TRY(fapi2::putScom(TGT0, 0x2010818ull, l_scom_buffer)); - } - { - FAPI_TRY(fapi2::getScom( TGT0, 0x2010819ull, l_scom_buffer )); - - l_scom_buffer.insert<4, 4, 60, uint64_t>(literal_0b0000 ); - FAPI_TRY(fapi2::putScom(TGT0, 0x2010819ull, l_scom_buffer)); - } - { - FAPI_TRY(fapi2::getScom( TGT0, 0x201081bull, l_scom_buffer )); - - l_scom_buffer.insert<45, 3, 61, uint64_t>(literal_0b111 ); - l_scom_buffer.insert<48, 4, 60, uint64_t>(literal_0b0010 ); - FAPI_TRY(fapi2::putScom(TGT0, 0x201081bull, l_scom_buffer)); - } - { - FAPI_TRY(fapi2::getScom( TGT0, 0x201081cull, l_scom_buffer )); - - l_scom_buffer.insert<18, 4, 60, uint64_t>(literal_0b0001 ); - FAPI_TRY(fapi2::putScom(TGT0, 0x201081cull, l_scom_buffer)); - } - - }; -fapi_try_exit: - return fapi2::current_err; -} diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_nx_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_nx_scom.C deleted file mode 100644 index 544904014..000000000 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_nx_scom.C +++ /dev/null @@ -1,451 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/import/chips/p9/procedures/hwp/initfiles/p9_nx_scom.C $ */ -/* */ -/* OpenPOWER HostBoot Project */ -/* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ -/* [+] International Business Machines Corp. */ -/* */ -/* */ -/* Licensed under the Apache License, Version 2.0 (the "License"); */ -/* you may not use this file except in compliance with the License. */ -/* You may obtain a copy of the License at */ -/* */ -/* http://www.apache.org/licenses/LICENSE-2.0 */ -/* */ -/* Unless required by applicable law or agreed to in writing, software */ -/* distributed under the License is distributed on an "AS IS" BASIS, */ -/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ -/* implied. See the License for the specific language governing */ -/* permissions and limitations under the License. */ -/* */ -/* IBM_PROLOG_END_TAG */ -#include "p9_nx_scom.H" -#include <stdint.h> -#include <stddef.h> -#include <fapi2.H> - -using namespace fapi2; - -constexpr uint64_t literal_0b0 = 0b0; -constexpr uint64_t literal_0b1 = 0b1; -constexpr uint64_t literal_0b11 = 0b11; -constexpr uint64_t literal_0b00 = 0b00; -constexpr uint64_t literal_1 = 1; -constexpr uint64_t literal_0xFC = 0xFC; -constexpr uint64_t literal_8 = 8; -constexpr uint64_t literal_2 = 2; -constexpr uint64_t literal_0b111111 = 0b111111; -constexpr uint64_t literal_0b11111111 = 0b11111111; -constexpr uint64_t literal_0b000000 = 0b000000; -constexpr uint64_t literal_0b00000000 = 0b00000000; - -fapi2::ReturnCode p9_nx_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& TGT0, - const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>& TGT1) -{ - { - fapi2::ATTR_EC_Type l_chip_ec; - fapi2::ATTR_NAME_Type l_chip_id; - FAPI_TRY(FAPI_ATTR_GET_PRIVILEGED(fapi2::ATTR_NAME, TGT0, l_chip_id)); - FAPI_TRY(FAPI_ATTR_GET_PRIVILEGED(fapi2::ATTR_EC, TGT0, l_chip_ec)); - fapi2::buffer<uint64_t> l_scom_buffer; - { - FAPI_TRY(fapi2::getScom( TGT0, 0x2011041ull, l_scom_buffer )); - - constexpr auto l_NX_DMA_CH0_EFT_ENABLE_ON = 0x1; - l_scom_buffer.insert<63, 1, 63, uint64_t>(l_NX_DMA_CH0_EFT_ENABLE_ON ); - constexpr auto l_NX_DMA_CH1_EFT_ENABLE_ON = 0x1; - l_scom_buffer.insert<62, 1, 63, uint64_t>(l_NX_DMA_CH1_EFT_ENABLE_ON ); - constexpr auto l_NX_DMA_CH2_SYM_ENABLE_ON = 0x1; - l_scom_buffer.insert<58, 1, 63, uint64_t>(l_NX_DMA_CH2_SYM_ENABLE_ON ); - constexpr auto l_NX_DMA_CH3_SYM_ENABLE_ON = 0x1; - l_scom_buffer.insert<57, 1, 63, uint64_t>(l_NX_DMA_CH3_SYM_ENABLE_ON ); - constexpr auto l_NX_DMA_CH4_GZIP_ENABLE_ON = 0x1; - l_scom_buffer.insert<61, 1, 63, uint64_t>(l_NX_DMA_CH4_GZIP_ENABLE_ON ); - FAPI_TRY(fapi2::putScom(TGT0, 0x2011041ull, l_scom_buffer)); - } - { - FAPI_TRY(fapi2::getScom( TGT0, 0x2011042ull, l_scom_buffer )); - - constexpr auto l_NX_DMA_EFTCOMP_MAX_INRD_MAX_13_INRD = 0xd; - l_scom_buffer.insert<33, 4, 60, uint64_t>(l_NX_DMA_EFTCOMP_MAX_INRD_MAX_13_INRD ); - constexpr auto l_NX_DMA_EFTDECOMP_MAX_INRD_MAX_7_INRD = 0x7; - l_scom_buffer.insert<37, 4, 60, uint64_t>(l_NX_DMA_EFTDECOMP_MAX_INRD_MAX_7_INRD ); - constexpr auto l_NX_DMA_GZIPCOMP_MAX_INRD_MAX_13_INRD = 0xd; - l_scom_buffer.insert<8, 4, 60, uint64_t>(l_NX_DMA_GZIPCOMP_MAX_INRD_MAX_13_INRD ); - constexpr auto l_NX_DMA_GZIPDECOMP_MAX_INRD_MAX_7_INRD = 0x7; - l_scom_buffer.insert<12, 4, 60, uint64_t>(l_NX_DMA_GZIPDECOMP_MAX_INRD_MAX_7_INRD ); - constexpr auto l_NX_DMA_SYM_MAX_INRD_MAX_3_INRD = 0x3; - l_scom_buffer.insert<25, 4, 60, uint64_t>(l_NX_DMA_SYM_MAX_INRD_MAX_3_INRD ); - constexpr auto l_NX_DMA_SYM_CPB_CHECK_DISABLE_ON = 0x1; - l_scom_buffer.insert<48, 1, 63, uint64_t>(l_NX_DMA_SYM_CPB_CHECK_DISABLE_ON ); - constexpr auto l_NX_DMA_EFT_COMP_PREFETCH_ENABLE_ON = 0x1; - l_scom_buffer.insert<23, 1, 63, uint64_t>(l_NX_DMA_EFT_COMP_PREFETCH_ENABLE_ON ); - constexpr auto l_NX_DMA_EFT_DECOMP_PREFETCH_ENABLE_ON = 0x1; - l_scom_buffer.insert<24, 1, 63, uint64_t>(l_NX_DMA_EFT_DECOMP_PREFETCH_ENABLE_ON ); - constexpr auto l_NX_DMA_GZIP_COMP_PREFETCH_ENABLE_ON = 0x1; - l_scom_buffer.insert<16, 1, 63, uint64_t>(l_NX_DMA_GZIP_COMP_PREFETCH_ENABLE_ON ); - constexpr auto l_NX_DMA_GZIP_DECOMP_PREFETCH_ENABLE_ON = 0x1; - l_scom_buffer.insert<17, 1, 63, uint64_t>(l_NX_DMA_GZIP_DECOMP_PREFETCH_ENABLE_ON ); - constexpr auto l_NX_DMA_EFT_SPBC_WRITE_ENABLE_OFF = 0x0; - l_scom_buffer.insert<56, 1, 63, uint64_t>(l_NX_DMA_EFT_SPBC_WRITE_ENABLE_OFF ); - FAPI_TRY(fapi2::putScom(TGT0, 0x2011042ull, l_scom_buffer)); - } - { - FAPI_TRY(fapi2::getScom( TGT0, 0x201105cull, l_scom_buffer )); - - constexpr auto l_NX_DMA_CH0_WATCHDOG_REF_DIV_DIVIDE_BY_4 = 0x2; - l_scom_buffer.insert<1, 4, 60, uint64_t>(l_NX_DMA_CH0_WATCHDOG_REF_DIV_DIVIDE_BY_4 ); - constexpr auto l_NX_DMA_CH0_WATCHDOG_TIMER_ENBL_ON = 0x1; - l_scom_buffer.insert<0, 1, 63, uint64_t>(l_NX_DMA_CH0_WATCHDOG_TIMER_ENBL_ON ); - constexpr auto l_NX_DMA_CH1_WATCHDOG_REF_DIV_DIVIDE_BY_4 = 0x2; - l_scom_buffer.insert<6, 4, 60, uint64_t>(l_NX_DMA_CH1_WATCHDOG_REF_DIV_DIVIDE_BY_4 ); - constexpr auto l_NX_DMA_CH1_WATCHDOG_TIMER_ENBL_ON = 0x1; - l_scom_buffer.insert<5, 1, 63, uint64_t>(l_NX_DMA_CH1_WATCHDOG_TIMER_ENBL_ON ); - constexpr auto l_NX_DMA_CH2_WATCHDOG_REF_DIV_DIVIDE_BY_4 = 0x2; - l_scom_buffer.insert<11, 4, 60, uint64_t>(l_NX_DMA_CH2_WATCHDOG_REF_DIV_DIVIDE_BY_4 ); - constexpr auto l_NX_DMA_CH2_WATCHDOG_TIMER_ENBL_ON = 0x1; - l_scom_buffer.insert<10, 1, 63, uint64_t>(l_NX_DMA_CH2_WATCHDOG_TIMER_ENBL_ON ); - constexpr auto l_NX_DMA_CH3_WATCHDOG_REF_DIV_DIVIDE_BY_4 = 0x2; - l_scom_buffer.insert<16, 4, 60, uint64_t>(l_NX_DMA_CH3_WATCHDOG_REF_DIV_DIVIDE_BY_4 ); - constexpr auto l_NX_DMA_CH3_WATCHDOG_TIMER_ENBL_ON = 0x1; - l_scom_buffer.insert<15, 1, 63, uint64_t>(l_NX_DMA_CH3_WATCHDOG_TIMER_ENBL_ON ); - constexpr auto l_NX_DMA_CH4_WATCHDOG_REF_DIV_DIVIDE_BY_4 = 0x2; - l_scom_buffer.insert<21, 4, 60, uint64_t>(l_NX_DMA_CH4_WATCHDOG_REF_DIV_DIVIDE_BY_4 ); - constexpr auto l_NX_DMA_CH4_WATCHDOG_TIMER_ENBL_ON = 0x1; - l_scom_buffer.insert<20, 1, 63, uint64_t>(l_NX_DMA_CH4_WATCHDOG_TIMER_ENBL_ON ); - constexpr auto l_NX_DMA_DMA_HANG_TIMER_ENBL_ON = 0x1; - l_scom_buffer.insert<25, 1, 63, uint64_t>(l_NX_DMA_DMA_HANG_TIMER_ENBL_ON ); - constexpr auto l_NX_DMA_DMA_HANG_TIMER_REF_DIV_DIVIDE_BY_32 = 0x3; - l_scom_buffer.insert<26, 4, 60, uint64_t>(l_NX_DMA_DMA_HANG_TIMER_REF_DIV_DIVIDE_BY_32 ); - FAPI_TRY(fapi2::putScom(TGT0, 0x201105cull, l_scom_buffer)); - } - { - FAPI_TRY(fapi2::getScom( TGT0, 0x2011083ull, l_scom_buffer )); - - l_scom_buffer.insert<0, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<10, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<11, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<12, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<13, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<14, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<15, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<16, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<17, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<18, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<19, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<1, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<20, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<21, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<22, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<23, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<24, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<25, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<26, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<27, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<28, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<29, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<2, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<30, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<31, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<32, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<33, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<34, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<35, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<36, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<37, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<38, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<39, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<3, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<40, 2, 62, uint64_t>(literal_0b11 ); - l_scom_buffer.insert<42, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<43, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<4, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<5, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<6, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<7, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<8, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<9, 1, 63, uint64_t>(literal_0b0 ); - FAPI_TRY(fapi2::putScom(TGT0, 0x2011083ull, l_scom_buffer)); - } - { - FAPI_TRY(fapi2::getScom( TGT0, 0x2011086ull, l_scom_buffer )); - - l_scom_buffer.insert<0, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<10, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<11, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<12, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<13, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<14, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<15, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<16, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<17, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<18, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<19, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<1, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<20, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<21, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<22, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<23, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<24, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<25, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<26, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<27, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<28, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<29, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<2, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<30, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<31, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<32, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<33, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<34, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<35, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<36, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<37, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<38, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<39, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<3, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<40, 2, 62, uint64_t>(literal_0b00 ); - l_scom_buffer.insert<42, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<43, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<4, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<5, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<6, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<7, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<8, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<9, 1, 63, uint64_t>(literal_0b0 ); - FAPI_TRY(fapi2::putScom(TGT0, 0x2011086ull, l_scom_buffer)); - } - { - FAPI_TRY(fapi2::getScom( TGT0, 0x2011087ull, l_scom_buffer )); - - l_scom_buffer.insert<0, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<10, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<11, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<12, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<13, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<14, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<15, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<16, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<17, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<18, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<19, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<1, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<20, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<21, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<22, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<23, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<24, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<25, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<26, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<27, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<28, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<29, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<2, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<30, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<31, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<32, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<33, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<34, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<35, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<36, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<37, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<38, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<39, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<3, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<40, 2, 62, uint64_t>(literal_0b00 ); - l_scom_buffer.insert<42, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<43, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<4, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<5, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<6, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<7, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<8, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<9, 1, 63, uint64_t>(literal_0b0 ); - FAPI_TRY(fapi2::putScom(TGT0, 0x2011087ull, l_scom_buffer)); - } - { - FAPI_TRY(fapi2::getScom( TGT0, 0x2011095ull, l_scom_buffer )); - - constexpr auto l_NX_PBI_CQ_WRAP_NXCQ_SCOM_RD_GO_M_QOS_ON = 0x1; - l_scom_buffer.insert<22, 1, 63, uint64_t>(l_NX_PBI_CQ_WRAP_NXCQ_SCOM_RD_GO_M_QOS_ON ); - constexpr auto l_NX_PBI_CQ_WRAP_NXCQ_SCOM_ADDR_BAR_MODE_OFF = 0x0; - l_scom_buffer.insert<23, 1, 63, uint64_t>(l_NX_PBI_CQ_WRAP_NXCQ_SCOM_ADDR_BAR_MODE_OFF ); - l_scom_buffer.insert<25, 2, 62, uint64_t>(literal_1 ); - l_scom_buffer.insert<40, 8, 56, uint64_t>(literal_0xFC ); - l_scom_buffer.insert<48, 8, 56, uint64_t>(literal_0xFC ); - FAPI_TRY(fapi2::putScom(TGT0, 0x2011095ull, l_scom_buffer)); - } - { - FAPI_TRY(fapi2::getScom( TGT0, 0x20110a8ull, l_scom_buffer )); - - l_scom_buffer.insert<8, 4, 60, uint64_t>(literal_8 ); - l_scom_buffer.insert<4, 4, 60, uint64_t>(literal_8 ); - l_scom_buffer.insert<12, 4, 60, uint64_t>(literal_8 ); - l_scom_buffer.insert<16, 4, 60, uint64_t>(literal_8 ); - FAPI_TRY(fapi2::putScom(TGT0, 0x20110a8ull, l_scom_buffer)); - } - { - FAPI_TRY(fapi2::getScom( TGT0, 0x20110c3ull, l_scom_buffer )); - - l_scom_buffer.insert<27, 9, 55, uint64_t>(literal_8 ); - FAPI_TRY(fapi2::putScom(TGT0, 0x20110c3ull, l_scom_buffer)); - } - { - FAPI_TRY(fapi2::getScom( TGT0, 0x20110c4ull, l_scom_buffer )); - - l_scom_buffer.insert<27, 9, 55, uint64_t>(literal_8 ); - FAPI_TRY(fapi2::putScom(TGT0, 0x20110c4ull, l_scom_buffer)); - } - { - FAPI_TRY(fapi2::getScom( TGT0, 0x20110c5ull, l_scom_buffer )); - - l_scom_buffer.insert<27, 9, 55, uint64_t>(literal_8 ); - FAPI_TRY(fapi2::putScom(TGT0, 0x20110c5ull, l_scom_buffer)); - } - { - FAPI_TRY(fapi2::getScom( TGT0, 0x20110d5ull, l_scom_buffer )); - - constexpr auto l_NX_PBI_PBI_UMAC_CRB_READS_ENBL_ON = 0x1; - l_scom_buffer.insert<1, 1, 63, uint64_t>(l_NX_PBI_PBI_UMAC_CRB_READS_ENBL_ON ); - FAPI_TRY(fapi2::putScom(TGT0, 0x20110d5ull, l_scom_buffer)); - } - { - FAPI_TRY(fapi2::getScom( TGT0, 0x20110d6ull, l_scom_buffer )); - - l_scom_buffer.insert<9, 3, 61, uint64_t>(literal_2 ); - FAPI_TRY(fapi2::putScom(TGT0, 0x20110d6ull, l_scom_buffer)); - } - { - FAPI_TRY(fapi2::getScom( TGT0, 0x2011103ull, l_scom_buffer )); - - l_scom_buffer.insert<0, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<10, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<11, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<12, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<13, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<14, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<15, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<16, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<17, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<18, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<19, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<1, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<20, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<21, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<22, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<23, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<24, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<25, 6, 58, uint64_t>(literal_0b111111 ); - l_scom_buffer.insert<2, 2, 62, uint64_t>(literal_0b11 ); - l_scom_buffer.insert<31, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<32, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<33, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<34, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<35, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<36, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<37, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<38, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<39, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<40, 8, 56, uint64_t>(literal_0b11111111 ); - l_scom_buffer.insert<48, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<49, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<4, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<5, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<6, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<7, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<8, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<9, 1, 63, uint64_t>(literal_0b0 ); - FAPI_TRY(fapi2::putScom(TGT0, 0x2011103ull, l_scom_buffer)); - } - { - FAPI_TRY(fapi2::getScom( TGT0, 0x2011106ull, l_scom_buffer )); - - l_scom_buffer.insert<0, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<10, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<11, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<12, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<13, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<14, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<15, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<16, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<17, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<18, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<19, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<1, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<20, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<21, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<22, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<23, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<24, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<25, 6, 58, uint64_t>(literal_0b000000 ); - l_scom_buffer.insert<2, 2, 62, uint64_t>(literal_0b00 ); - l_scom_buffer.insert<31, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<32, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<33, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<34, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<35, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<36, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<37, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<38, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<39, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<40, 8, 56, uint64_t>(literal_0b00000000 ); - l_scom_buffer.insert<48, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<49, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<4, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<5, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<6, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<7, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<8, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<9, 1, 63, uint64_t>(literal_0b0 ); - FAPI_TRY(fapi2::putScom(TGT0, 0x2011106ull, l_scom_buffer)); - } - { - FAPI_TRY(fapi2::getScom( TGT0, 0x2011107ull, l_scom_buffer )); - - l_scom_buffer.insert<0, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<10, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<11, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<12, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<13, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<14, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<15, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<16, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<17, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<18, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<19, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<1, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<20, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<21, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<22, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<23, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<24, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<25, 6, 58, uint64_t>(literal_0b000000 ); - l_scom_buffer.insert<2, 2, 62, uint64_t>(literal_0b00 ); - l_scom_buffer.insert<31, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<32, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<33, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<34, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<35, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<36, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<37, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<38, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<39, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<40, 8, 56, uint64_t>(literal_0b00000000 ); - l_scom_buffer.insert<48, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<49, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<4, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<5, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<6, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<7, 1, 63, uint64_t>(literal_0b1 ); - l_scom_buffer.insert<8, 1, 63, uint64_t>(literal_0b0 ); - l_scom_buffer.insert<9, 1, 63, uint64_t>(literal_0b1 ); - FAPI_TRY(fapi2::putScom(TGT0, 0x2011107ull, l_scom_buffer)); - } - - }; -fapi_try_exit: - return fapi2::current_err; -} diff --git a/src/import/chips/p9/procedures/hwp/io/p9_io_obus_dccal.C b/src/import/chips/p9/procedures/hwp/io/p9_io_obus_dccal.C deleted file mode 100644 index 3291dd1c3..000000000 --- a/src/import/chips/p9/procedures/hwp/io/p9_io_obus_dccal.C +++ /dev/null @@ -1,584 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/import/chips/p9/procedures/hwp/io/p9_io_obus_dccal.C $ */ -/* */ -/* OpenPOWER HostBoot Project */ -/* */ -/* Contributors Listed Below - COPYRIGHT 2015,2017 */ -/* [+] International Business Machines Corp. */ -/* */ -/* */ -/* Licensed under the Apache License, Version 2.0 (the "License"); */ -/* you may not use this file except in compliance with the License. */ -/* You may obtain a copy of the License at */ -/* */ -/* http://www.apache.org/licenses/LICENSE-2.0 */ -/* */ -/* Unless required by applicable law or agreed to in writing, software */ -/* distributed under the License is distributed on an "AS IS" BASIS, */ -/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ -/* implied. See the License for the specific language governing */ -/* permissions and limitations under the License. */ -/* */ -/* IBM_PROLOG_END_TAG */ -/// -/// @file p9_io_obus_dccal.C -/// @brief Train the Link. -///----------------------------------------------------------------------------- -/// *HWP HWP Owner : Chris Steffen <cwsteffen@us.ibm.com> -/// *HWP HWP Backup Owner : Gary Peterson <garyp@us.ibm.com> -/// *HWP FW Owner : Jamie Knight <rjknight@us.ibm.com> -/// *HWP Team : IO -/// *HWP Level : 3 -/// *HWP Consumed by : FSP:HB -///----------------------------------------------------------------------------- -/// -/// @verbatim -/// High-level procedure flow: -/// -/// Run Dccal -/// -/// Procedure Prereq: -/// - System clocks are running. -/// - Scominit Procedure is completed. -/// -/// @endverbatim -///---------------------------------------------------------------------------- - -//----------------------------------------------------------------------------- -// Includes -//----------------------------------------------------------------------------- -#include <p9_io_obus_dccal.H> -#include <p9_io_scom.H> -#include <p9_io_regs.H> - -//----------------------------------------------------------------------------- -// Function Declarations -//----------------------------------------------------------------------------- - -//----------------------------------------------------------------------------- -// Function Definitions -//----------------------------------------------------------------------------- - -/** - * @brief Converts a decimal value to a thermometer code - * @param[in] i_dec Decimal Value - * @retval Thermometer Value - */ -uint32_t toTherm( const uint32_t i_dec ) -{ - return ( ( 0x1 << i_dec ) - 1 ); -} - -/** - * @brief Converts a decimal value to a thermometer code with a MSB 1/2 strength bit - * @param[in] i_dec Decimal Value - * @param[in] i_width Width of Register - * @retval Thermometer Value - */ -uint32_t toThermWithHalf( const uint32_t i_dec, const uint8_t i_width ) -{ - // If the LSB of the 2r equivalent is on, then we need to set the 2r bit (MSB) - uint32_t halfOn = ( i_dec & 0x1 ) << ( i_width - 1 ); - - // Shift the 2r equivalent to a 1r value and convert to a thermometer code. - uint32_t x1Equivalent ( ( 0x1 << ( i_dec >> 0x1 ) ) - 1 ); - - // combine 1r equivalent thermometer code + the 2r MSB value. - return halfOn | x1Equivalent ; -} - -/** - * @brief Tx Z Impedance Calibration Get Results - * @param[in] io_pvalx4 Tx Zcal P-value X4 - * @param[in] io_nvalx4 Tx Zcal N-value X4 - * @retval ReturnCode - */ -fapi2::ReturnCode tx_zcal_verify_results( uint32_t& io_pvalx4, uint32_t& io_nvalx4 ) -{ - // l_zcal_p and l_zcal_n are 9 bit registers - // These are also 4x of a 1R segment - const uint32_t X4_MIN = 16 * 4; // 16 segments * 4 = 64 (0x40) - const uint32_t X4_MAX = 33 * 4; // 33 segments * 4 = 132(0x84) - FAPI_IMP( "tx_zcal_verify_results: I/O Obus Entering" ); - - FAPI_DBG( "Min/Max Allowed(0x%X,0x%X) Read Pval/Nval(0x%X,0x%X)", - X4_MIN, X4_MAX, io_pvalx4, io_nvalx4 ); - - if( io_pvalx4 > X4_MAX ) - { - io_pvalx4 = X4_MAX; - FAPI_ERR( "Tx Zcal Pval(0x%X) > Max Allowed(0x%X)", io_pvalx4, X4_MAX ); - } - - if( io_nvalx4 > X4_MAX ) - { - io_nvalx4 = X4_MAX; - FAPI_ERR( "Tx Zcal Nval(0x%X) > Max Allowed(0x%X)", io_nvalx4, X4_MAX ); - } - - if( io_pvalx4 < X4_MIN ) - { - io_pvalx4 = X4_MIN; - FAPI_ERR( "Tx Zcal Pval(0x%X) < Min Allowed(0x%X)", io_pvalx4, X4_MIN ); - } - - if( io_nvalx4 < X4_MIN ) - { - io_nvalx4 = X4_MIN; - FAPI_ERR( "Tx Zcal Nval(0x%X) < Min Allowed(0x%X)", io_nvalx4, X4_MIN ); - } - - FAPI_IMP( "tx_zcal_verify_results: I/O Obus Exiting" ); - return fapi2::current_err; -} - -/** - * @brief Tx Z Impedance Calibration State Machine - * @param[in] i_tgt FAPI2 Target - * @retval ReturnCode - */ -fapi2::ReturnCode tx_run_zcal( const OBUS_TGT i_tgt ) -{ - const uint64_t DLY_20MS = 20000000; - const uint64_t DLY_10US = 10000; - const uint64_t DLY_10MIL_CYCLES = 10000000; - const uint64_t DLY_1MIL_CYCLES = 1000000; - const uint32_t TIMEOUT = 200; - const uint8_t GRP0 = 0; - const uint8_t LN0 = 0; - uint32_t l_count = 0; - uint64_t l_data = 0; - uint8_t l_is_sim = 0; - - FAPI_IMP( "tx_run_zcal: I/O Obus Entering" ); - - /////////////////////////////////////////////////////////////////////////// - /// Simulation Speed Up - /////////////////////////////////////////////////////////////////////////// - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_IS_SIMULATION, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), l_is_sim) ); - - if( l_is_sim ) - { - // To speed up simulation, xbus_unit model + pie driver - // without these settings: 50 million cycles - // with these settings: 13 million cycles - io::set( OPT_TX_ZCAL_SM_MIN_VAL, 50, l_data ); - io::set( OPT_TX_ZCAL_SM_MAX_VAL, 52, l_data ); - FAPI_TRY( io::write( OPT_TX_IMPCAL_SWO2_PB, i_tgt, GRP0, LN0, l_data ) ); - } - - // Request to start Tx Impedance Calibration - // The Done bit is read only pulse, must use pie driver or system model in sim - FAPI_TRY( io::rmw( OPT_TX_ZCAL_REQ, i_tgt, GRP0, LN0, 1 ) ); - - // Delay before we start polling. 20ms was use from past p8 learning - FAPI_TRY( fapi2::delay( DLY_20MS, DLY_10MIL_CYCLES ) ); - - // Poll Until Tx Impedance Calibration is done or errors out - FAPI_TRY( io::read( OPT_TX_IMPCAL_PB, i_tgt, GRP0, LN0, l_data ) ); - - while( ( ++l_count < TIMEOUT ) && - !( io::get( OPT_TX_ZCAL_DONE, l_data ) || io::get( EDIP_TX_ZCAL_ERROR, l_data ) ) ) - { - FAPI_DBG( "tx_run_zcal: I/O Obus Tx Zcal Poll, Count(%d/%d).", l_count, TIMEOUT ); - - // Delay for 10us between polls for a total of 22ms. - FAPI_TRY( fapi2::delay( DLY_10US, DLY_1MIL_CYCLES ) ); - - FAPI_TRY( io::read( OPT_TX_IMPCAL_PB, i_tgt, GRP0, LN0, l_data ) ); - } - - - if( io::get( OPT_TX_ZCAL_DONE, l_data ) == 1 ) - { - FAPI_DBG( "tx_run_zcal: I/O Obus Tx Zcal Poll Completed(%d/%d).", l_count, TIMEOUT ); - } - else if( io::get( OPT_TX_ZCAL_ERROR, l_data ) == 1 ) - { - FAPI_ERR( "tx_run_zcal: WARNING: Tx Z Calibration Error" ); - } - else - { - FAPI_ERR( "tx_run_zcal: WARNING: Tx Z Calibration Timeout: Loops(%d)", l_count ); - } - -fapi_try_exit: - FAPI_IMP( "tx_run_zcal: I/O Obus Exiting" ); - return fapi2::current_err; -} - -/** - * @brief Tx Z Impedance Calibration Apply Segments. The results of the Tx Impedance - * calibration are applied with accounting for margining ,FFE Precursor, and FFE Postcursor. - * @param[in] i_tgt FAPI2 Target - * @param[in] i_pvalx4 Tx Zcal P-value X4 - * @param[in] i_nvalx4 Tx Zcal N-value X4 - * @retval ReturnCode - */ -fapi2::ReturnCode tx_zcal_apply( const OBUS_TGT i_tgt, const uint32_t i_pvalx4, const uint32_t i_nvalx4 ) -{ - FAPI_IMP( "tx_zcal_apply: I/O EDI+ Xbus Entering" ); - const uint8_t GRP0 = 0; - const uint8_t LN0 = 0; - const uint8_t PRE_WIDTH = 5; - const uint8_t POST_WIDTH = 7; - const uint8_t MAIN_WIDTH = 7; - const uint32_t PRECURSOR_X2_MAX = ( 4 * 2 ) + ( 1 ); // 18 - const uint32_t POSTCURSOR_X2_MAX = ( 6 * 2 ) + ( 1 ); // 26 - const uint32_t MARGIN_X2_MAX = ( 8 * 2 ) + ( 0 ); // 32 - const uint32_t MAIN_X2_MAX = ( 6 * 2 ) + ( 1 ); // 26 - const uint32_t TOTAL_X2_MAX = PRECURSOR_X2_MAX + - POSTCURSOR_X2_MAX + - ( MARGIN_X2_MAX * 2 ) + - MAIN_X2_MAX; - - uint8_t margin_ratio = 0; - uint8_t ffe_pre_coef = 0; - uint8_t ffe_post_coef = 0; - uint32_t margin_sel = 0; - uint32_t p_pre_sel_x2 = 0; - uint32_t n_pre_sel_x2 = 0; - uint32_t p_post_sel_x2 = 0; - uint32_t n_post_sel_x2 = 0; - uint32_t margin_pu_sel_x2 = 0; - uint32_t margin_pd_sel_x2 = 0; - - uint32_t pvalx2 = i_pvalx4 / 2; - uint32_t nvalx2 = i_nvalx4 / 2; - - uint32_t p_pre_en_x2 = PRECURSOR_X2_MAX; - uint32_t p_post_en_x2 = POSTCURSOR_X2_MAX; - uint32_t p_margin_pu_en_x2 = MARGIN_X2_MAX; - uint32_t p_margin_pd_en_x2 = MARGIN_X2_MAX; - uint32_t p_main_en_x2 = MAIN_X2_MAX; - int pvalx2_int = (int)pvalx2 - (int)TOTAL_X2_MAX; - - uint32_t n_pre_en_x2 = PRECURSOR_X2_MAX; - uint32_t n_post_en_x2 = POSTCURSOR_X2_MAX; - uint32_t n_margin_pu_en_x2 = MARGIN_X2_MAX; - uint32_t n_margin_pd_en_x2 = MARGIN_X2_MAX; - uint32_t n_main_en_x2 = MAIN_X2_MAX; - int nvalx2_int = (int)nvalx2 - (int)TOTAL_X2_MAX; - - // During normal operation we will not use margining :: min(0, 0%) max(0.5, 50%) - FAPI_TRY( FAPI_ATTR_GET( fapi2::ATTR_IO_OBUS_TX_MARGIN_RATIO, i_tgt, margin_ratio ) ); - - // FFE Precursor Tap Weight :: min(0.0, 0%) max(0.115, 11.5%) - FAPI_TRY( FAPI_ATTR_GET( fapi2::ATTR_IO_OBUS_TX_FFE_PRECURSOR, i_tgt, ffe_pre_coef ) ); - - // FFE Postcursor Tap Weight :: min(0.0, 0%) max(0.2578, 25.8%) - FAPI_TRY( FAPI_ATTR_GET( fapi2::ATTR_IO_OBUS_TX_FFE_POSTCURSOR, i_tgt, ffe_post_coef ) ); - - - // We use the X2 here, since the LSB bit is a 1/2 - p_pre_sel_x2 = ( pvalx2 * ffe_pre_coef ) / 128; - n_pre_sel_x2 = ( nvalx2 * ffe_pre_coef ) / 128; - - // We use the X2 here, since the LSB bit is a 1/2 - p_post_sel_x2 = ( pvalx2 * ffe_post_coef ) / 128; - n_post_sel_x2 = ( nvalx2 * ffe_post_coef ) / 128; - - margin_pu_sel_x2 = ( pvalx2 * margin_ratio ) / ( 128 * 2 ); - margin_pd_sel_x2 = ( nvalx2 * margin_ratio ) / ( 128 * 2 ); - - // Work on Pvalue - if( pvalx2_int % 2 ) // Check if we need to add a half segment (2R) - { - --p_main_en_x2; - ++pvalx2_int; - } - - while( pvalx2_int < 0 ) - { - if( p_main_en_x2 > 1 ) - { - p_main_en_x2 -= 2; - } - else if( ( p_margin_pu_en_x2 + p_margin_pd_en_x2 ) > 0 ) - { - if( p_margin_pu_en_x2 == p_margin_pd_en_x2 ) - { - p_margin_pd_en_x2 -= 2; - } - } - - pvalx2_int += 2; // Add a full segment - } - - // Work on Nvalue - if( nvalx2_int % 2 ) // Check if we need to add a half segment (2R) - { - --n_main_en_x2; - ++nvalx2_int; - } - - while( nvalx2_int < 0 ) - { - if( n_main_en_x2 > 1 ) - { - n_main_en_x2 -= 2; - } - else if( ( n_margin_pu_en_x2 + n_margin_pd_en_x2 ) > 0 ) - { - if( n_margin_pu_en_x2 == n_margin_pd_en_x2 ) - { - n_margin_pd_en_x2 -= 2; - } - else - { - n_margin_pu_en_x2 -= 2; - } - } - - nvalx2_int += 2; // Add a full segment - } - - margin_sel = - toTherm( ( margin_pu_sel_x2 + 1 ) / 2 ) & toTherm( ( margin_pd_sel_x2 + 1 ) / 2 ) & - toTherm( ( p_margin_pu_en_x2 + 1 ) / 2 ) & toTherm( ( n_margin_pu_en_x2 + 1 ) / 2 ) & - toTherm( ( p_margin_pd_en_x2 + 1 ) / 2 ) & toTherm( ( n_margin_pd_en_x2 + 1 ) / 2 ); - - - // Setting Pre Cursor Values - FAPI_TRY( io::rmw( OPT_TX_PSEG_PRE_EN , i_tgt, GRP0, LN0, toThermWithHalf( p_pre_en_x2 , PRE_WIDTH ) ) ); - FAPI_TRY( io::rmw( OPT_TX_PSEG_PRE_SEL, i_tgt, GRP0, LN0, toThermWithHalf( p_pre_sel_x2, PRE_WIDTH ) ) ); - FAPI_TRY( io::rmw( OPT_TX_NSEG_PRE_EN , i_tgt, GRP0, LN0, toThermWithHalf( n_pre_en_x2 , PRE_WIDTH ) ) ); - FAPI_TRY( io::rmw( OPT_TX_NSEG_PRE_SEL, i_tgt, GRP0, LN0, toThermWithHalf( n_pre_sel_x2, PRE_WIDTH ) ) ); - FAPI_TRY( io::rmw( OPT_TX_PSEG_POST_EN , i_tgt, GRP0, LN0, toThermWithHalf( p_post_en_x2 , POST_WIDTH ) ) ); - FAPI_TRY( io::rmw( OPT_TX_PSEG_POST_SEL, i_tgt, GRP0, LN0, toThermWithHalf( p_post_sel_x2, POST_WIDTH ) ) ); - FAPI_TRY( io::rmw( OPT_TX_NSEG_POST_EN , i_tgt, GRP0, LN0, toThermWithHalf( n_post_en_x2 , POST_WIDTH ) ) ); - FAPI_TRY( io::rmw( OPT_TX_NSEG_POST_SEL, i_tgt, GRP0, LN0, toThermWithHalf( n_post_sel_x2, POST_WIDTH ) ) ); - - // Setting Post Cursor Values - FAPI_TRY( io::rmw( OPT_TX_PSEG_MARGINPD_EN, i_tgt, GRP0, LN0, toTherm( ( p_margin_pd_en_x2 + 1 ) / 2 ) ) ); - FAPI_TRY( io::rmw( OPT_TX_PSEG_MARGINPU_EN, i_tgt, GRP0, LN0, toTherm( ( p_margin_pu_en_x2 + 1 ) / 2 ) ) ); - FAPI_TRY( io::rmw( OPT_TX_NSEG_MARGINPD_EN, i_tgt, GRP0, LN0, toTherm( ( n_margin_pd_en_x2 + 1 ) / 2 ) ) ); - FAPI_TRY( io::rmw( OPT_TX_NSEG_MARGINPU_EN, i_tgt, GRP0, LN0, toTherm( ( n_margin_pu_en_x2 + 1 ) / 2 ) ) ); - FAPI_TRY( io::rmw( OPT_TX_MARGINPD_SEL, i_tgt, GRP0, LN0, toTherm( ( margin_sel + 1 ) / 2 ) ) ); - FAPI_TRY( io::rmw( OPT_TX_MARGINPU_SEL, i_tgt, GRP0, LN0, toTherm( ( margin_sel + 1 ) / 2 ) ) ); - - // Setting Main Values - FAPI_TRY( io::rmw( OPT_TX_PSEG_MAIN_EN, i_tgt, GRP0, LN0, toThermWithHalf( p_main_en_x2, MAIN_WIDTH ) ) ); - FAPI_TRY( io::rmw( OPT_TX_NSEG_MAIN_EN, i_tgt, GRP0, LN0, toThermWithHalf( n_main_en_x2, MAIN_WIDTH ) ) ); - -fapi_try_exit: - FAPI_IMP( "tx_zcal_apply: I/O Obus Exiting" ); - return fapi2::current_err; -} - -/** - * @brief Tx Z Impedance Calibration - * @param[in] i_tgt FAPI2 Target - * @retval ReturnCode - */ -fapi2::ReturnCode tx_set_zcal_ffe( const OBUS_TGT i_tgt ) -{ - FAPI_IMP( "tx_set_zcal_ffe: I/O Obus Entering" ); - - const uint8_t GRP0 = 0; - const uint8_t LN0 = 0; - const uint32_t DEFAULT_SEGMENTS = 25 * 4; // Nominal 25 Segments 1R * 4 = 4R - uint32_t pvalx4 = DEFAULT_SEGMENTS; - uint32_t nvalx4 = DEFAULT_SEGMENTS; - uint64_t data = 0; - - - FAPI_TRY( io::read( OPT_TX_IMPCAL_PB, i_tgt, GRP0, LN0, data ) ); - - if( io::get( OPT_TX_ZCAL_DONE, data ) == 1 ) - { - FAPI_DBG( "Using zCal Results." ); - - FAPI_TRY( io::read( OPT_TX_ZCAL_P, i_tgt, GRP0, LN0, data ) ); - - // We need to convert the 8R value to a 4R equivalent - pvalx4 = io::get( OPT_TX_ZCAL_P, data ) / 2; - - FAPI_TRY( io::read( OPT_TX_ZCAL_N, i_tgt, GRP0, LN0, data ) ); - - // We need to convert the 8R value to a 4R equivalent - nvalx4 = io::get( OPT_TX_ZCAL_N, data ) / 2; - - - FAPI_TRY( tx_zcal_verify_results( pvalx4, nvalx4 ), "Tx Z Cal Verify Results Failed" ); - } - else - { - FAPI_ERR( "WARNING: Using Default Tx Zcal Segments." ); - } - - // Convert the results of the zCal to actual segments. - FAPI_TRY( tx_zcal_apply( i_tgt, pvalx4, nvalx4 ), "Tx Zcal Apply Segments Failed" ); - -fapi_try_exit: - FAPI_IMP( "tx_set_zcal_ffe: I/O Obus Exiting" ); - return fapi2::current_err; -} - - -/** - * @brief Rx Dc Calibration - * @param[in] i_tgt FAPI2 Target - * @param[in] i_lane_vector Lane Vector - * @param[in] i_data Data to be set to rx_run_dccal - * @retval ReturnCode - */ -fapi2::ReturnCode set_rx_run_dccal( const OBUS_TGT i_tgt, const uint32_t i_lane_vector, const uint8_t i_data ) -{ - FAPI_IMP( "set_rx_run_dccal: I/O Obus Entering" ); - const uint8_t GRP0 = 0; - const uint8_t LANES = 24; - - // Start DC Calibrate, this iniates the rx dccal state machine - for( uint8_t lane = 0; lane < LANES; ++lane ) - { - if( ( (0x1 << lane) & i_lane_vector ) != 0 ) - { - FAPI_TRY( io::rmw( OPT_RX_RUN_DCCAL, i_tgt, GRP0, lane, i_data ) ); - } - } - - FAPI_DBG( "I/O Obus Set Rx Run Dccal Complete." ); -fapi_try_exit: - FAPI_IMP( "set_rx_run_dccal: I/O Obus Exiting" ); - return fapi2::current_err; -} - - - - - -/** - * @brief Rx Dc Calibration - * @param[in] i_tgt FAPI2 Target - * @param[in] i_lane_vector Lane Vector - * @retval ReturnCode - */ -fapi2::ReturnCode rx_poll_dccal_done( const OBUS_TGT i_tgt, const uint32_t i_lane_vector ) -{ - FAPI_IMP( "rx_poll_dccal_done: I/O Obus Entering" ); - const uint8_t TIMEOUT = 200; - const uint64_t DLY_1MS = 1000000; - const uint64_t DLY_1MIL_CYCLES = 1000000; - const uint32_t MAX_LANES = 24; - const uint8_t GRP0 = 0; - uint8_t poll_count = 0; - uint64_t data = 0; - - //////////////////////////////////////////////////////////////////////////// - /// Poll Rx Dccal - //////////////////////////////////////////////////////////////////////////// - - FAPI_TRY( fapi2::delay( DLY_1MS, DLY_1MIL_CYCLES ) ); - - - for( uint32_t lane = 0; lane < MAX_LANES; ++lane ) - { - if( ( (0x1 << lane) & i_lane_vector ) == 0 ) - { - continue; - } - - for( poll_count = 0; poll_count < TIMEOUT; ++poll_count ) - { - FAPI_TRY( io::read( OPT_RX_DCCAL_DONE, i_tgt, GRP0, lane, data ) ); - - if( io::get( OPT_RX_DCCAL_DONE, data ) == 1 ) - { - FAPI_DBG( "I/O Obus Rx Dccal Complete: Lane(%d) Polling(%d/%d) ", - lane, poll_count, TIMEOUT ); - break; - } - - FAPI_TRY( fapi2::delay( DLY_1MS, DLY_1MIL_CYCLES ) ); - } - - FAPI_ASSERT( ( io::get( OPT_RX_DCCAL_DONE, data ) == 1 ), - fapi2::IO_OBUS_RX_DCCAL_TIMEOUT().set_TARGET( i_tgt ), - "Rx Dccal Timeout: Loops(%d) delay(%d ns, %d cycles)", - poll_count, DLY_1MS, DLY_1MIL_CYCLES ); - - } - - FAPI_DBG( "I/O EDI+ Xbus Rx Poll Dccal Successful." ); - -fapi_try_exit: - FAPI_IMP( "rx_poll_dccal_done: I/O Obus Exiting" ); - return fapi2::current_err; -} - -/** - * @brief Set Rx B Bank Controls - * @param[in] i_tgt FAPI2 Target - * @param[in] i_lane_vector Lane Vector - * @param[in] i_data Data - * @retval ReturnCode - */ -fapi2::ReturnCode set_rx_b_bank_controls( const OBUS_TGT i_tgt, const uint32_t i_lane_vector, const uint8_t i_data ) -{ - FAPI_IMP( "set_rx_b_bank_controls: I/O Obus Entering" ); - const uint8_t GRP0 = 0; - const uint8_t LANES = 24; - - // Start DC Calibrate, this iniates the rx dccal state machine - for( uint8_t lane = 0; lane < LANES; ++lane ) - { - if( ( (0x1 << lane) & i_lane_vector ) != 0 ) - { - FAPI_TRY( io::rmw( OPT_RX_B_BANK_CONTROLS, i_tgt, GRP0, lane, i_data ) ); - } - } - - FAPI_DBG( "I/O Obus Rx Dccal Complete." ); -fapi_try_exit: - FAPI_IMP( "set_rx_b_bank_controls: I/O Obus Exiting" ); - return fapi2::current_err; -} - - -/** - * @brief A I/O Obus Procedure that runs Rx Dccal and Tx Z Impedance calibration - * on every instance of the OBUS. - * @param[in] i_tgt FAPI2 Target - * @param[in] i_lave_vector Lanve Vector - * @retval ReturnCode - */ -fapi2::ReturnCode p9_io_obus_dccal( const OBUS_TGT i_tgt, const uint32_t i_lane_vector ) -{ - FAPI_IMP( "p9_io_obus_dccal: I/O Obus Entering" ); - uint8_t dccal_flags = 0x0; - char l_tgtStr[fapi2::MAX_ECMD_STRING_LEN]; - fapi2::toString( i_tgt, l_tgtStr, fapi2::MAX_ECMD_STRING_LEN ); - FAPI_DBG( "I/O Obus Dccal %s, Lane Vector(0x%X)", l_tgtStr, i_lane_vector ); - - FAPI_TRY( FAPI_ATTR_GET( fapi2::ATTR_IO_OBUS_DCCAL_FLAGS, i_tgt, dccal_flags ) ); - - if( ( dccal_flags & fapi2::ENUM_ATTR_IO_OBUS_DCCAL_FLAGS_TX ) == 0 ) - { - FAPI_TRY( tx_run_zcal( i_tgt ), "I/O Obus Tx Run Z-Cal Failed" ); - FAPI_DBG( "I/O Obus Tx Zcal State Machine Successful." ); - dccal_flags |= fapi2::ENUM_ATTR_IO_OBUS_DCCAL_FLAGS_TX; - FAPI_TRY( FAPI_ATTR_SET( fapi2::ATTR_IO_OBUS_DCCAL_FLAGS, i_tgt, dccal_flags ) ); - } - else - { - FAPI_DBG( "I/O Obus Tx Zcal State Machine Previously Ran." ); - } - - FAPI_TRY( tx_set_zcal_ffe( i_tgt ), "I/O Obus Tx Set Z-Cal FFE Failed" ); - FAPI_DBG( "I/O Obus Tx Zcal Successful." ); - - FAPI_TRY( set_rx_run_dccal( i_tgt, i_lane_vector, 1 ), "Starting Rx Dccal Failed" ); - FAPI_TRY( rx_poll_dccal_done( i_tgt, i_lane_vector ), "I/O Obus Rx Dccal Poll Failed" ); - FAPI_TRY( set_rx_run_dccal( i_tgt, i_lane_vector, 0 ), "Stopping Rx Dccal Failed" ); - FAPI_TRY( set_rx_b_bank_controls( i_tgt, i_lane_vector, 0 ), "Setting Rx B Bank Controls Failed." ); - dccal_flags |= fapi2::ENUM_ATTR_IO_OBUS_DCCAL_FLAGS_RX; - FAPI_TRY( FAPI_ATTR_SET( fapi2::ATTR_IO_OBUS_DCCAL_FLAGS, i_tgt, dccal_flags ) ); - FAPI_DBG( "I/O Obus Rx Dccal Successful." ); - -fapi_try_exit: - FAPI_IMP( "p9_io_obus_dccal: I/O Obus Exiting" ); - return fapi2::current_err; -} diff --git a/src/import/chips/p9/procedures/hwp/memory/docs/FIR.md b/src/import/chips/p9/procedures/hwp/memory/docs/FIR.md deleted file mode 100644 index 1ae411713..000000000 --- a/src/import/chips/p9/procedures/hwp/memory/docs/FIR.md +++ /dev/null @@ -1,79 +0,0 @@ - -# How the memory subsystem handles FIR bits - -In order to make handling of FIR bits a bit more straight forward, we have -created a small data structure mss::fir::reg. Given the FIR register which -reports FIR errors, a fir::reg will encapsulate the 2 action registers and -the mask register as well as the reporting register. - -FIR actions, and when FIR are unmasked are defined by the team as a whole, -and are documented outside of the ekb. - -## FIR actions - -FIR actions are configured in 3 parallel registers: action0, action1 and -mask. Bit patterns assigned across these three registers define a response -the system is to take when a FIR bit is asserted. Because they span three -parallel registers, the actions are defined as tripples: - -``` - Action 0 Action 1 Mask - +---+ +---+ +---+ - | 0 | | 0 | | 0 | - +---+ +---+ +---+ -``` - -So, for any bit postion representing a FIR, that corresponding bit in the -three registers defines the system response. Consider "bit 12," to define -a response, we must set the three bits in position 12 in the three -egisters: - -``` - bit 0, ..., bit 12 - - Action 0 Action 1 Mask Action 0 Action 1 Mask - +---+ +---+ +---+ +---+ +---+ +---+ - | 0 | | 0 | | 1 | | 0 | | 0 | | 0 | - +---+ +---+ +---+ ..., +---+ +---+ +---+ ..., -``` - -This represents that the FIR "bit 0" is masked (1 in the mask register bit -position 0) and the FIR "bit 12" should respond with a check-stop (0 in -the action 0 and action 1 registers in bit position 12, and a 0 to represent -the FIR is unmasked. - -## Action Tripples - -The actions are defined as: - -``` - Action 0 Action 1 Mask - +---+ +---+ +---+ - | 0 | | 0 | | 0 | System Checkstop - +---+ +---+ +---+ - - +---+ +---+ +---+ - | 0 | | 1 | | 0 | Recoverable Error - +---+ +---+ +---+ - - +---+ +---+ +---+ - | 1 | | 0 | | 0 | Attention - +---+ +---+ +---+ - - +---+ +---+ +---+ - | 1 | | 1 | | 0 | Local Checkstop - +---+ +---+ +---+ - - +---+ +---+ +---+ - | X | | X | | 1 | Masked - +---+ +---+ +---+ -``` - -## The fir::reg class - -Given this information, the fir::reg class provides a read-modify-write -interface for specific actions, keyed off of the FIR register. For example -fir::reg::checkstop() configures the appropriate action0, action1 and mask bits. -fir::reg::write() ensures all of the configuration is written to the proper -register. Refer to the fir.H documentation for further explanation on using -the fir::reg class. diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/state_machine.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/state_machine.C deleted file mode 100644 index 3b73dec79..000000000 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/state_machine.C +++ /dev/null @@ -1,236 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/state_machine.C $ */ -/* */ -/* OpenPOWER HostBoot Project */ -/* */ -/* Contributors Listed Below - COPYRIGHT 2015,2017 */ -/* [+] International Business Machines Corp. */ -/* */ -/* */ -/* Licensed under the Apache License, Version 2.0 (the "License"); */ -/* you may not use this file except in compliance with the License. */ -/* You may obtain a copy of the License at */ -/* */ -/* http://www.apache.org/licenses/LICENSE-2.0 */ -/* */ -/* Unless required by applicable law or agreed to in writing, software */ -/* distributed under the License is distributed on an "AS IS" BASIS, */ -/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ -/* implied. See the License for the specific language governing */ -/* permissions and limitations under the License. */ -/* */ -/* IBM_PROLOG_END_TAG */ - -/// -/// @file state_machine.C -/// @brief Implementation of the state_machine -/// -// *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> -// *HWP HWP Backup: Brian Silver <bsilver@us.ibm.com> -// *HWP Team: Memory -// *HWP Level: 2 -// *HWP Consumed by: HB:FSP - -#include <fapi2.H> -#include <c_str.H> -#include <lib/dimm/ddr4/state_machine.H> - -namespace mss -{ - -/// -/// @brief non-target c_str general declaration -/// @tparam T - type you want the const char * for -/// @param[in] i_input a variable_buffer (expects a 72 bit buffer) -/// @return const char * -/// -template< > -const char* c_str( const fapi2::variable_buffer& i_input ) -{ - if( i_input.getBitLength() != MAX_DQ_BITS ) - { - // User passed in a variable_buffer of invalid size - FAPI_ERR("Expecting a %d bit variable buffer, %d bit buffer received.", - MAX_DQ_BITS, - i_input.getBitLength()); - - fapi2::Assert(false); - } - - constexpr uint64_t AADR_START = 0; - constexpr uint64_t AADR_LEN = 64; - - constexpr uint64_t AAER_START = 64; - constexpr uint64_t AAER_LEN = 8; - - uint64_t l_aaer = 0; // ecc - uint64_t l_aadr = 0; // data - - FAPI_TRY( i_input.extractToRight(l_aadr, AADR_START, AADR_LEN), - "Failed to extract AADR data, start: %d, len: %d", AADR_START, AADR_LEN); - - FAPI_TRY( i_input.extractToRight(l_aaer, AAER_START, AAER_LEN), - "Failed to extract AAER data, start: %d, len: %d", AAER_START, AAER_LEN); - - // We are just printing out 18 nibbles worth of data - sprintf(c_str_storage, "0x%016lx%02lx", l_aadr, l_aaer); - return c_str_storage; - -fapi_try_exit: - // Best we can do? If we extracting data from the buffer fails, - // we don't fail-out but we get a string that states "badness" - AAM - FAPI_ERR("Failed to extract data from variable_buffer"); - sprintf(c_str_storage, "ERROR"); - return c_str_storage; -} - -/// -/// @brief Helper function for trace boilerplate -/// @param[in] i_data DRAM DQ data -/// @param[in] i_nibble current nibble -/// @param[in] i_phase_timing current phase step -/// -inline void state_machine::print_debug( const fapi2::variable_buffer& i_data, - const uint64_t i_nibble, - const uint64_t i_phase_timing ) -{ - // Can't use 2 mss::c_str functions inside a trace - // because of sharing issues with c_str_storage - // so we use a c_str buffer specifically for this class - strcpy(iv_str_buffer, mss::c_str(i_data)); - - FAPI_DBG( "%s phase timing: %d tck, nibble: %d, data: %s", - mss::c_str(iv_target), i_phase_timing, i_nibble, iv_str_buffer); -} - -/// -/// @brief Helper function to set uninitialized state transition -/// @param[in] i_data DRAM DQ data -/// @param[in] i_nibble current nibble -/// @param[in] i_phase_timing current phase step -/// -void state_machine::uninitialized( const fapi2::variable_buffer& i_data, - const uint64_t i_nibble, - const uint64_t i_phase_timing ) -{ - print_debug(i_data, i_nibble, i_phase_timing); - - if( i_data.isBitSet(i_nibble * NIBBLE_OFFSET, BITS_PER_NIBBLE) ) - { - FAPI_INF( "%s Going from UNINITIALIZED state to HIGH state", mss::c_str(iv_target) ); - iv_state = fsm_state::HIGH; - } - - else - { - FAPI_INF( "%s Going from UNINITIALIZED state to LOW state", mss::c_str(iv_target) ); - iv_state = fsm_state::LOW; - } - -} - -/// -/// @brief Helper function to set high state transition -/// @param[in] i_data DRAM DQ data -/// @param[in] i_nibble current nibble -/// @param[in] i_phase_timing current phase step -/// -template< > -void state_machine::high<transition::FALLING_EDGE>( const fapi2::variable_buffer& i_data, - const uint64_t i_nibble, - const uint64_t i_phase_timing ) -{ - print_debug(i_data, i_nibble, i_phase_timing); - - if( i_data.isBitClear(i_nibble * NIBBLE_OFFSET, BITS_PER_NIBBLE) ) - { - FAPI_INF( "%s Found first HIGH to LOW state transition. Setting state to DONE", - mss::c_str(iv_target) ); - - iv_state = fsm_state::DONE; - iv_delay = i_phase_timing; - return; - } - - // If we get here, do nothing, no state change - FAPI_INF( "%s No state change. Already in HIGH state.", mss::c_str(iv_target) ); -} - -/// -/// @brief Helper function to set high state transition -/// @param[in] i_data DRAM DQ data -/// @param[in] i_nibble current nibble -/// @param[in] i_phase_timing current phase step -/// -template< > -void state_machine::high<transition::RISING_EDGE>( const fapi2::variable_buffer& i_data, - const uint64_t i_nibble, - const uint64_t i_phase_timing ) -{ - print_debug(i_data, i_nibble, i_phase_timing); - - if( i_data.isBitClear(i_nibble * NIBBLE_OFFSET, BITS_PER_NIBBLE) ) - { - FAPI_INF( "%s Going from HIGH state to LOW state", mss::c_str(iv_target) ); - iv_state = fsm_state::LOW; - return; - } - - // If we get here, do nothing, no state change - FAPI_INF( "%s No state change. Already in HIGH state.", mss::c_str(iv_target) ); -} - -/// -/// @brief Helper function to set low state transition -/// @param[in] i_data DRAM DQ data -/// @param[in] i_nibble current nibble -/// @param[in] i_phase_timing current phase step -/// -template< > -void state_machine::low<transition::FALLING_EDGE>( const fapi2::variable_buffer& i_data, - const uint64_t i_nibble, - const uint64_t i_phase_timing ) -{ - print_debug(i_data, i_nibble, i_phase_timing); - - if( i_data.isBitSet(i_nibble * NIBBLE_OFFSET, BITS_PER_NIBBLE) ) - { - FAPI_INF( "%s Going from LOW state to HIGH state", mss::c_str(iv_target) ); - iv_state = fsm_state::HIGH; - return; - } - - // If we get here, do nothing, no state change - FAPI_INF( "%s No state change. Already in LOW state.", mss::c_str(iv_target) ); -} - -/// -/// @brief Helper function to set low state transition -/// @param[in] i_data DRAM DQ data -/// @param[in] i_nibble current nibble -/// @param[in] i_phase_timing current phase step -/// -template< > -void state_machine::low<transition::RISING_EDGE>( const fapi2::variable_buffer& i_data, - const uint64_t i_nibble, - const uint64_t i_phase_timing ) -{ - print_debug(i_data, i_nibble, i_phase_timing); - - if( i_data.isBitSet(i_nibble * NIBBLE_OFFSET, BITS_PER_NIBBLE) ) - { - FAPI_INF( "%s Found first LOW to HIGH state transition. Setting state to DONE", - mss::c_str(iv_target) ); - - iv_state = fsm_state::DONE; - iv_delay = i_phase_timing; - return; - } - - // If we get here, do nothing, no state change - FAPI_INF( "%s No state change. Already in LOW state.", mss::c_str(iv_target) ); -} - -}// mss diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/state_machine.H b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/state_machine.H deleted file mode 100644 index 5190e9aff..000000000 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/state_machine.H +++ /dev/null @@ -1,180 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/state_machine.H $ */ -/* */ -/* OpenPOWER HostBoot Project */ -/* */ -/* Contributors Listed Below - COPYRIGHT 2015,2017 */ -/* [+] International Business Machines Corp. */ -/* */ -/* */ -/* Licensed under the Apache License, Version 2.0 (the "License"); */ -/* you may not use this file except in compliance with the License. */ -/* You may obtain a copy of the License at */ -/* */ -/* http://www.apache.org/licenses/LICENSE-2.0 */ -/* */ -/* Unless required by applicable law or agreed to in writing, software */ -/* distributed under the License is distributed on an "AS IS" BASIS, */ -/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ -/* implied. See the License for the specific language governing */ -/* permissions and limitations under the License. */ -/* */ -/* IBM_PROLOG_END_TAG */ - -/// -/// @file state_machine.H -/// @brief state_machine delcaration -/// -// *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> -// *HWP HWP Backup: Brian Silver <bsilver@us.ibm.com> -// *HWP Team: Memory -// *HWP Level: 2 -// *HWP Consumed by: HB:FSP - -#ifndef _MSS_STATE_MACHINE_H_ -#define _MSS_STATE_MACHINE_H_ - -#include <fapi2.H> -#include <c_str.H> -#include <lib/utils/checker.H> - -namespace mss -{ - -enum class transition -{ - RISING_EDGE, ///< Looking for 1st Low to High transition - FALLING_EDGE, ///< Looking for 1st High to Low transition -}; - -enum class fsm_state -{ - UNINITIALIZED, ///< Initial state - HIGH, ///< High state (logical 1) - LOW, ///< Low state (logical 0) - DONE, ///< Final state (First 1->0 or 0->1 transition) -}; - -/// -/// @class state_machine -/// @brief State machine for LRDIMM training -/// -class state_machine -{ - public: - fsm_state iv_state; - uint64_t iv_delay; - - /// - /// @brief Default ctor - /// @param[in] i_target DIMM target - /// - state_machine(const fapi2::Target< fapi2::TARGET_TYPE_DIMM >& i_target): - iv_state(fsm_state::UNINITIALIZED), - iv_delay(0), - iv_target(i_target) - {} - - /// - /// @brief Default dctor - /// - ~state_machine() = default; - - /// - /// @brief Sets current state - /// @tparam T first transition we are looking for - /// @param[in] i_data DRAM DQ data - /// @param[in] i_nibble current nibble - /// @param[in] i_phase_timing current phase step - /// - template< transition T > - fapi2::ReturnCode next_transition( const fapi2::variable_buffer& i_data, - const uint64_t i_nibble, - const uint64_t i_phase_timing) - { - switch(iv_state) - { - case fsm_state::UNINITIALIZED: - uninitialized(i_data, i_nibble, i_phase_timing); - break; - - case fsm_state::HIGH: - high<T>(i_data, i_nibble, i_phase_timing); - break; - - case fsm_state::LOW: - low<T>(i_data, i_nibble, i_phase_timing); - break; - - case fsm_state::DONE: - FAPI_INF("%s No state change. Already in DONE state.", mss::c_str(iv_target) ); - break; - - default: - // By default we are unitialized, we switch state based on - // AADR & AAER register data that represents DRAM DQ data. - // If we got here something bad happened, iv_state was corrupted somehow. - // Lets tell someone with FFDC - FAPI_TRY( check::invalid_dq_data(iv_target, false, i_data, i_phase_timing, i_nibble) ); - break; - }// switch - - fapi_try_exit: - return fapi2::current_err; - } - - private: - static constexpr size_t NIBBLE_OFFSET = 4; - const fapi2::Target< fapi2::TARGET_TYPE_DIMM > iv_target; - char iv_str_buffer[fapi2::MAX_ECMD_STRING_LEN]; - - /// - /// @brief Helper function to set uninitialized state transition - /// @param[in] i_data DRAM DQ data - /// @param[in] i_nibble current nibble - /// @param[in] i_phase_timing current phase step - /// - void uninitialized( const fapi2::variable_buffer& i_data, - const uint64_t i_nibble, - const uint64_t i_phase_timing ); - - /// - /// @brief Helper function to set high state transition - /// @tparam T first transition we are looking for - /// @param[in] i_data DRAM DQ data - /// @param[in] i_nibble current nibble - /// @param[in] i_phase_timing current phase step - /// - template< transition T > - void high( const fapi2::variable_buffer& i_data, - const uint64_t i_nibble, - const uint64_t i_phase_timing ); - - /// - /// @brief Helper function to set low state transition - /// @tparam T first transition we are looking for - /// @param[in] i_data DRAM DQ data - /// @param[in] i_nibble current nibble - /// @param[in] i_phase_timing current phase step - /// - template< transition T > - void low( const fapi2::variable_buffer& i_data, - const uint64_t i_nibble, - const uint64_t i_phase_timing ); - - /// - /// @brief Helper function for trace boilerplate - /// @param[in] i_data DRAM DQ data - /// @param[in] i_nibble current nibble - /// @param[in] i_phase_timing current phase step - /// - void print_debug( const fapi2::variable_buffer& i_data, - const uint64_t i_nibble, - const uint64_t i_phase_timing ); -}; - -}// mss - -#endif diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_scan_ring_util.C b/src/import/chips/p9/procedures/hwp/pm/p9_scan_ring_util.C deleted file mode 100644 index 3449250be..000000000 --- a/src/import/chips/p9/procedures/hwp/pm/p9_scan_ring_util.C +++ /dev/null @@ -1,807 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_scan_ring_util.C $ */ -/* */ -/* OpenPOWER HostBoot Project */ -/* */ -/* Contributors Listed Below - COPYRIGHT 2016 */ -/* [+] International Business Machines Corp. */ -/* */ -/* */ -/* Licensed under the Apache License, Version 2.0 (the "License"); */ -/* you may not use this file except in compliance with the License. */ -/* You may obtain a copy of the License at */ -/* */ -/* http://www.apache.org/licenses/LICENSE-2.0 */ -/* */ -/* Unless required by applicable law or agreed to in writing, software */ -/* distributed under the License is distributed on an "AS IS" BASIS, */ -/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ -/* implied. See the License for the specific language governing */ -/* permissions and limitations under the License. */ -/* */ -/* IBM_PROLOG_END_TAG */ -#include "p9_scan_ring_util.H" -#include "p9_hcode_image_defines.H" -#include <fapi2.H> -#include <stdio.h> -/// -/// @file p9_scan_ring_util.C -/// @brief utility classes and functions for scan ring debug. -/// -/// *HWP HWP Owner: Greg Still <stillgs@us.ibm.com> -/// *HWP FW Owner: Prem S Jha <premjha2@in.ibm.com> -/// *HWP Team: PM -/// *HWP Level: 2 -/// *HWP Consumed by: Hostboot:Phyp:Cro -// - -namespace p9_hcodeImageBuild -{ -/** - * @brief some local constants. - */ -enum -{ - TEMP_MAX_QUAD_CMN_RINGS = 0x50, - TEMP_MAX_QUAD_SPEC_RINGS = 0x10, - TEMP_MAX_CORE_CMN_RINGS = 0x08, - TEMP_MAX_CORE_SPEC_RINGS = 0x04, -}; - -bool operator < ( const RingProfile& i_lhsRing, const RingProfile& i_rhsRing ) -{ - bool l_state = false; - - if( i_lhsRing.iv_ringId < i_rhsRing.iv_ringId ) - { - l_state = true; - } - else if( i_lhsRing.iv_ringId == i_rhsRing.iv_ringId ) - { - if( i_lhsRing.iv_chipletPos < i_rhsRing.iv_chipletPos ) - { - l_state = true; - } - } - - return l_state; -} - -bool operator == ( const RingProfile& i_lhsRing, const RingProfile& i_rhsRing ) -{ - bool l_state = false; - - if( i_lhsRing.iv_ringId == i_rhsRing.iv_ringId ) - { - if( i_lhsRing.iv_chipletPos == i_rhsRing.iv_chipletPos ) - { - l_state = true; - } - } - - return l_state; -} - -RingName::RingName( char* i_char ) -{ - uint32_t strlength = strlen(i_char); - strlength = strlength > 40 ? 40 : strlength; - memset( iv_ringStr, 0, 40); - memcpy( iv_ringStr, i_char, strlength ); -} - -char* RingName::c_str() -{ - char* pStrName = &iv_ringStr[0]; - return pStrName ; -} - -void getScanRing( void* o_pRingBuffer, uint32_t& o_size, - uint32_t i_ringId, PlatId i_plat ) -{ - FAPI_DBG("> getScanRing Plat %s", (i_plat == PLAT_SGPE) ? "SGPE" : "CME"); -#ifdef __CRONUS_VER - - do - { - FILE* fpFakeRing = fopen( "../../output/gen/fake_ring.bin", "r" ); - - if( !fpFakeRing ) - { - FAPI_ERR("Failed to open fake ring file"); - break; - } - - fseek( fpFakeRing, ( sizeof( FakeRing ) * i_ringId ), SEEK_SET ); - fread( (uint8_t*)o_pRingBuffer, sizeof(char), sizeof(FakeRing), fpFakeRing ); - o_size = sizeof( FakeRing ); - - } - while(0); - -#endif - FAPI_DBG("< getScanRing"); -} -//------------------------------------------------------------------------- - -RingBucket::RingBucket( PlatId i_plat, uint8_t* i_pRingStart, RingDebugMode_t i_debugMode ) -{ - iv_pRingStart = i_pRingStart; - iv_plat = i_plat; - iv_debugMode = i_debugMode; - - uint32_t ringIndex = 0; - - if( PLAT_SGPE == i_plat ) - { - RingProfile l_quadCmnRings[TEMP_MAX_QUAD_CMN_RINGS] = - { - { eq_fure, 0, 0 }, - { eq_gptr, 0, 0 }, - { eq_time, 0, 0 }, - { eq_mode, 0, 0 }, - { ex_l3_fure, 0, 0 }, - { ex_l3_gptr, 0, 0 }, - { ex_l3_time, 0, 0 }, - { ex_l2_mode, 0, 0 }, - { ex_l2_fure, 0, 0 }, - { ex_l2_gptr, 0, 0 }, - { ex_l2_time, 0, 0 }, - { ex_l3_refr_fure, 0, 0 }, - { ex_l3_refr_gptr, 0, 0 }, - { eq_ana_func, 0, 0 }, - { eq_ana_gptr, 0, 0 }, - { eq_dpll_func, 0, 0 }, - { eq_dpll_gptr, 0, 0 }, - { eq_dpll_mode, 0, 0 }, - { eq_ana_bndy_bucket_0, 0, 0 }, - { eq_ana_bndy_bucket_1, 0, 0 }, - { eq_ana_bndy_bucket_2, 0, 0 }, - { eq_ana_bndy_bucket_3, 0, 0 }, - { eq_ana_bndy_bucket_4, 0, 0 }, - { eq_ana_bndy_bucket_5, 0, 0 }, - { eq_ana_bndy_bucket_6, 0, 0 }, - { eq_ana_bndy_bucket_7, 0, 0 }, - { eq_ana_bndy_bucket_8, 0, 0 }, - { eq_ana_bndy_bucket_9, 0, 0 }, - { eq_ana_bndy_bucket_10, 0, 0 }, - { eq_ana_bndy_bucket_11, 0, 0 }, - { eq_ana_bndy_bucket_12, 0, 0 }, - { eq_ana_bndy_bucket_13, 0, 0 }, - { eq_ana_bndy_bucket_14, 0, 0 }, - { eq_ana_bndy_bucket_15, 0, 0 }, - { eq_ana_bndy_bucket_16, 0, 0 }, - { eq_ana_bndy_bucket_17, 0, 0 }, - { eq_ana_bndy_bucket_18, 0, 0 }, - { eq_ana_bndy_bucket_19, 0, 0 }, - { eq_ana_bndy_bucket_20, 0, 0 }, - { eq_ana_bndy_bucket_21, 0, 0 }, - { eq_ana_bndy_bucket_22, 0, 0 }, - { eq_ana_bndy_bucket_23, 0, 0 }, - { eq_ana_bndy_bucket_24, 0, 0 }, - { eq_ana_bndy_bucket_25, 0, 0 }, - { eq_ana_bndy_l3dcc_bucket_26, 0, 0 }, - { eq_ana_mode, 0, 0 }, - }; - - RingProfile l_quadSpecRings[TEMP_MAX_QUAD_SPEC_RINGS * MAX_CACHE_CHIPLET] = - { - { eq_repr, 0x10 }, - { ex_l3_repr, 0x10 }, - { ex_l3_repr, 0x11 }, - { ex_l2_repr, 0x10 }, - { ex_l2_repr, 0x11 }, - { ex_l3_refr_repr, 0x10 }, - { ex_l3_refr_repr, 0x11 }, - { ex_l3_refr_time, 0x10 }, - { ex_l3_refr_time, 0x11 }, - - { eq_repr, 0x11 }, - { ex_l3_repr, 0x12 }, - { ex_l3_repr, 0x13 }, - { ex_l2_repr, 0x12 }, - { ex_l2_repr, 0x13 }, - { ex_l3_refr_repr, 0x12 }, - { ex_l3_refr_repr, 0x13 }, - { ex_l3_refr_time, 0x12 }, - { ex_l3_refr_time, 0x13 }, - - { eq_repr, 0x12 }, - { ex_l3_repr, 0x14 }, - { ex_l3_repr, 0x15 }, - { ex_l2_repr, 0x14 }, - { ex_l2_repr, 0x15 }, - { ex_l3_refr_repr, 0x14 }, - { ex_l3_refr_repr, 0x15 }, - { ex_l3_refr_time, 0x14 }, - { ex_l3_refr_time, 0x15 }, - - { eq_repr, 0x13 }, - { ex_l3_repr, 0x16 }, - { ex_l3_repr, 0x17 }, - { ex_l2_repr, 0x16 }, - { ex_l2_repr, 0x17 }, - { ex_l3_refr_repr, 0x16 }, - { ex_l3_refr_repr, 0x17 }, - { ex_l3_refr_time, 0x16 }, - { ex_l3_refr_time, 0x17 }, - - { eq_repr, 0x14 }, - { ex_l3_repr, 0x18 }, - { ex_l3_repr, 0x19 }, - { ex_l2_repr, 0x18 }, - { ex_l2_repr, 0x19 }, - { ex_l3_refr_repr, 0x18 }, - { ex_l3_refr_repr, 0x19 }, - { ex_l3_refr_time, 0x18 }, - { ex_l3_refr_time, 0x19 }, - - { eq_repr, 0x15 }, - { ex_l3_repr, 0x1A }, - { ex_l3_repr, 0x1B }, - { ex_l2_repr, 0x1A }, - { ex_l2_repr, 0x1B }, - { ex_l3_refr_repr, 0x1A }, - { ex_l3_refr_repr, 0x1B }, - { ex_l3_refr_time, 0x1A }, - { ex_l3_refr_time, 0x1B }, - - }; - - for( ringIndex = 0; ringIndex < EQ::g_eqData.iv_num_common_rings; ringIndex++ ) - { - iv_cmnRingMap[ringIndex] = l_quadCmnRings[ringIndex]; - } - - for( ringIndex = 0; ringIndex < ( EQ::g_eqData.iv_num_instance_rings_scan_addrs * MAX_CACHE_CHIPLET ); - ringIndex++ ) - { - iv_instRingMap[ringIndex] = l_quadSpecRings[ringIndex]; - } - - iv_ringName[ eq_fure ] = (char*)"eq_fure "; - iv_ringName[ eq_gptr ] = (char*)"eq_gptr "; - iv_ringName[ eq_time ] = (char*)"eq_time "; - iv_ringName[ eq_mode ] = (char*)"eq_mode "; - iv_ringName[ eq_fure ] = (char*)"eq_fure "; - iv_ringName[ eq_gptr ] = (char*)"eq_gptr "; - iv_ringName[ eq_time ] = (char*)"eq_time "; - iv_ringName[ ex_l3_fure ] = (char*)"ex_l3_fure "; - iv_ringName[ ex_l3_gptr ] = (char*)"ex_l3_gptr "; - iv_ringName[ ex_l3_time ] = (char*)"ex_l3_time "; - iv_ringName[ ex_l2_mode ] = (char*)"ex_l2_mode "; - iv_ringName[ ex_l2_fure ] = (char*)"ex_l2_fure "; - iv_ringName[ ex_l2_gptr ] = (char*)"ex_l2_gptr "; - iv_ringName[ ex_l2_time ] = (char*)"ex_l2_time "; - iv_ringName[ ex_l3_refr_fure ] = (char*)"ex_l3_refr_fure "; - iv_ringName[ ex_l3_refr_gptr ] = (char*)"ex_l3_refr_gptr "; - iv_ringName[ eq_ana_func ] = (char*)"eq_ana_func "; - iv_ringName[ eq_ana_gptr ] = (char*)"eq_ana_gptr "; - iv_ringName[ eq_dpll_func ] = (char*)"eq_dpll_func "; - iv_ringName[ eq_dpll_gptr ] = (char*)"eq_dpll_gptr "; - iv_ringName[ eq_dpll_mode ] = (char*)"eq_dpll_mode "; - iv_ringName[ eq_ana_bndy_bucket_0 ] = (char*)"eq_ana_bndy_bucket_0"; - iv_ringName[ eq_ana_bndy_bucket_1 ] = (char*)"eq_ana_bndy_bucket_1"; - iv_ringName[ eq_ana_bndy_bucket_2 ] = (char*)"eq_ana_bndy_bucket_2"; - iv_ringName[ eq_ana_bndy_bucket_3 ] = (char*)"eq_ana_bndy_bucket_3"; - iv_ringName[ eq_ana_bndy_bucket_4 ] = (char*)"eq_ana_bndy_bucket_4"; - iv_ringName[ eq_ana_bndy_bucket_5 ] = (char*)"eq_ana_bndy_bucket_5"; - iv_ringName[ eq_ana_bndy_bucket_6 ] = (char*)"eq_ana_bndy_bucket_6"; - iv_ringName[ eq_ana_bndy_bucket_7 ] = (char*)"eq_ana_bndy_bucket_7"; - iv_ringName[ eq_ana_bndy_bucket_8 ] = (char*)"eq_ana_bndy_bucket_8"; - iv_ringName[ eq_ana_bndy_bucket_9 ] = (char*)"eq_ana_bndy_bucket_9"; - iv_ringName[ eq_ana_bndy_bucket_10 ] = (char*)"eq_ana_bndy_bucket_10"; - iv_ringName[ eq_ana_bndy_bucket_11 ] = (char*)"eq_ana_bndy_bucket_11"; - iv_ringName[ eq_ana_bndy_bucket_12 ] = (char*)"eq_ana_bndy_bucket_12"; - iv_ringName[ eq_ana_bndy_bucket_13 ] = (char*)"eq_ana_bndy_bucket_13"; - iv_ringName[ eq_ana_bndy_bucket_14 ] = (char*)"eq_ana_bndy_bucket_14"; - iv_ringName[ eq_ana_bndy_bucket_15 ] = (char*)"eq_ana_bndy_bucket_15"; - iv_ringName[ eq_ana_bndy_bucket_16 ] = (char*)"eq_ana_bndy_bucket_16"; - iv_ringName[ eq_ana_bndy_bucket_17 ] = (char*)"eq_ana_bndy_bucket_17"; - iv_ringName[ eq_ana_bndy_bucket_18 ] = (char*)"eq_ana_bndy_bucket_18"; - iv_ringName[ eq_ana_bndy_bucket_19 ] = (char*)"eq_ana_bndy_bucket_19"; - iv_ringName[ eq_ana_bndy_bucket_20 ] = (char*)"eq_ana_bndy_bucket_20"; - iv_ringName[ eq_ana_bndy_bucket_21 ] = (char*)"eq_ana_bndy_bucket_21"; - iv_ringName[ eq_ana_bndy_bucket_22 ] = (char*)"eq_ana_bndy_bucket_22"; - iv_ringName[ eq_ana_bndy_bucket_23 ] = (char*)"eq_ana_bndy_bucket_23"; - iv_ringName[ eq_ana_bndy_bucket_24 ] = (char*)"eq_ana_bndy_bucket_24"; - iv_ringName[ eq_ana_bndy_bucket_25 ] = (char*)"eq_ana_bndy_bucket_25"; - iv_ringName[ eq_ana_bndy_l3dcc_bucket_26 ] = (char*)"eq_ana_bndy_l3dcc_bucket_26"; - iv_ringName[ eq_ana_mode ] = (char*)"eq_ana_mode "; - iv_ringName[ eq_repr ] = (char*)"eq_repr "; - iv_ringName[ ex_l3_repr ] = (char*)"ex_l3_repr "; - iv_ringName[ ex_l2_repr ] = (char*)"ex_l2_repr "; - iv_ringName[ ex_l3_refr_repr ] = (char*)"ex_l3_refr_repr "; - iv_ringName[ ex_l3_refr_time ] = (char*)"ex_l3_refr_time "; - } - else if( PLAT_CME == i_plat ) - { - RingProfile l_coreCmnRings[TEMP_MAX_CORE_CMN_RINGS] = - { - { ec_func, 0, 0 }, - { ec_gptr, 0, 0 }, - { ec_time, 0, 0 }, - { ec_mode, 0, 0 }, - }; - - RingProfile l_coreSpecRings[TEMP_MAX_CORE_SPEC_RINGS * MAX_CORES_PER_CHIP] = - { - { ec_repr, 0 }, - { ec_repr, 1 }, - { ec_repr, 2 }, - { ec_repr, 3 }, - { ec_repr, 4 }, - { ec_repr, 5 }, - { ec_repr, 6 }, - { ec_repr, 7 }, - { ec_repr, 8 }, - { ec_repr, 9 }, - { ec_repr, 10 }, - { ec_repr, 11}, - { ec_repr, 12 }, - { ec_repr, 13 }, - { ec_repr, 14 }, - { ec_repr, 15 }, - { ec_repr, 16 }, - { ec_repr, 17 }, - { ec_repr, 18 }, - { ec_repr, 19 }, - { ec_repr, 20 }, - { ec_repr, 21 }, - { ec_repr, 22 }, - { ec_repr, 23 }, - }; - - for( ringIndex = 0; ringIndex < EC::g_ecData.iv_num_common_rings; ringIndex++ ) - { - iv_cmnRingMap[ringIndex] = l_coreCmnRings[ringIndex]; - } - - for( ringIndex = 0; ringIndex < MAX_CORES_PER_CHIP; - ringIndex++ ) - { - iv_instRingMap[ringIndex] = l_coreSpecRings[ringIndex]; - } - - iv_ringName[ ec_func ] = (char*)"ec_func "; - iv_ringName[ ec_gptr ] = (char*)"ec_gptr "; - iv_ringName[ ec_time ] = (char*)"ec_time "; - iv_ringName[ ec_mode ] = (char*)"ec_mode "; - iv_ringName[ ec_repr ] = (char*)"ec_repr "; - } -} - -//------------------------------------------------------------------------- -RingBucket:: ~RingBucket() -{ -#ifdef __CRONUS_VER - iv_ringName.clear(); -#endif - iv_instRingMap.clear(); - iv_cmnRingMap.clear(); - -} -//------------------------------------------------------------------------- - -RingID RingBucket::getCommonRingId( uint16_t i_ringPos ) -{ - return iv_cmnRingMap[i_ringPos].iv_ringId; // for now not checking validity of pos -} - -//------------------------------------------------------------------------- - -RingID RingBucket::getInstRingId( uint16_t i_ringPos ) -{ - return iv_instRingMap[i_ringPos].iv_ringId; // for now not checking validity of pos -} - -//------------------------------------------------------------------------- - -uint16_t RingBucket::getRingOffset( RingID i_ringId, uint8_t i_chipletPos ) -{ - uint16_t l_ringOffset = 0; - std::map<uint16_t, RingProfile>::iterator it; - - do - { - for( it = iv_cmnRingMap.begin(); it != iv_cmnRingMap.end(); - it++ ) - { - RingProfile l_searchRing( i_ringId, i_chipletPos ); - - if( it->second == l_searchRing ) - { - l_ringOffset = it->second.iv_ringOffset; - break; - } - } - - for( it = iv_instRingMap.begin(); it != iv_instRingMap.end(); - it++ ) - { - RingProfile l_searchRing( i_ringId, i_chipletPos ); - - if( it->second == l_searchRing ) - { - l_ringOffset = it->second.iv_ringOffset; - break; - } - } - - } - while(0); - - return l_ringOffset; -} - -//------------------------------------------------------------------------- - - -void RingBucket::setRingOffset( uint8_t* i_pRingPtr, RingID i_ringId, uint8_t i_chipletPos ) -{ - do - { - std::map<uint16_t, RingProfile>::iterator it; - RingProfile l_searchRing( i_ringId, i_chipletPos ); - - for( it = iv_cmnRingMap.begin(); it != iv_cmnRingMap.end(); - it++ ) - { - if( it->second == l_searchRing ) - { - it->second.iv_ringOffset = i_pRingPtr - iv_pRingStart; - break; - } - } - - for( it = iv_instRingMap.begin(); it != iv_instRingMap.end(); - it++ ) - { - if( it->second == l_searchRing ) - { - it->second.iv_ringOffset = i_pRingPtr - iv_pRingStart; - break; - } - } - } - while(0); -} - -//------------------------------------------------------------------------- - -void RingBucket::initRingBase( uint8_t* i_pRingStart ) -{ - iv_pRingStart = i_pRingStart; -} - -//------------------------------------------------------------------------- -uint16_t RingBucket::getRingSize( RingID i_ringId, uint8_t i_chipletPos ) -{ - std::map<uint16_t, RingProfile>::iterator it = iv_cmnRingMap.begin(); - uint16_t l_ringSize = 0; - RingProfile l_searchRing( i_ringId, i_chipletPos ); - - do - { - for( it = iv_cmnRingMap.begin(); it != iv_cmnRingMap.end(); - it++ ) - { - if( it->second == l_searchRing ) - { - l_ringSize = it->second.iv_ringSize; - break; - } - } - - for( it = iv_instRingMap.begin(); it != iv_instRingMap.end(); - it++ ) - { - if ( it->second == l_searchRing ) - { - l_ringSize = it->second.iv_ringSize; - break; - } - } - - } - while(0); - - return l_ringSize; -} - -//------------------------------------------------------------------------- - -void RingBucket::setRingSize( RingID i_ringId, uint16_t i_ringSize, uint8_t i_chipletPos ) -{ - std::map<uint16_t, RingProfile>::iterator it = iv_cmnRingMap.begin(); - - do - { - RingProfile l_searchRing( i_ringId, i_chipletPos ); - - for( it = iv_cmnRingMap.begin(); it != iv_cmnRingMap.end(); - it++ ) - { - if( it->second == l_searchRing ) - { - it->second.iv_ringSize = i_ringSize; - break; - } - } - - for( it = iv_instRingMap.begin(); it != iv_instRingMap.end(); - it++ ) - { - if( it->second == l_searchRing ) - { - it->second.iv_ringSize = i_ringSize; - break; - } - } - - } - while(0); - -} - -//------------------------------------------------------------------------- - -const char* RingBucket::getRingName( RingID i_ringId ) -{ - const char* pRingName = NULL; - - if( iv_ringName.find(i_ringId) != iv_ringName.end() ) - { - pRingName = ((iv_ringName.find(i_ringId)->second).c_str()); - } - - return pRingName; -} - -//------------------------------------------------------------------------- -void RingBucket::extractRing( void* i_ptr, uint32_t i_ringSize, uint32_t i_ringId ) -{ - do - { - if( SCAN_RING_NO_DEBUG == iv_debugMode ) - { - break; - } - - if( !i_ptr ) - { - break; - } - - uint8_t* pRing = (uint8_t*)(i_ptr); - uint16_t maxLines = i_ringSize / sizeof(uint64_t); - FAPI_DBG("Ring Id 0x%08x", i_ringId ); - - for( uint32_t ringId = 0; ringId < maxLines; ringId++ ) - { - FAPI_DBG("%02x %02x %02x %02x %02x %02x %02x %02x", - (*pRing ), *(pRing + 1), *(pRing + 2 ), *(pRing + 3 ), - *(pRing + 4 ), *(pRing + 5 ), *(pRing + 6 ), *(pRing + 7 ) ); - pRing = pRing + sizeof(uint64_t); - } - - } - while(0); -} -//------------------------------------------------------------------------- - -void RingBucket::dumpRings( ) -{ - std::map<RingID, RingName>::iterator it = iv_ringName.begin(); - uint32_t chipletNo = 0; - - do - { - if( SCAN_RING_NO_DEBUG == iv_debugMode ) - { - break; - } - - FAPI_INF("==================================================================================="); - FAPI_INF("==================================================================================="); - - if( iv_plat == PLAT_CME ) - { - FAPI_INF("---------------------------------CME Rings---------------------------------------"); - chipletNo = EC::g_ecData.iv_num_instance_rings_scan_addrs; - } - else if( iv_plat == PLAT_SGPE ) - { - FAPI_INF("---------------------------------SGPE Rings--------------------------------------"); - chipletNo = EQ::g_eqData.iv_num_instance_rings_scan_addrs; - } - else - { - FAPI_INF("---------------------------------Unknown Platform--------------------------------"); - } - - FAPI_INF("-------------------------------------------------------------------------------------"); - FAPI_INF("-------------------------------------------------------------------------------------"); - FAPI_INF("-------------------------------Common Rings------------------------------------------"); - FAPI_INF("Ring Name----------------------Offset----------------------------Size----------------"); - FAPI_INF("====================================================================================="); - FAPI_INF("====================================================================================="); - - for( uint16_t ringIndex = 0; ringIndex < iv_cmnRingMap.size(); - ringIndex++ ) - { - it = iv_ringName.find( iv_cmnRingMap[ringIndex].iv_ringId ); - - if( iv_ringName.end() != it ) - { - FAPI_INF("%s\t\t %08d ( 0x%08x )\t\t%08d ( 0x%08x )", (it->second).c_str(), - iv_cmnRingMap[ringIndex].iv_ringOffset, - iv_cmnRingMap[ringIndex].iv_ringOffset, - iv_cmnRingMap[ringIndex].iv_ringSize, - iv_cmnRingMap[ringIndex].iv_ringSize ); - } - } - - FAPI_INF("====================================================================================="); - FAPI_INF("====================================================================================="); - FAPI_INF("-------------------------------Instance Ring-----------------------------------------"); - FAPI_INF("Ring Name----------------------Offset-------------------------Size-------------------"); - - for( uint16_t ringIndex = 0; ringIndex < iv_instRingMap.size(); - ringIndex++ ) - { - uint32_t chipletIndex = ringIndex % chipletNo; - - if(( 0 == ringIndex ) || ( 0 == chipletIndex )) - { - FAPI_INF("=============================================================================="); - FAPI_INF("=============================================================================="); - FAPI_INF("\t\t%s ( %d )", ( iv_plat == PLAT_CME ) ? "Core" : "Cache", (ringIndex / chipletNo) ); - FAPI_INF("=============================================================================="); - FAPI_INF("=============================================================================="); - } - - it = iv_ringName.find( iv_instRingMap[ringIndex].iv_ringId ); - - if( iv_ringName.end() != it ) - { - FAPI_INF("%s\t %08d ( 0x%08x )\t\t%08d ( 0x%08x )", (it->second).c_str(), - iv_instRingMap[ringIndex].iv_ringOffset, - iv_instRingMap[ringIndex].iv_ringOffset, - iv_instRingMap[ringIndex].iv_ringSize, - iv_instRingMap[ringIndex].iv_ringSize ); - } - } - - FAPI_INF("================================================================================="); - FAPI_INF("================================================================================="); - } - while(0); -} - -//------------------------------------------------------------------------- -void RingBucket::dumpOverrideRings( ) -{ - std::map<RingID, RingName>::iterator it = iv_ringName.begin(); - - do - { - if( SCAN_RING_NO_DEBUG == iv_debugMode ) - { - break; - } - - FAPI_INF("==================================================================================="); - FAPI_INF("==================================================================================="); - - if( iv_plat == PLAT_CME ) - { - FAPI_INF("----------------------------------CME Ring Overrides---------------------------"); - } - else if( iv_plat == PLAT_SGPE ) - { - FAPI_INF("----------------------------------SGPE Rings Overrides-------------------------"); - } - else - { - FAPI_INF("----------------------------------Unknown Platform-----------------------------"); - } - - FAPI_INF("-----------------------------------------------------------------------------------"); - FAPI_INF("-----------------------------------------------------------------------------------"); - FAPI_INF("Ring Name----------------------Offset----------------------------Size--------------"); - FAPI_INF("==================================================================================="); - FAPI_INF("==================================================================================="); - - for( uint16_t ringIndex = 0; ringIndex < iv_cmnRingMap.size(); - ringIndex++ ) - { - it = iv_ringName.find( iv_cmnRingMap[ringIndex].iv_ringId ); - - if( iv_ringName.end() != it ) - { - FAPI_INF("%s\t %08d ( 0x%08x )\t\t%08d ( 0x%08x )", (it->second).c_str(), - iv_cmnRingMap[ringIndex].iv_ringOffset, - iv_cmnRingMap[ringIndex].iv_ringOffset, - iv_cmnRingMap[ringIndex].iv_ringSize, - iv_cmnRingMap[ringIndex].iv_ringSize ); - } - } - - FAPI_INF("==============================================================================="); - FAPI_INF("==============================================================================="); - - } - while(0); -} -//------------------------------------------------------------------------- - -P9FuncModel::P9FuncModel( ): - iv_funcCores(0), - iv_funcExes(0), - iv_funcQuads(0), - iv_ddLevel(0) -{ } -//------------------------------------------------------------------------- - -P9FuncModel::P9FuncModel( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP >& i_procTgt , uint8_t i_ddLevel ) -{ - iv_funcCores = 0; - iv_funcExes = 0; - iv_funcQuads = 0; - iv_ddLevel = i_ddLevel; - - auto l_core_functional_vector = - i_procTgt.getChildren<fapi2::TARGET_TYPE_CORE>(fapi2::TARGET_STATE_FUNCTIONAL); - uint8_t l_corePos = 0; - - for( auto it : l_core_functional_vector ) - { - FAPI_ATTR_GET( fapi2::ATTR_CHIP_UNIT_POS, it, l_corePos ); - FAPI_DBG("functional cores id %d", l_corePos ); - iv_funcCores = iv_funcCores | (1 << l_corePos ); - iv_funcExes = iv_funcExes | (1 << (l_corePos >> 1) ); - iv_funcQuads = iv_funcQuads | (1 << (l_corePos >> 2) ); - } - - FAPI_DBG("functional core 0x%08x, Ex 0x%08x quad 0x%08x", - iv_funcCores, iv_funcExes, iv_funcQuads ); -} - -//--------------------------------------------------------------------------- - -P9FuncModel::~P9FuncModel() -{ - FAPI_DBG("Destroyed P9FuncModel"); -} - -//--------------------------------------------------------------------------- - -bool P9FuncModel::isCoreFunctional( uint32_t i_corePos ) const -{ - return ( (iv_funcCores & ( 1 << i_corePos )) != 0 ); -} - -//------------------------------------------------------------------------- - -bool P9FuncModel::isExFunctional( uint32_t i_exPos ) const -{ - return ( (iv_funcExes & ( 1 << i_exPos )) != 0 ); -} - -//------------------------------------------------------------------------- - -bool P9FuncModel::isQuadFunctional( uint32_t i_quadPos ) const -{ - return ( (iv_funcQuads & ( 1 << i_quadPos )) != 0 ); -} - -//------------------------------------------------------------------------- -uint8_t P9FuncModel::getChipLevel() const -{ - return iv_ddLevel; -} - -} diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_start_cbs_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_start_cbs_errors.xml deleted file mode 100644 index 5d3080566..000000000 --- a/src/import/chips/p9/procedures/xml/error_info/p9_start_cbs_errors.xml +++ /dev/null @@ -1,136 +0,0 @@ -<!-- IBM_PROLOG_BEGIN_TAG --> -<!-- This is an automatically generated prolog. --> -<!-- --> -<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_start_cbs_errors.xml $ --> -<!-- --> -<!-- OpenPOWER HostBoot Project --> -<!-- --> -<!-- Contributors Listed Below - COPYRIGHT 2015,2016 --> -<!-- [+] International Business Machines Corp. --> -<!-- --> -<!-- --> -<!-- Licensed under the Apache License, Version 2.0 (the "License"); --> -<!-- you may not use this file except in compliance with the License. --> -<!-- You may obtain a copy of the License at --> -<!-- --> -<!-- http://www.apache.org/licenses/LICENSE-2.0 --> -<!-- --> -<!-- Unless required by applicable law or agreed to in writing, software --> -<!-- distributed under the License is distributed on an "AS IS" BASIS, --> -<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or --> -<!-- implied. See the License for the specific language governing --> -<!-- permissions and limitations under the License. --> -<!-- --> -<!-- IBM_PROLOG_END_TAG --> -<!-- This is an automatically generated file. --> -<!-- File: p9_start_cbs_errors.xml. --> -<!-- Halt codes for p9_start_cbs --> - -<hwpErrors> - <!-- ******************************************************************** --> - <hwpError> - <sbeError/> - <rc>RC_CBS_NOT_IN_IDLE_STATE</rc> - <description>CBS is not in IDLE state</description> - <collectFfdc>p9_pib2pcb_mux_seq, MASTER_CHIP_TARGET</collectFfdc> - <collectRegisterFfdc> - <id>ROOT_CTRL_REGISTERS_CFAM</id> - <target>MASTER_CHIP</target> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - </collectRegisterFfdc> - <collectRegisterFfdc> - <id>PERV_CTRL_REGISTERS_CFAM</id> - <target>MASTER_CHIP</target> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - </collectRegisterFfdc> - <collectRegisterFfdc> - <id>FSI2PIB_STATUS</id> - <target>MASTER_CHIP</target> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - </collectRegisterFfdc> - <collectRegisterFfdc> - <id>CBS_STATUS_REGISTERS</id> - <target>MASTER_CHIP</target> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - </collectRegisterFfdc> - <ffdc>CBS_CS_READ</ffdc> - <ffdc>CBS_CS_IDLE_VALUE</ffdc> - <ffdc>LOOP_COUNT</ffdc> - <ffdc>HW_DELAY</ffdc> - </hwpError> - <!-- ******************************************************************** --> - <hwpError> - <sbeError/> - <rc>RC_VDN_PGOOD_NOT_SET</rc> - <description>VDN_PGOOD not set to 1</description> - <collectFfdc>p9_pib2pcb_mux_seq, MASTER_CHIP</collectFfdc> - <collectRegisterFfdc> - <id>ROOT_CTRL_REGISTERS_CFAM</id> - <target>MASTER_CHIP</target> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - </collectRegisterFfdc> - <collectRegisterFfdc> - <id>PERV_CTRL_REGISTERS_CFAM</id> - <target>MASTER_CHIP</target> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - </collectRegisterFfdc> - <collectRegisterFfdc> - <id>FSI2PIB_STATUS</id> - <target>MASTER_CHIP</target> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - </collectRegisterFfdc> - <collectRegisterFfdc> - <id>CBS_STATUS_REGISTERS</id> - <target>MASTER_CHIP</target> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - </collectRegisterFfdc> - <ffdc>CBS_ENVSTAT_READ</ffdc> - </hwpError> - <!-- ******************************************************************** --> - <hwpError> - <sbeError/> - <rc>RC_VDD_NEST_OBSERVE_NOT_SET</rc> - <description>VDD bit not set</description> - <collectFfdc>p9_pib2pcb_mux_seq, MASTER_CHIP</collectFfdc> - <collectRegisterFfdc> - <id>ROOT_CTRL_REGISTERS_CFAM</id> - <target>MASTER_CHIP</target> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - </collectRegisterFfdc> - <collectRegisterFfdc> - <id>PERV_CTRL_REGISTERS_CFAM</id> - <target>MASTER_CHIP</target> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - </collectRegisterFfdc> - <collectRegisterFfdc> - <id>FSI2PIB_STATUS</id> - <target>MASTER_CHIP</target> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - </collectRegisterFfdc> - <collectRegisterFfdc> - <id>CBS_STATUS_REGISTERS</id> - <target>MASTER_CHIP</target> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - </collectRegisterFfdc> - <ffdc>FSI2PIB_STATUS_READ</ffdc> - </hwpError> - <!-- ******************************************************************** --> - <hwpError> - <rc>RC_COLLECT_CC_STATUS_REGISTERS</rc> - <description>Collect clock status registers on cbs fail</description> - <ffdc>UNIT_FFDC_DATA_SL</ffdc> - <ffdc>UNIT_FFDC_DATA_NSL</ffdc> - <ffdc>UNIT_FFDC_DATA_ARY</ffdc> - <ffdc>UNIT_FFDC_DATA_SCAN_REGION</ffdc> - <ffdc>UNIT_FFDC_DATA_CLK_REGION</ffdc> - </hwpError> - <!-- ******************************************************************** --> - <hwpError> - <rc>RC_OPCG_REGISTERS</rc> - <description>Collect opcg registers on cbs fail</description> - <ffdc>UNIT_FFDC_DATA_OPCG0</ffdc> - <ffdc>UNIT_FFDC_DATA_OPCG1</ffdc> - <ffdc>UNIT_FFDC_DATA_OPCG2</ffdc> - </hwpError> - <!-- ******************************************************************** --> -</hwpErrors> |
