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author | Andre Marin <aamarin@us.ibm.com> | 2018-11-02 08:33:30 -0500 |
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committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2018-11-27 10:14:19 -0600 |
commit | bafdb81a24b53c7c21e66d017face19c1aafdb0d (patch) | |
tree | 9e09a157f6701475ae4770a62fa8b72f3ce07141 | |
parent | 29cd96eae92f2de321a7b9b0cc1fc72625b160fe (diff) | |
download | talos-hostboot-bafdb81a24b53c7c21e66d017face19c1aafdb0d.tar.gz talos-hostboot-bafdb81a24b53c7c21e66d017face19c1aafdb0d.zip |
Add exp_draminit and fix data_structs constants
Change-Id: Ia5391859ff05d1ab777201153a413630516de589
Original-Change-Id: Ic8011ed9b6261ce2849b2c51f79c9533261222bf
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67837
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69089
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
5 files changed, 281 insertions, 0 deletions
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_draminit.C b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_draminit.C index 4a11c05cc..cc751ecd5 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_draminit.C +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_draminit.C @@ -22,3 +22,57 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ + +/// +/// @file exp_draminit.C +/// @brief Procedure definition to initialize DRAM +/// +// *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> +// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> +// *HWP Team: Memory +// *HWP Level: 2 +// *HWP Consumed by: FSP:HB + +#include <exp_inband.H> +#include <generic/memory/lib/utils/c_str.H> +#include <lib/exp_draminit_utils.H> + +/// +/// @brief Initializes DRAM +/// @param[in] i_target the controller +/// @return FAPI2_RC_SUCCESS iff ok +/// +fapi2::ReturnCode exp_draminit(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target) +{ + uint32_t l_crc = 0; + + user_input_msdg l_phy_params; + FAPI_TRY(mss::exp::setup_phy_params(i_target, l_phy_params), + "Failed setup_phy_params() for %s", mss::c_str(i_target)); + + // Copy the PHY initialization parameters into the internal buffer of Explorer + FAPI_TRY( mss::exp::ib::putUserInputMsdg(i_target, l_phy_params, l_crc), + "Failed putUserInputMsdg() for %s", mss::c_str(i_target) ); + + // Issue full boot mode cmd though EXP-FW REQ buffer + { + host_fw_command_struct l_cmd; + mss::exp::setup_cmd_params(l_crc, l_cmd); + FAPI_TRY( mss::exp::ib::putCMD(i_target, l_cmd), + "Failed putCMD() for %s", mss::c_str(i_target) ); + } + + // Read the response message from EXP-FW RESP buffer + { + host_fw_response_struct l_response; + FAPI_TRY( mss::exp::ib::getRSP(i_target, l_response), + "Failed getRSP() for %s", mss::c_str(i_target) ); + + // Check if cmd was successful + FAPI_TRY(mss::exp::check::response(i_target, l_response), + "Failed check::response() for %s", mss::c_str(i_target) ); + } + +fapi_try_exit: + return fapi2::current_err; +} diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_draminit.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_draminit.H index 850a4f7b3..cb4c009e2 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_draminit.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_draminit.H @@ -22,3 +22,34 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ + +/// +/// @file exp_draminit.H +/// @brief Procedure declaration to initialize DRAM +/// +// *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> +// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> +// *HWP Team: Memory +// *HWP Level: 2 +// *HWP Consumed by: FSP:HB + +#ifndef __MSS_EXP_DRAMINIT__ +#define __MSS_EXP_DRAMINIT__ + +#include <fapi2.H> + +// Required for Cronus +typedef fapi2::ReturnCode (*exp_draminit_FP_t) (const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>&); + +extern "C" +{ + +/// +/// @brief Initializes DRAM +/// @param[in] i_target the controller +/// @return FAPI2_RC_SUCCESS iff ok +/// + fapi2::ReturnCode exp_draminit(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target); + +}// extern C +#endif diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_draminit.mk b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_draminit.mk index f98eabff2..dd6f3e2a3 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_draminit.mk +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_draminit.mk @@ -22,3 +22,10 @@ # permissions and limitations under the License. # # IBM_PROLOG_END_TAG + +# Include the macros and things for MSS EXP procedures +-include 00exp_common.mk + +PROCEDURE=exp_draminit +$(eval $(call ADD_EXP_MEMORY_INCDIRS,$(PROCEDURE))) +$(call BUILD_PROCEDURE) diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_draminit_utils.C b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_draminit_utils.C index e6d39d8a5..3e97ba3b4 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_draminit_utils.C +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_draminit_utils.C @@ -22,3 +22,71 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ +/// +/// @file exp_draminit_utils.C +/// @brief Procedure definition to initialize DRAM +/// +// *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> +// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> +// *HWP Team: Memory +// *HWP Level: 2 +// *HWP Consumed by: FSP:HB + +#include <generic/memory/lib/utils/c_str.H> +#include <lib/exp_draminit_utils.H> + +namespace mss +{ +namespace exp +{ + +/// +/// @brief host_fw_command_struct structure setup +/// @param[in] i_cmd_data_crc the command data CRC +/// @param[out] o_cmd the command parameters to set +/// +void setup_cmd_params(const uint32_t i_cmd_data_crc, host_fw_command_struct& o_cmd) +{ + // Issue full boot mode cmd though EXP-FW REQ buffer + o_cmd.cmd_id = mss::exp::omi::FW_SPD_DATA_SET; + o_cmd.cmd_flags = 0; + + // TK - Fabricated value need to figure out if we'll be creating req_id tables + o_cmd.request_identifier = 0xBB; + o_cmd.cmd_length = 0; + o_cmd.cmd_crc = i_cmd_data_crc; + o_cmd.host_work_area = 0; + o_cmd.cmd_work_area = 0; + memset(o_cmd.padding, 0, sizeof(o_cmd.padding)); +} + +namespace check +{ + +/// +/// @brief Checks explorer response argument for a successful command +/// @param[in] i_target OCMB target +/// @param[in] i_rsp response command +/// @return FAPI2_RC_SUCCESS iff okay +/// +fapi2::ReturnCode response(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, + const host_fw_response_struct& i_rsp) +{ + // Check if cmd was successful + FAPI_ASSERT(i_rsp.response_argument[0] == omi::response_arg::SUCCESS, + fapi2::MSS_EXP_RSP_ARG_FAILED(). + set_TARGET(i_target). + set_RSP_ID(i_rsp.response_id). + set_ERROR_CODE(i_rsp.response_argument[1]), + "Failed to initialize the PHY for %s", mss::c_str(i_target)); + + return fapi2::FAPI2_RC_SUCCESS; + +fapi_try_exit: + return fapi2::current_err; +} + +}//check + +}// exp +}// mss diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_draminit_utils.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_draminit_utils.H index 43a7388ad..ca835cff2 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_draminit_utils.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_draminit_utils.H @@ -22,3 +22,124 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ + +/// +/// @file exp_draminit_utils.H +/// @brief Procedure definition to initialize DRAM +/// +// *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> +// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> +// *HWP Team: Memory +// *HWP Level: 2 +// *HWP Consumed by: FSP:HB + +#ifndef __MSS_EXP_DRAMINIT_UTILS__ +#define __MSS_EXP_DRAMINIT_UTILS__ + +#include <fapi2.H> +#include <lib/shared/exp_consts.H> +#include <exp_data_structs.H> + +namespace mss +{ +namespace exp +{ + +/// +/// @brief host_fw_command_struct structure setup +/// @param[in] i_cmd_data_crc the command data CRC +/// @param[out] o_cmd the command parameters to set +/// +void setup_cmd_params(const uint32_t i_cmd_data_crc, host_fw_command_struct& o_cmd); + +/// +/// @brief user_input_msdg structure setup +/// @tparam T the fapi2 TargetType +/// @param[in] i_target the fapi2 target +/// @param[out] o_param +/// @return FAPI2_RC_SUCCESS iff okay +/// +template < fapi2::TargetType T > +fapi2::ReturnCode setup_phy_params(const fapi2::Target<T>& i_target, + user_input_msdg& o_params) +{ + // TODO: exp_mss_draminit VPO prep: Replace hardcode with attr derived data + o_params.DimmType = 0; + o_params.CsPresent = 0x1; + o_params.DramDataWidth = 8; + o_params.Height3DS = 0; + o_params.ActiveDBYTE = 0; + o_params.ActiveNibble = 0; + o_params.AddrMirror = 0; + o_params.ColumnAddrWidth = 10; + o_params.RowAddrWidth = 16; + o_params.SpdCLSupported = 0x002BFFFC; + o_params.SpdtAAmin = 12500; + o_params.Rank4Mode = 0; + o_params.DDPCompatible = 0; + o_params.TSV8HSupport = 0; + o_params.MRAMSupport = 0; + o_params.NumPStates = 1; + o_params.Frequency[0] = 1600; + + // PHY parameters are fabricated and not relevant for emulation + o_params.PhyOdtImpedance[0] = 0; + o_params.PhyDrvImpedancePU[0] = 240; + o_params.PhySlewRate[0] = 0; + o_params.ATxImpedance = 120; + o_params.ATxSlewRate = 0; + o_params.CKTxImpedance = 120; + o_params.CKTxSlewRate = 0; + o_params.AlertOdtImpedance = 0; + o_params.DramRttNomR0[0] = 0; + o_params.DramRttNomR1[0] = 0; + o_params.DramRttNomR2[0] = 0; + o_params.DramRttNomR3[0] = 0; + o_params.DramRttWrR0[0] = 0; + o_params.DramRttWrR1[0] = 0; + o_params.DramRttWrR2[0] = 0; + o_params.DramRttWrR3[0] = 0; + o_params.DramRttParkR0[0] = 0; + o_params.DramRttParkR1[0] = 0; + o_params.DramRttParkR2[0] = 0; + o_params.DramRttParkR3[0] = 0; + o_params.DramDic[0] = 48; + o_params.DramWritePreamble[0] = 0; + o_params.DramReadPreamble[0] = 0; + o_params.PhyEqualization = 0; + o_params.InitVrefDQ[0] = 0x9; + o_params.InitPhyVref[0] = 0x60; + o_params.OdtWrMapCs[0] = 0; + o_params.OdtRdMapCs[0] = 0; + o_params.Geardown[0] = 0; + o_params.CALatencyAdder[0] = 0; + o_params.BistCALMode[0] = 0; + o_params.BistCAParityLatency[0] = 0; + o_params.RcdDic[0] = 0; + o_params.RcdVoltageCtrl[0] = 0; + o_params.RcdIBTCtrl = 0; + o_params.RcdDBDic = 0; + o_params.RcdSlewRate = 0; + o_params.EmulationSupport = 1; + + return fapi2::FAPI2_RC_SUCCESS; +} + +namespace check +{ + +/// +/// @brief Checks explorer response argument for a successful command +/// @param[in] i_target OCMB target +/// @param[in] i_rsp response command +/// @return FAPI2_RC_SUCCESS iff okay +/// +fapi2::ReturnCode response(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, + const host_fw_response_struct& i_rsp); + +}//check + +}// exp +}// mss + +#endif |