Update Bootloader to handle moving the TOC of PNOR around

Moved 1 of the PNOR TOCs from 0x8000 to TOP_OF_FLASH - 64KB. Updated bootloader and pnor access code to handle new toc location. Update the defaultPnorLayout to reflect these changes Also added a FSP default pnor xml that will generate a 128 MB image for FSP boxes to use. RTC: 154286 Change-Id: I0253590299ff9714b0d5ab12a02ac9d653b115fa Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27461 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
author: crgeddes <crgeddes@us.ibm.com> 2016-07-26 11:40:30 -0500
committer: William G. Hoffa <wghoffa@us.ibm.com> 2016-08-25 14:50:15 -0400
commit: b0bf18528f97ecef49ff27fd4715b2d2a50ad5ba (patch)
tree: c62489d62c413e523e72e3a5559d629165078c08
parent: 1400bea75a6bbd2083a8b39095470102479c8514 (diff)
download: talos-hostboot-b0bf18528f97ecef49ff27fd4715b2d2a50ad5ba.tar.gz
talos-hostboot-b0bf18528f97ecef49ff27fd4715b2d2a50ad5ba.zip
10 files changed, 361 insertions, 124 deletions
diff --git a/src/bootloader/bl_pnorAccess.C b/src/bootloader/bl_pnorAccess.C
index 046a4bf0a..991011872 100644
--- a/src/bootloader/bl_pnorAccess.C
+++ b/src/bootloader/bl_pnorAccess.C
@@ -40,9 +40,10 @@ extern const char* cv_EYECATCHER[];
          also returns a SectionData_t struct if the toc was valid
 */
 void bl_pnorAccess::readTOC(uint8_t i_tocBuffer[PNOR::TOC_SIZE],
-                            uint32_t & o_errCode,
+                            uint32_t& o_errCode,
                             PNOR::SectionData_t * o_TOC,
-                            uint64_t i_baseAddr)
+                            uint64_t& o_pnorStart,
+                            uint64_t i_pnorEnd)
 {
     do
     {
@@ -57,6 +58,10 @@ void bl_pnorAccess::readTOC(uint8_t i_tocBuffer[PNOR::TOC_SIZE],
         //make sure that the buffer is not null
         PNOR::checkForNullBuffer(i_tocBuffer, o_errCode, l_ffs_hdr);
 
+        //Subtract the size of the pnor from the end address to find the start
+        o_pnorStart = i_pnorEnd -
+                        (l_ffs_hdr->block_size * l_ffs_hdr->block_count) + 1;
+
         if(o_errCode != PNOR::NO_ERROR)
         {
             BOOTLOADER_TRACE_W_BRK(BTLDR_TRC_PA_READTOC_CHKNULLBUFFER_NULL);
@@ -109,8 +114,9 @@ void bl_pnorAccess::readTOC(uint8_t i_tocBuffer[PNOR::TOC_SIZE],
     } while(0);
 }
 
-void bl_pnorAccess::findTOC(uint64_t i_pnorBase, PNOR::SectionData_t * o_TOC,
-                            uint32_t& o_errCode,  uint8_t& o_tocUsed)
+void bl_pnorAccess::findTOC(uint64_t i_pnorEnd, PNOR::SectionData_t * o_TOC,
+                            uint32_t& o_errCode,  uint8_t& o_tocUsed,
+                            uint64_t& o_pnorStart)
 {
     uint8_t *l_tocBuffer = Bootloader::g_blScratchSpace;
     do
@@ -119,14 +125,15 @@ void bl_pnorAccess::findTOC(uint64_t i_pnorBase, PNOR::SectionData_t * o_TOC,
         o_errCode = 0;
         o_tocUsed = 0;
         //Copy Table of Contents from PNOR flash to a local buffer
-        Bootloader::handleMMIO(i_pnorBase,
+        //The first TOC is 2 TOC sizes back from the end of the flash (+ 1)
+        Bootloader::handleMMIO(i_pnorEnd - PNOR::TOC_OFFSET_FROM_TOP_OF_FLASH,
                     reinterpret_cast<uint64_t>(l_tocBuffer),
                     (PNOR::TOC_SIZE),
                     Bootloader::BYTESIZE);
 
         BOOTLOADER_TRACE(BTLDR_TRC_PA_FINDTOC_TOC1_HANDLEMMIO_RTN);
 
-        readTOC(l_tocBuffer, o_errCode, o_TOC, i_pnorBase);
+        readTOC(l_tocBuffer, o_errCode, o_TOC, o_pnorStart, i_pnorEnd);
 
         if(o_errCode == PNOR::NO_ERROR)
         {
@@ -136,13 +143,14 @@ void bl_pnorAccess::findTOC(uint64_t i_pnorBase, PNOR::SectionData_t * o_TOC,
         }
         else
         {
-            Bootloader::handleMMIO(i_pnorBase + PNOR::BACKUP_TOC_OFFSET,
+            //If the first toc was invalid, look for the backup in the start
+            Bootloader::handleMMIO(o_pnorStart,
                               reinterpret_cast<uint64_t>(l_tocBuffer),
                               (PNOR::TOC_SIZE),
                               Bootloader::BYTESIZE);
 
             o_errCode = 0;
-            readTOC(l_tocBuffer, o_errCode, o_TOC, i_pnorBase);
+            readTOC(l_tocBuffer, o_errCode, o_TOC, o_pnorStart, i_pnorEnd);
             if(o_errCode == PNOR::NO_ERROR)
             {
                 o_tocUsed = 1;
@@ -158,17 +166,19 @@ void bl_pnorAccess::findTOC(uint64_t i_pnorBase, PNOR::SectionData_t * o_TOC,
 /**
  * @brief Get the hostboot base image
  */
-void bl_pnorAccess::getHBBSection(uint64_t i_pnorStart,
+void bl_pnorAccess::getHBBSection(uint64_t i_pnorEnd,
                                   PNOR::SectionData_t& o_hbbSection,
                                   uint32_t& o_errCode,
-                                  uint8_t& o_tocUsed)
+                                  uint8_t& o_tocUsed,
+                                  uint64_t& o_pnorStart)
 {
     BOOTLOADER_TRACE(BTLDR_TRC_PA_GETHBBSECTION_START);
     do
     {
         PNOR::SectionData_t l_TOC[PNOR::NUM_SECTIONS];
 
-        findTOC(i_pnorStart, l_TOC, o_errCode, o_tocUsed);
+        findTOC(i_pnorEnd, l_TOC, o_errCode, o_tocUsed, o_pnorStart);
+
         if(o_errCode != PNOR::NO_ERROR)
         {
             BOOTLOADER_TRACE_W_BRK(BTLDR_TRC_PA_GETHBBSECTION_FINDTOC_ERR);
diff --git a/src/bootloader/bootloader.C b/src/bootloader/bootloader.C
index 0158f211a..ec9b12c4a 100644
--- a/src/bootloader/bootloader.C
+++ b/src/bootloader/bootloader.C
@@ -76,17 +76,25 @@ namespace Bootloader{
 
         // Set variables needed for getting location of HB base code
         // @TODO RTC:138268 Support multiple sides of PNOR in bootloader
-        uint64_t l_pnorStart = LPC::LPC_PHYS_BASE + LPC::LPCHC_FW_SPACE
-                             + PNOR::LPC_SFC_MMIO_OFFSET;
+
+        //pnorEnd is the end of flash, which is base of lpc, plus
+        //the offset of the FW space, plus the TOP memory address in FW space
+        uint64_t l_pnorEnd = LPC::LPC_PHYS_BASE + LPC::LPCHC_FW_SPACE
+        + PNOR::LPC_TOP_OF_FLASH_OFFSET;
+
+        //We dont know what the start of pnor is because we dont know the size
+        uint64_t l_pnorStart = 0;
+
         uint32_t l_errCode = PNOR::NO_ERROR;
         uint8_t l_tocUsed = 0;
 
         // Get location of HB base code in PNOR from TOC
         // @TODO RTC:138268 Support multiple sides of PNOR in bootloader
-        bl_pnorAccess::getHBBSection(l_pnorStart,
+        bl_pnorAccess::getHBBSection(l_pnorEnd,
                                      bootloader_hbbSection,
                                      l_errCode,
-                                     l_tocUsed);
+                                     l_tocUsed,
+                                     l_pnorStart);
         BOOTLOADER_TRACE(BTLDR_TRC_MAIN_GETHBBSECTION_RTN );
 
         if(PNOR::NO_ERROR == l_errCode)
diff --git a/src/build/buildpnor/buildpnor.pl b/src/build/buildpnor/buildpnor.pl
index 25f6f1959..a3693396c 100755
--- a/src/build/buildpnor/buildpnor.pl
+++ b/src/build/buildpnor/buildpnor.pl
@@ -201,70 +201,22 @@ sub loadPnorLayout
     #parse the input XML file
     my $xs = new XML::Simple(keyattr=>[], forcearray => 1);
     my $xml = $xs->XMLin($i_pnorFile);
-
-    #Iterate over the <section> elements.
-    foreach my $sectionEl (@{$xml->{section}})
-    {
-        my $description = $sectionEl->{description}[0];
-        my $eyeCatch = $sectionEl->{eyeCatch}[0];
-        my $physicalOffset = $sectionEl->{physicalOffset}[0];
-        my $physicalRegionSize = $sectionEl->{physicalRegionSize}[0];
-        my $side = $sectionEl->{side}[0];
-        my $testonly = $sectionEl->{testonly}[0];
-        my $ecc = (exists $sectionEl->{ecc} ? "yes" : "no");
-        my $sha512Version = (exists $sectionEl->{sha512Version} ? "yes" : "no");
-        my $sha512perEC = (exists $sectionEl->{sha512perEC} ? "yes" : "no");
-        my $preserved = (exists $sectionEl->{preserved} ? "yes" : "no");
-        my $readOnly = (exists $sectionEl->{readOnly} ? "yes" : "no");
-        if (($testRun == 0) && ($sectionEl->{testonly}[0] eq "yes"))
-        {
-            next;
-        }
-
-        trace(3, "$this_func: description = $description, eyeCatch=$eyeCatch, physicalOffset = $physicalOffset, physicalRegionSize=$physicalRegionSize, side=$side");
-
-        $physicalOffset = getNumber($physicalOffset);
-        $physicalRegionSize = getNumber($physicalRegionSize);
-
-        $$i_pnorLayoutRef{sections}{$physicalOffset}{description} = $description;
-        $$i_pnorLayoutRef{sections}{$physicalOffset}{eyeCatch} = $eyeCatch;
-        $$i_pnorLayoutRef{sections}{$physicalOffset}{physicalOffset} = $physicalOffset;
-        $$i_pnorLayoutRef{sections}{$physicalOffset}{physicalRegionSize} = $physicalRegionSize;
-        $$i_pnorLayoutRef{sections}{$physicalOffset}{side} = $side;
-        $$i_pnorLayoutRef{sections}{$physicalOffset}{ecc} = $ecc;
-        $$i_pnorLayoutRef{sections}{$physicalOffset}{sha512Version} = $sha512Version;
-        $$i_pnorLayoutRef{sections}{$physicalOffset}{sha512perEC} = $sha512perEC;
-        $$i_pnorLayoutRef{sections}{$physicalOffset}{preserved} = $preserved;
-        $$i_pnorLayoutRef{sections}{$physicalOffset}{readOnly} = $readOnly;
-
-        #store the physical offsets of each section in a hash, so, it is easy
-        #to search physicalOffsets based on the name of the section (eyecatch)
-        if ($side eq "sideless")
-        {
-            foreach my $metadata (@{$xml->{metadata}})
-            {
-                foreach my $sides (@{$metadata->{side}})
-                {
-                    $$i_physicalOffsets{side}{$sides->{id}[0]}{eyecatch}{$eyeCatch} = $physicalOffset;
-                }
-            }
-        }
-        else
-        {
-            $$i_physicalOffsets{side}{$side}{eyecatch}{$eyeCatch} = $physicalOffset;
-        }
-    }
+    my $imageSize = 0;
+    my $chipSize = 0;
     # Save the metadata - imageSize, blockSize, toc Information etc.
     foreach my $metadataEl (@{$xml->{metadata}})
     {
         # Get meta data
-        my $imageSize   = $metadataEl->{imageSize}[0];
+        $imageSize   = $metadataEl->{imageSize}[0];
+        $chipSize    = $metadataEl->{chipSize}[0];
         my $blockSize   = $metadataEl->{blockSize}[0];
         my $tocSize     = $metadataEl->{tocSize}[0];
         my $arrangement = $metadataEl->{arrangement}[0];
+        $chipSize       = getNumber($chipSize);
         $imageSize      = getNumber($imageSize);
         $blockSize      = getNumber($blockSize);
         $tocSize        = getNumber($tocSize);
+        $$i_pnorLayoutRef{metadata}{chipSize}    = $chipSize;
         $$i_pnorLayoutRef{metadata}{imageSize}   = $imageSize;
         $$i_pnorLayoutRef{metadata}{blockSize}   = $blockSize;
         $$i_pnorLayoutRef{metadata}{tocSize}     = $tocSize;
@@ -280,7 +232,8 @@ sub loadPnorLayout
         #
         #Arrangement A-B-D means that the layout had Primary TOC (A), then backup TOC (B), then Data (pnor section information).
         #Similaryly, arrangement A-D-B means that primary toc is followed by the data (section information) and then
-        #the backup TOC.
+        #the backup TOC. In order for the parsing tools to find the TOC, the TOCs must be at TOP_OF_FLASH-(2) * TOC_SIZE
+        # and the other at 0x0 of flash memory.
         if ($arrangement eq "A-B-D")
         {
             my $count = 0;
@@ -301,18 +254,22 @@ sub loadPnorLayout
         }
         elsif ($arrangement eq "A-D-B")
         {
+            my $count = 0;
             foreach my $side (@{$metadataEl->{side}})
             {
                 my $golden     = (exists $side->{golden} ? "yes" : "no");
                 my $sideId     = $side->{id}[0];
-                my $hbbAddr    = $$i_physicalOffsets{side}{$sideId}{eyecatch}{"HBB"};
-                my $primaryTOC = align_down($hbbAddr, $sideSize);
-                my $backupTOC  = align_up($hbbAddr, $sideSize) - $tocSize;
+
+                #Leave 1 block sized pad because the top addr of flash special
+                # and simics broke we had the toc touching it
+                my $primaryTOC = ($sideSize)*($count + 1) - ($tocSize + $blockSize) ;
+                my $backupTOC  = ($sideSize)*($count);
 
                 $$i_pnorLayoutRef{metadata}{sides}{$sideId}{toc}{primary} = $primaryTOC;
                 $$i_pnorLayoutRef{metadata}{sides}{$sideId}{toc}{backup}  = $backupTOC;
                 $$i_pnorLayoutRef{metadata}{sides}{$sideId}{golden}       = $golden;
-                trace(1, "A-D-B: side:$sideId HBB:$hbbAddr, primaryTOC:$primaryTOC, backupTOC:$backupTOC, golden: $golden");
+                $count = $count + 1;
+                trace(1, "A-D-B: side:$sideId, primaryTOC:$primaryTOC, backupTOC:$backupTOC, golden: $golden");
             }
         }
         else
@@ -320,6 +277,65 @@ sub loadPnorLayout
             trace(0, "Arrangement:$arrangement is not supported");
             exit(1);
         }
+
+        #Iterate over the <section> elements.
+        foreach my $sectionEl (@{$xml->{section}})
+        {
+            my $description = $sectionEl->{description}[0];
+            my $eyeCatch = $sectionEl->{eyeCatch}[0];
+            my $physicalOffset = $sectionEl->{physicalOffset}[0];
+            my $physicalRegionSize = $sectionEl->{physicalRegionSize}[0];
+            my $side = $sectionEl->{side}[0];
+            my $testonly = $sectionEl->{testonly}[0];
+            my $ecc = (exists $sectionEl->{ecc} ? "yes" : "no");
+            my $sha512Version = (exists $sectionEl->{sha512Version} ? "yes" : "no");
+            my $sha512perEC = (exists $sectionEl->{sha512perEC} ? "yes" : "no");
+            my $preserved = (exists $sectionEl->{preserved} ? "yes" : "no");
+            my $readOnly = (exists $sectionEl->{readOnly} ? "yes" : "no");
+            if (($testRun == 0) && ($sectionEl->{testonly}[0] eq "yes"))
+            {
+                next;
+            }
+
+            trace(3, "$this_func: description = $description, eyeCatch=$eyeCatch, physicalOffset = $physicalOffset, physicalRegionSize=$physicalRegionSize, side=$side");
+
+            $physicalOffset = getNumber($physicalOffset);
+            $physicalRegionSize = getNumber($physicalRegionSize);
+
+            if($physicalRegionSize  + $physicalOffset > $imageSize)
+            {
+                die "ERROR: $this_func: Image size ($imageSize) smaller than $eyeCatch's offset + $eyeCatch's size (".($physicalOffset + $physicalRegionSize)."). Aborting! ";
+            }
+
+            $$i_pnorLayoutRef{sections}{$physicalOffset}{description} = $description;
+            $$i_pnorLayoutRef{sections}{$physicalOffset}{eyeCatch} = $eyeCatch;
+            $$i_pnorLayoutRef{sections}{$physicalOffset}{physicalOffset} = $physicalOffset;
+            $$i_pnorLayoutRef{sections}{$physicalOffset}{physicalRegionSize} = $physicalRegionSize;
+            $$i_pnorLayoutRef{sections}{$physicalOffset}{side} = $side;
+            $$i_pnorLayoutRef{sections}{$physicalOffset}{ecc} = $ecc;
+            $$i_pnorLayoutRef{sections}{$physicalOffset}{sha512Version} = $sha512Version;
+            $$i_pnorLayoutRef{sections}{$physicalOffset}{sha512perEC} = $sha512perEC;
+            $$i_pnorLayoutRef{sections}{$physicalOffset}{preserved} = $preserved;
+            $$i_pnorLayoutRef{sections}{$physicalOffset}{readOnly} = $readOnly;
+
+            #store the physical offsets of each section in a hash, so, it is easy
+            #to search physicalOffsets based on the name of the section (eyecatch)
+            if ($side eq "sideless")
+            {
+                foreach my $metadata (@{$xml->{metadata}})
+                {
+                    foreach my $sides (@{$metadata->{side}})
+                    {
+                        $$i_physicalOffsets{side}{$sides->{id}[0]}{eyecatch}{$eyeCatch} = $physicalOffset;
+                    }
+                }
+            }
+            else
+            {
+                $$i_physicalOffsets{side}{$side}{eyecatch}{$eyeCatch} = $physicalOffset;
+            }
+        }
+
     }
     return 0;
 }
@@ -339,6 +355,7 @@ sub createPnorImg
     my $blockSize = $$i_pnorLayoutRef{metadata}{blockSize};
 
     #Get size of image in blocks
+    my $chipSize = $$i_pnorLayoutRef{metadata}{chipSize};
     my $imageSize = $$i_pnorLayoutRef{metadata}{imageSize};
     my $blockCount = $imageSize/$blockSize;
     if ($blockCount != int($blockCount))
@@ -347,8 +364,8 @@ sub createPnorImg
 
     }
     #f{fs,part} --create tuleta.pnor --partition-offset 0 --size 8MiB --block 4KiB --force
-    trace(2, "$g_fpartCmd --target $i_pnorBinName --partition-offset $i_offset --create --size $imageSize --block $blockSize --force");
-    system("$g_fpartCmd --target $i_pnorBinName --partition-offset $i_offset --create --size $imageSize --block $blockSize --force");
+    trace(2, "$g_fpartCmd --target $i_pnorBinName --partition-offset $i_offset --create --size $chipSize --block $blockSize --force");
+    system("$g_fpartCmd --target $i_pnorBinName --partition-offset $i_offset --create --size $chipSize --block $blockSize --force");
     die "ERROR: $this_func: Call to creating image failed. Aborting!" if($?);
 }
 
@@ -735,6 +752,8 @@ sub fillPnorImage
     my $key;
     my $other_side = getOtherSide($side);
 
+    my $imageSize =  $$i_pnorLayoutRef{metadata}{imageSize};
+
     trace(1, "fillPnorImage:: $offset");
     #key is the physical offset into the file, however don't need to sort
     #since FFS allows populating partitions in any order
@@ -769,7 +788,7 @@ sub fillPnorImage
             }
             trace(5, "$this_func: populating section $sideInfo:$eyeCatch, filename=$inputFile");
             #fcp --target tuleta.pnor --partition-offset 0 --name HBI --write hostboot_extended.bin
-            system("$g_fcpCmd $inputFile $i_pnorBinName:$eyeCatch --offset $offset --write --buffer 0x40000000");
+            system("$g_fcpCmd $inputFile $i_pnorBinName:$eyeCatch --offset $offset --write --buffer $imageSize");
             die "ERROR: $this_func: Call to fcp adding data to partition $eyeCatch failed. Aborting!" if($?);
          }
      }
diff --git a/src/build/buildpnor/defaultPnorLayout.xml b/src/build/buildpnor/defaultPnorLayout.xml
index ccc84fece..04c347ff1 100644
--- a/src/build/buildpnor/defaultPnorLayout.xml
+++ b/src/build/buildpnor/defaultPnorLayout.xml
@@ -25,6 +25,7 @@
 <!--
 Layout Description
 <metadata> Element -> Contains high-level information about the PNOR layout.
+    <chipSize>     -> Size of the chip that the pnor image will reside on
     <imageSize>    -> Size of PNOR image in bytes.
     <blockSize>    -> size of erase blocks in bytes.
     <tocSize>      -> size of each partition table
@@ -65,21 +66,31 @@ Layout Description
 <pnor>
     <metadata>
         <imageSize>0x4000000</imageSize>
+        <chipSize>0x4000000</chipSize>
         <blockSize>0x1000</blockSize>
         <tocSize>0x8000</tocSize>
         <!--TODO: RTC 123734 - remove side offsets once hwsv implements new
         layout-->
-        <sideAOffset>0x0</sideAOffset>
-        <sideBOffset>0x8000</sideBOffset>
-        <arrangement>A-B-D</arrangement>
+        <sideAOffset>0x3FF0000</sideAOffset>
+        <sideBOffset>0x0</sideBOffset>
+        <arrangement>A-D-B</arrangement>
         <side>
             <id>B</id>
         </side>
     </metadata>
     <section>
+        <description>Hostboot Base (576K)</description>
+        <eyeCatch>HBB</eyeCatch>
+        <physicalOffset>0x8000</physicalOffset>
+        <physicalRegionSize>0x90000</physicalRegionSize>
+        <sha512Version/>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
         <description>Hostboot Error Logs (144K)</description>
         <eyeCatch>HBEL</eyeCatch>
-        <physicalOffset>0x10000</physicalOffset>
+        <physicalOffset>0x98000</physicalOffset>
         <physicalRegionSize>0x24000</physicalRegionSize>
         <side>sideless</side>
         <ecc/>
@@ -87,7 +98,7 @@ Layout Description
     <section>
         <description>Guard Data (20K)</description>
         <eyeCatch>GUARD</eyeCatch>
-        <physicalOffset>0x58000</physicalOffset>
+        <physicalOffset>0xBC000</physicalOffset>
         <physicalRegionSize>0x5000</physicalRegionSize>
         <side>sideless</side>
         <ecc/>
@@ -95,7 +106,7 @@ Layout Description
     <section>
         <description>Hostboot Data (1.125M)</description>
         <eyeCatch>HBD</eyeCatch>
-        <physicalOffset>0x5D000</physicalOffset>
+        <physicalOffset>0xC1000</physicalOffset>
         <physicalRegionSize>0x120000</physicalRegionSize>
         <sha512Version/>
         <side>sideless</side>
@@ -105,7 +116,7 @@ Layout Description
         <description>DIMM JEDEC (288K)</description>
         <eyeCatch>DJVPD</eyeCatch>
         <!--NOTE: MUST update standalone.simics if offset changes -->
-         <physicalOffset>0x17D000</physicalOffset>
+         <physicalOffset>0x1E1000</physicalOffset>
         <physicalRegionSize>0x48000</physicalRegionSize>
         <side>sideless</side>
         <ecc/>
@@ -114,7 +125,7 @@ Layout Description
         <description>Module VPD (576K)</description>
         <eyeCatch>MVPD</eyeCatch>
         <!--NOTE: MUST update standalone.simics if offset changes -->
-        <physicalOffset>0x1C5000</physicalOffset>
+        <physicalOffset>0x229000</physicalOffset>
         <physicalRegionSize>0x90000</physicalRegionSize>
         <side>sideless</side>
         <ecc/>
@@ -123,7 +134,7 @@ Layout Description
         <description>Centaur VPD (288K)</description>
         <eyeCatch>CVPD</eyeCatch>
         <!--NOTE: MUST update standalone.simics if offset changes -->
-        <physicalOffset>0x255000</physicalOffset>
+        <physicalOffset>0x2B9000</physicalOffset>
         <physicalRegionSize>0x48000</physicalRegionSize>
         <side>sideless</side>
         <ecc/>
@@ -131,7 +142,7 @@ Layout Description
     <section>
         <description>Hostboot Extended image (11MB w/o ECC)</description>
         <eyeCatch>HBI</eyeCatch>
-        <physicalOffset>0x29D000</physicalOffset>
+        <physicalOffset>0x301000</physicalOffset>
         <physicalRegionSize>0xC60000</physicalRegionSize>
         <sha512Version/>
         <side>sideless</side>
@@ -151,7 +162,7 @@ Layout Description
     <section>
         <description>SBE-IPL (Staging Area) (288K)</description>
         <eyeCatch>SBE</eyeCatch>
-        <physicalOffset>0xEFD000</physicalOffset>
+        <physicalOffset>0xF61000</physicalOffset>
         <physicalRegionSize>0x48000</physicalRegionSize>
         <sha512perEC/>
         <side>sideless</side>
@@ -160,7 +171,7 @@ Layout Description
     <section>
         <description>HCODE Ref Image (1.125MB)</description>
         <eyeCatch>HCODE</eyeCatch>
-        <physicalOffset>0xF45000</physicalOffset>
+        <physicalOffset>0xFA9000</physicalOffset>
         <physicalRegionSize>0x120000</physicalRegionSize>
         <sha512Version/>
         <side>sideless</side>
@@ -169,7 +180,7 @@ Layout Description
     <section>
         <description>Hostboot Runtime Services for Sapphire (4.5MB)</description>
         <eyeCatch>HBRT</eyeCatch>
-        <physicalOffset>0x1065000</physicalOffset>
+        <physicalOffset>0x10C9000</physicalOffset>
         <physicalRegionSize>0x480000</physicalRegionSize>
         <sha512Version/>
         <side>sideless</side>
@@ -178,7 +189,7 @@ Layout Description
     <section>
         <description>Payload (21.375MB)</description>
         <eyeCatch>PAYLOAD</eyeCatch>
-        <physicalOffset>0x14E5000</physicalOffset>
+        <physicalOffset>0x1549000</physicalOffset>
         <physicalRegionSize>0x1560000</physicalRegionSize>
         <side>sideless</side>
         <ecc/>
@@ -186,7 +197,7 @@ Layout Description
     <section>
         <description>Special PNOR Test Space (36K)</description>
         <eyeCatch>TEST</eyeCatch>
-        <physicalOffset>0x2A45000</physicalOffset>
+        <physicalOffset>0x2AA9000</physicalOffset>
         <physicalRegionSize>0x9000</physicalRegionSize>
         <testonly/>
         <side>sideless</side>
@@ -195,7 +206,7 @@ Layout Description
     <section>
         <description>Special PNOR Test Space (36K)</description>
         <eyeCatch>TESTRO</eyeCatch>
-        <physicalOffset>0x2A4E000</physicalOffset>
+        <physicalOffset>0x2AB2000</physicalOffset>
         <physicalRegionSize>0x9000</physicalRegionSize>
         <side>sideless</side>
         <testonly/>
@@ -206,27 +217,15 @@ Layout Description
     <section>
         <description>Hostboot Bootloader (22.5K)</description>
         <eyeCatch>HBBL</eyeCatch>
-        <physicalOffset>0x2A57000</physicalOffset>
+        <physicalOffset>0x2ABB000</physicalOffset>
         <physicalRegionSize>0x6000</physicalRegionSize>
         <side>sideless</side>
         <ecc/>
     </section>
     <section>
-        <description>Hostboot Base (576K)</description>
-        <!--NOTE: MUST update standalone.simics if offset changes -->
-        <!--NOTE: HBB must be at pnorSize-0x99000 for a new proc
-                  part to be bootable -->
-        <eyeCatch>HBB</eyeCatch>
-        <physicalOffset>0x3F67000</physicalOffset>
-        <physicalRegionSize>0x90000</physicalRegionSize>
-        <sha512Version/>
-        <side>sideless</side>
-        <ecc/>
-    </section>
-    <section>
         <description>Global Data (36K)</description>
         <eyeCatch>GLOBAL</eyeCatch>
-        <physicalOffset>0x3FF7000</physicalOffset>
+        <physicalOffset>0x2AC1000</physicalOffset>
         <physicalRegionSize>0x9000</physicalRegionSize>
         <side>sideless</side>
         <ecc/>
diff --git a/src/build/buildpnor/pnorLayoutFSP.xml b/src/build/buildpnor/pnorLayoutFSP.xml
new file mode 100644
index 000000000..35a0195ab
--- /dev/null
+++ b/src/build/buildpnor/pnorLayoutFSP.xml
@@ -0,0 +1,197 @@
+<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
+<!-- This is an automatically generated prolog.                             -->
+<!--                                                                        -->
+<!-- $Source: src/build/buildpnor/pnorLayoutFSP.xml $                       -->
+<!--                                                                        -->
+<!-- OpenPOWER HostBoot Project                                             -->
+<!--                                                                        -->
+<!-- Contributors Listed Below - COPYRIGHT 2012,2016                        -->
+<!-- [+] International Business Machines Corp.                              -->
+<!--                                                                        -->
+<!--                                                                        -->
+<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
+<!-- you may not use this file except in compliance with the License.       -->
+<!-- You may obtain a copy of the License at                                -->
+<!--                                                                        -->
+<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
+<!--                                                                        -->
+<!-- Unless required by applicable law or agreed to in writing, software    -->
+<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
+<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
+<!-- implied. See the License for the specific language governing           -->
+<!-- permissions and limitations under the License.                         -->
+<!--                                                                        -->
+<!-- IBM_PROLOG_END_TAG                                                     -->
+<!--
+NOTE: This layout describes the standard PNOR layout for all P9 FSP systems
+Layout Description
+<metadata> Element -> Contains high-level information about the PNOR layout.
+    <imageSize>    -> Size of PNOR image in bytes.
+    <chipSize>     -> Size of the chip that the pnor image will reside on
+    <blockSize>    -> size of erase blocks in bytes.
+    <tocSize>      -> size of each partition table
+    <!- TODO:RTC:123734 - remove side offsets once hwsv implements new layout ->
+    <sideAOffset>  -> Location of Side A Partition Table
+    <sideBOffset>  -> Location of Side B Partition Table
+    <side>         -> Contains information about the side
+        <id>            -> Id of the side (A or B)
+        <arrangement>   -> Tag that specifies the arrangement of the side
+                           (A-B-D or A-D-B)
+                           A-B-D: Primary TOC (A),Backup TOC (B), and Section Information (Data - D)
+                           A-D-B: Primary TOC (A), Section Information (Data - D), Backup TOC (B)
+        <golden/> -> Indicates that the side of the PNOR is golden
+</metadata>
+<section> Element -> Contains information about a PNOR Partition
+    <description>   -> Text description of the partition.
+                       Does not have to be machine readable.
+    <eyeCatch>      -> Name of the Partition
+    <physicalOffset>-> Offset of the Partition in PNOR
+                       in bytes.
+    <physicalSize>  -> Size of the Partition in bytes.
+    <side>          -> Side that this section is associated with.
+                       could be (A, B, or sideless)
+                       A - Section is associated with side A
+                       B - Section is associated with side B
+                       sideless - Indicates partition will be in both TOCs but
+                                  only one copy of the partition should be created
+    <testonly/>     -> Indicates partition is used for internal testing only.
+                       Partition should be skipped in production environments.
+    <ecc/>          -> Indicates Partition should be ECC protected
+    <sha512Version/>-> Indicates Partition uses SHA512 for version information.
+    <sha512perEC/>  -> Indicates SHA512 is used to indicate version for each
+                       EC-specific image within the Partition.
+    <preserved/>    -> Indicates Partition is preserved across code updates.
+</section>
+-->
+
+<pnor>
+    <metadata>
+        <imageSize>0x4000000</imageSize>
+        <chipSize>0x8000000</chipSize>
+        <blockSize>0x1000</blockSize>
+        <tocSize>0x8000</tocSize>
+        <!--TODO: RTC 123734 - remove side offsets once hwsv implements new
+        layout-->
+        <sideAOffset>0x3FF0000</sideAOffset>
+        <sideBOffset>0x0</sideBOffset>
+        <arrangement>A-D-B</arrangement>
+        <side>
+            <id>B</id>
+        </side>
+    </metadata>
+    <section>
+        <description>Hostboot Base (576K)</description>
+        <eyeCatch>HBB</eyeCatch>
+        <physicalOffset>0x8000</physicalOffset>
+        <physicalRegionSize>0x90000</physicalRegionSize>
+        <sha512Version/>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
+        <description>Hostboot Error Logs (144K)</description>
+        <eyeCatch>HBEL</eyeCatch>
+        <physicalOffset>0x98000</physicalOffset>
+        <physicalRegionSize>0x24000</physicalRegionSize>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
+        <description>Guard Data (20K)</description>
+        <eyeCatch>GUARD</eyeCatch>
+        <physicalOffset>0xBC000</physicalOffset>
+        <physicalRegionSize>0x5000</physicalRegionSize>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
+        <description>Hostboot Data (1.125M)</description>
+        <eyeCatch>HBD</eyeCatch>
+        <physicalOffset>0xC1000</physicalOffset>
+        <physicalRegionSize>0x120000</physicalRegionSize>
+        <sha512Version/>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
+        <description>DIMM JEDEC (288K)</description>
+        <eyeCatch>DJVPD</eyeCatch>
+        <!--NOTE: MUST update standalone.simics if offset changes -->
+         <physicalOffset>0x1E1000</physicalOffset>
+        <physicalRegionSize>0x48000</physicalRegionSize>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
+        <description>Module VPD (576K)</description>
+        <eyeCatch>MVPD</eyeCatch>
+        <!--NOTE: MUST update standalone.simics if offset changes -->
+        <physicalOffset>0x229000</physicalOffset>
+        <physicalRegionSize>0x90000</physicalRegionSize>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
+        <description>Centaur VPD (288K)</description>
+        <eyeCatch>CVPD</eyeCatch>
+        <!--NOTE: MUST update standalone.simics if offset changes -->
+        <physicalOffset>0x2B9000</physicalOffset>
+        <physicalRegionSize>0x48000</physicalRegionSize>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
+        <description>Hostboot Extended image (22MB w/o ECC)</description>
+        <eyeCatch>HBI</eyeCatch>
+        <physicalOffset>0x301000</physicalOffset>
+        <physicalRegionSize>0x18C0000</physicalRegionSize>
+        <sha512Version/>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <!-- @fixme - Put this back later (RTC:154286)
+    <section>
+        <description>Centaur SBE (576K)</description>
+        <eyeCatch>SBEC</eyeCatch>
+        <physicalOffset>0x83D000</physicalOffset>
+        <physicalRegionSize>0x90000</physicalRegionSize>
+        <sha512perEC/>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    -->
+    <section>
+        <description>SBE-IPL (Staging Area) (288K)</description>
+        <eyeCatch>SBE</eyeCatch>
+        <physicalOffset>0x1BC1000</physicalOffset>
+        <physicalRegionSize>0x48000</physicalRegionSize>
+        <sha512perEC/>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
+        <description>HCODE Ref Image (1.125MB)</description>
+        <eyeCatch>HCODE</eyeCatch>
+        <physicalOffset>0x1C09000</physicalOffset>
+        <physicalRegionSize>0x120000</physicalRegionSize>
+        <sha512Version/>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
+        <description>Hostboot Bootloader (22.5K)</description>
+        <eyeCatch>HBBL</eyeCatch>
+        <physicalOffset>0x1D29000</physicalOffset>
+        <physicalRegionSize>0x6000</physicalRegionSize>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+    <section>
+        <description>Global Data (36K)</description>
+        <eyeCatch>GLOBAL</eyeCatch>
+        <physicalOffset>0x1D2F000</physicalOffset>
+        <physicalRegionSize>0x9000</physicalRegionSize>
+        <side>sideless</side>
+        <ecc/>
+    </section>
+</pnor>
diff --git a/src/build/mkrules/dist.targets.mk b/src/build/mkrules/dist.targets.mk
index dcceefa9c..d20157027 100644
--- a/src/build/mkrules/dist.targets.mk
+++ b/src/build/mkrules/dist.targets.mk
@@ -209,6 +209,7 @@ fsp.tar_CONTENTS = \
     src/build/buildpnor/buildSbePart.pl \
     src/build/buildpnor/buildpnor.pl \
     src/build/buildpnor/defaultPnorLayout.xml \
+    src/build/buildpnor/pnorLayoutFSP.xml \
     $(if $(FAKEPNOR), src/build/buildpnor/pnorLayoutFake.xml, ) \
     $(if $(FAKEPNOR), img/vbu_NIMBUS_targeting.bin, ) \
     $(if $(FAKEPNOR), img/vpo_sysmvpd.dat, ) \
diff --git a/src/build/simics/standalone.simics b/src/build/simics/standalone.simics
index 5f4da19f7..4e39a1dc6 100755
--- a/src/build/simics/standalone.simics
+++ b/src/build/simics/standalone.simics
@@ -12,16 +12,11 @@
     }
     try {
         run-python-file (lookup-file hbfw/hb-pnor-vpd-preload.py)
-            ($hb_pnor).sfc_master_mem.load-file ./sysmvpd.dat.ecc 0x1C5000
-            ($hb_pnor).sfc_master_mem.load-file ./sysspd.dat.ecc 0x17D000
-            ($hb_pnor).sfc_master_mem.load-file ./sysmemvpd.dat.ecc 0x255000
+            ($hb_pnor).sfc_master_mem.load-file ./sysmvpd.dat.ecc 0x229000
+            ($hb_pnor).sfc_master_mem.load-file ./sysspd.dat.ecc 0x1E1000
+            ($hb_pnor).sfc_master_mem.load-file ./sysmemvpd.dat.ecc 0x2B9000
     } except { echo "ERROR: Failed to preload VPD into PNOR." }
 
-#Write the PNOR MMIO addr into Scratch 2, 0x283A
-($hb_masterproc).proc_lbus_map.write 0x28e8 0xFFF78000  #HB PNOR addr
-foreach $cc in (get-object-list p9_proc) {
-    ($cc).proc_lbus_map.write 0x28e8 0xFFF78000
-}
 
 # Loop through every processor chip
 foreach $cc in (get-object-list p9_proc) {
diff --git a/src/include/bootloader/bl_pnorAccess.H b/src/include/bootloader/bl_pnorAccess.H
index bc19a4dc2..237900b0d 100644
--- a/src/include/bootloader/bl_pnorAccess.H
+++ b/src/include/bootloader/bl_pnorAccess.H
@@ -49,7 +49,7 @@ class bl_pnorAccess
 /**
  * @brief Get the hostboot base image
  *
- * @param[in] i_pnorStart       MMIO address to access the start of pnor flash
+ * @param[in] i_pnorEnd         MMIO address to access the end of pnor flash
  *
  * @param[out] o_hbbSection     Struct that holds information about the
  *                              Hostboot Base Image Section
@@ -58,12 +58,15 @@ class bl_pnorAccess
  *
  * @param[out] o_tocUsed        Tells you which table of contents was used
  *
+ * @param[out] o_pnorStart      The MMIO address of the start of PNOR
+ *
  * @return void
  */
-static void getHBBSection(uint64_t i_pnorStart,
+static void getHBBSection(uint64_t i_pnorEnd,
                           PNOR::SectionData_t& o_hbbSection,
                           uint32_t& o_errCode,
-                          uint8_t& o_tocUsed);
+                          uint8_t& o_tocUsed,
+                          uint64_t& o_pnorStart);
 
   private:
 /**
@@ -75,18 +78,20 @@ static void getHBBSection(uint64_t i_pnorStart,
  *
  * @param[out] o_TOC          Array of section data describing contents of pnor
  *
- * @param[in] i_baseAddr      MMIO address to access the start of pnor flash
+ * @param[out] o_pnorStart   The MMIO address of the start of PNOR
+ *
+ * @param[out] i_pnorEnd     The MMIO address of the end of PNOR
  *
  * @return void
  */
 static void readTOC(uint8_t i_tocBuffer[PNOR::TOC_SIZE],  uint32_t & o_errCode,
-                    PNOR::SectionData_t * o_TOC, uint64_t i_baseAddr);
+                    PNOR::SectionData_t * o_TOC, uint64_t& o_pnorStart, uint64_t i_pnorEnd);
 
 /**
  * @brief Find a valid TOC within specified side of pnor flash
           side is determined by the base mmio address passed in
  *
- * @param[in] i_pnorBase     MMIO address to access the start of pnor flash
+ * @param[in] i_pnorEnd      MMIO address to access the end of pnor flash
  *
  * @param[out] o_TOC         Array of section data describing contents of pnor
  *
@@ -94,10 +99,12 @@ static void readTOC(uint8_t i_tocBuffer[PNOR::TOC_SIZE],  uint32_t & o_errCode,
  *
  * @param[out] o_tocUsed     Tells you which table of contents was used
  *
+ * @param[out] o_pnorStart   The MMIO address of the start of PNOR
+ *
  * @return void
  */
-static void findTOC(uint64_t i_pnorBase, PNOR::SectionData_t * o_TOC,
-                    uint32_t& o_errCode, uint8_t& o_tocUsed);
+static void findTOC(uint64_t i_pnorEnd, PNOR::SectionData_t * o_TOC,
+                    uint32_t& o_errCode, uint8_t& o_tocUsed, uint64_t& o_pnorStart);
 
 };
 
diff --git a/src/include/usr/pnor/pnor_const.H b/src/include/usr/pnor/pnor_const.H
index a7ca2c3b0..2d0d90f51 100644
--- a/src/include/usr/pnor/pnor_const.H
+++ b/src/include/usr/pnor/pnor_const.H
@@ -107,6 +107,8 @@ enum
 {
     INVALID_OFFSET = 0xFFFFFFF,  // Invalid primary or alternate TOC
     BACKUP_TOC_OFFSET = 0x8000,
+    TOC_SIZE = 0x8000,
+    TOC_OFFSET_FROM_TOP_OF_FLASH = 0x8FFF,
     INVALID_FLASH_OFFSET = 0xFFFFFFFF,
 };
 
diff --git a/src/usr/pnor/pnor_utils.H b/src/usr/pnor/pnor_utils.H
index b314336ae..ed0f7176b 100644
--- a/src/usr/pnor/pnor_utils.H
+++ b/src/usr/pnor/pnor_utils.H
@@ -54,7 +54,6 @@ enum
     /** Real number of bytes required to read 1 logical page */
     PAGESIZE_PLUS_ECC = ((PAGESIZE * 9)/8),  // 8B data + 1B of ECC
     SUPPORTED_FFS_VERSION = 0x1,  /**< Supported FFS Version */
-    TOC_SIZE = 0x8000,
 };
author	crgeddes <crgeddes@us.ibm.com>	2016-07-26 11:40:30 -0500
committer	William G. Hoffa <wghoffa@us.ibm.com>	2016-08-25 14:50:15 -0400
commit	b0bf18528f97ecef49ff27fd4715b2d2a50ad5ba (patch)
tree	c62489d62c413e523e72e3a5559d629165078c08
parent	1400bea75a6bbd2083a8b39095470102479c8514 (diff)
download	talos-hostboot-b0bf18528f97ecef49ff27fd4715b2d2a50ad5ba.tar.gz talos-hostboot-b0bf18528f97ecef49ff27fd4715b2d2a50ad5ba.zip