Sync up common files after HWSV review and changes

Change-Id: Ida41d514bb565f79049f77d432181e98ab6991b9
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2449
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

2 files changed, 70 insertions, 64 deletions

diff --git a/src/usr/targeting/xmltohb/TULETA.mrw.xml b/src/usr/targeting/xmltohb/TULETA.mrw.xml
index 6b58e5fe0..b297cfe2c 100644
--- a/src/usr/targeting/xmltohb/TULETA.mrw.xml
+++ b/src/usr/targeting/xmltohb/TULETA.mrw.xml
@@ -44,6 +44,15 @@
         <id>FREQ_MEM_REFCLOCK</id>
         <default>266</default>
     </attribute>
+    <!-- PAYLOAD_BASE and PAYLOAD_ENTRY should be from FW xml -->
+    <attribute>
+        <id>PAYLOAD_BASE</id>
+        <default>256</default>
+    </attribute>
+    <attribute>
+        <id>PAYLOAD_ENTRY</id>
+        <default>0x180</default>
+    </attribute>
     <!-- System Attributes from MRW -->
     <attribute>
         <id>ALL_MCS_IN_INTERLEAVING_GROUP</id>
@@ -112,18 +121,6 @@
         </default>
     </attribute>
     <attribute>
-        <id>PAYLOAD_BASE</id>
-        <default>
-            256
-        </default>
-    </attribute>
-    <attribute>
-        <id>PAYLOAD_ENTRY</id>
-        <default>
-            0x180
-        </default>
-    </attribute>
-    <attribute>
         <id>PROC_EPS_TABLE_TYPE</id>
         <default>
             2
@@ -255,79 +252,79 @@
     <attribute>
         <id>PROC_PCIE_IOP_G2_PLL_CONTROL0</id>
         <default>
-            0x18F4,0x18F4
+            0x000018F4,0x000018F4
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_G3_PLL_CONTROL0</id>
         <default>
-            0x086C,0x086C
+            0x0000086C,0x0000086C
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_PCS_CONTROL0</id>
         <default>
-            0x3AE8,0x3AE8
+            0x00003AE8,0x00003AE8
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_PCS_CONTROL1</id>
         <default>
-            0x5CB9,0x5CB9
+            0x00005CB9,0x00005CB9
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL0</id>
         <default>
-            0x146,0x146
+            0x00000146,0x00000146
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL1</id>
         <default>
-            0x6D7,0x6D7
+            0x000006D7,0x000006D7
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_RX_PEAK</id>
         <default>
-            0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B
+            0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_RX_SDL</id>
         <default>
-            0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A
+            0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_RX_VGA_CONTROL2</id>
         <default>
-            0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451
+            0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_TX_BWLOSS1</id>
         <default>
-            0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000
+            0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_TX_FIFO_OFFSET</id>
         <default>
-            0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294
+            0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_TX_RCVRDETCNTL</id>
         <default>
-            0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151
+            0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_ZCAL_CONTROL</id>
         <default>
-            0x000,0x000
+            0x00000000,0x00000000
         </default>
     </attribute>
     <!-- End PROC_PCIE_ attributes -->
@@ -936,79 +933,79 @@
     <attribute>
         <id>PROC_PCIE_IOP_G2_PLL_CONTROL0</id>
         <default>
-            0x18F4,0x18F4
+            0x000018F4,0x000018F4
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_G3_PLL_CONTROL0</id>
         <default>
-            0x086C,0x086C
+            0x0000086C,0x0000086C
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_PCS_CONTROL0</id>
         <default>
-            0x3AE8,0x3AE8
+            0x00003AE8,0x00003AE8
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_PCS_CONTROL1</id>
         <default>
-            0x5CB9,0x5CB9
+            0x00005CB9,0x00005CB9
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL0</id>
         <default>
-            0x146,0x146
+            0x00000146,0x00000146
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL1</id>
         <default>
-            0x6D7,0x6D7
+            0x000006D7,0x000006D7
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_RX_PEAK</id>
         <default>
-            0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B
+            0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_RX_SDL</id>
         <default>
-            0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A
+            0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_RX_VGA_CONTROL2</id>
         <default>
-            0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451
+            0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_TX_BWLOSS1</id>
         <default>
-            0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000
+            0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_TX_FIFO_OFFSET</id>
         <default>
-            0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294
+            0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_TX_RCVRDETCNTL</id>
         <default>
-            0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151
+            0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_ZCAL_CONTROL</id>
         <default>
-            0x000,0x000
+            0x00000000,0x00000000
         </default>
     </attribute>
     <!-- End PROC_PCIE_ attributes -->
@@ -1617,79 +1614,79 @@
     <attribute>
         <id>PROC_PCIE_IOP_G2_PLL_CONTROL0</id>
         <default>
-            0x18F4,0x18F4
+            0x000018F4,0x000018F4
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_G3_PLL_CONTROL0</id>
         <default>
-            0x086C,0x086C
+            0x0000086C,0x0000086C
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_PCS_CONTROL0</id>
         <default>
-            0x3AE8,0x3AE8
+            0x00003AE8,0x00003AE8
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_PCS_CONTROL1</id>
         <default>
-            0x5CB9,0x5CB9
+            0x00005CB9,0x00005CB9
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL0</id>
         <default>
-            0x146,0x146
+            0x00000146,0x00000146
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL1</id>
         <default>
-            0x6D7,0x6D7
+            0x000006D7,0x000006D7
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_RX_PEAK</id>
         <default>
-            0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B
+            0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_RX_SDL</id>
         <default>
-            0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A
+            0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_RX_VGA_CONTROL2</id>
         <default>
-            0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451
+            0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_TX_BWLOSS1</id>
         <default>
-            0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000
+            0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_TX_FIFO_OFFSET</id>
         <default>
-            0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294
+            0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_TX_RCVRDETCNTL</id>
         <default>
-            0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151
+            0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_ZCAL_CONTROL</id>
         <default>
-            0x000,0x000
+            0x00000000,0x00000000
         </default>
     </attribute>
     <!-- End PROC_PCIE_ attributes -->
@@ -2298,79 +2295,79 @@
     <attribute>
         <id>PROC_PCIE_IOP_G2_PLL_CONTROL0</id>
         <default>
-            0x18F4,0x18F4
+            0x000018F4,0x000018F4
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_G3_PLL_CONTROL0</id>
         <default>
-            0x086C,0x086C
+            0x0000086C,0x0000086C
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_PCS_CONTROL0</id>
         <default>
-            0x3AE8,0x3AE8
+            0x00003AE8,0x00003AE8
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_PCS_CONTROL1</id>
         <default>
-            0x5CB9,0x5CB9
+            0x00005CB9,0x00005CB9
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL0</id>
         <default>
-            0x146,0x146
+            0x00000146,0x00000146
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL1</id>
         <default>
-            0x6D7,0x6D7
+            0x000006D7,0x000006D7
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_RX_PEAK</id>
         <default>
-            0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B,0xB1B
+            0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_RX_SDL</id>
         <default>
-            0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A,0x294A
+            0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_RX_VGA_CONTROL2</id>
         <default>
-            0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451,0x9451
+            0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_TX_BWLOSS1</id>
         <default>
-            0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000,0x000
+            0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_TX_FIFO_OFFSET</id>
         <default>
-            0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294,0x4294
+            0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_TX_RCVRDETCNTL</id>
         <default>
-            0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151,0x2151
+            0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151
         </default>
     </attribute>
     <attribute>
         <id>PROC_PCIE_IOP_ZCAL_CONTROL</id>
         <default>
-            0x000,0x000
+            0x00000000,0x00000000
         </default>
     </attribute>
     <!-- End PROC_PCIE_ attributes -->
diff --git a/src/usr/targeting/xmltohb/genHwsvMrwXml.pl b/src/usr/targeting/xmltohb/genHwsvMrwXml.pl
index 05a77245d..6f986146f 100755
--- a/src/usr/targeting/xmltohb/genHwsvMrwXml.pl
+++ b/src/usr/targeting/xmltohb/genHwsvMrwXml.pl
@@ -989,6 +989,15 @@ sub generate_sys
     <attribute>
         <id>FREQ_MEM_REFCLOCK</id>
         <default>$mem_refclk</default>
+    </attribute>
+    <!-- PAYLOAD_BASE and PAYLOAD_ENTRY should be from FW xml -->
+    <attribute>
+        <id>PAYLOAD_BASE</id>
+        <default>256</default>
+    </attribute>
+    <attribute>
+        <id>PAYLOAD_ENTRY</id>
+        <default>0x180</default>
     </attribute>\n";
 
     print "    <!-- System Attributes from MRW -->\n";