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| author | Thi Tran <thi@us.ibm.com> | 2014-03-25 08:44:30 -0500 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2014-03-25 15:33:25 -0500 |
| commit | a281d8120eee0afb2de9ec9a45702d4ec1a684ca (patch) | |
| tree | d550d6e994e5177374bceed26c133b721a91b638 | |
| parent | f15aa4b5e2e0dc73b8cecba870b06bb7c54090a9 (diff) | |
| download | talos-hostboot-a281d8120eee0afb2de9ec9a45702d4ec1a684ca.tar.gz talos-hostboot-a281d8120eee0afb2de9ec9a45702d4ec1a684ca.zip | |
TULETA lost 30% of Daxpy BW due to wrong memory interleaving setting
Change-Id: Icb9789cb9f94398325c94023628182e56ae1a5b2
Backport: release-fips810
CQ:FW621380
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/9856
Tested-by: Jenkins Server
Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
5 files changed, 17 insertions, 5 deletions
diff --git a/src/usr/targeting/common/genHwsvMrwXml.pl b/src/usr/targeting/common/genHwsvMrwXml.pl index 37dab3a34..34dc53e07 100755 --- a/src/usr/targeting/common/genHwsvMrwXml.pl +++ b/src/usr/targeting/common/genHwsvMrwXml.pl @@ -194,7 +194,6 @@ push @systemAttr, $reqPol->{'cdimm_spare_i2c_temp_sensor_enable'}, "PM_SYSTEM_IVRMS_ENABLED", $reqPol->{'pm_system_ivrms_enabled'}, "PM_SYSTEM_IVRM_VPD_MIN_LEVEL", $reqPol->{'pm_system_ivrm_vpd_min_level'}, - "MRW_MBA_CACHELINE_INTERLEAVE_MODE_CONTROL", $reqPol->{'mba_cacheline_interleave_mode_control'}, "MRW_ENHANCED_GROUPING_NO_MIRRORING", $reqPol->{'mcs_enhanced_grouping_no_mirroring'}, "MRW_STRICT_MBA_PLUG_RULE_CHECKING", $reqPol->{'strict_mba_plug_rule_checking'}, "MNFG_DMI_MIN_EYE_WIDTH", $reqPol->{'mnfg-dmi-min-eye-width'}, @@ -204,6 +203,19 @@ push @systemAttr, "MNFG_XBUS_MIN_EYE_WIDTH", $reqPol->{'mnfg-xbus-min-eye-width'}, ]; +if ($reqPol->{'mba_cacheline_interleave_mode_control'} eq 'required') +{ + push @systemAttr, ["MRW_MBA_CACHELINE_INTERLEAVE_MODE_CONTROL", 1]; +} +elsif ($reqPol->{'mba_cacheline_interleave_mode_control'} eq 'requested') +{ + push @systemAttr, ["MRW_MBA_CACHELINE_INTERLEAVE_MODE_CONTROL", 2]; +} +else +{ + push @systemAttr, ["MRW_MBA_CACHELINE_INTERLEAVE_MODE_CONTROL", 0]; +} + #------------------------------------------------------------------------------ # Process the pm-settings MRW file #------------------------------------------------------------------------------ diff --git a/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml b/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml index cf7cde4c4..f0f974078 100644 --- a/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml @@ -343,7 +343,7 @@ </attribute> <attribute> <id>MRW_MBA_CACHELINE_INTERLEAVE_MODE_CONTROL</id> - <default>required</default> + <default>1</default> </attribute> </targetInstance> diff --git a/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml b/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml index 64bb54da8..ebbec6384 100644 --- a/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml @@ -335,7 +335,7 @@ po<!-- IBM_PROLOG_BEGIN_TAG -- </attribute> <attribute> <id>MRW_MBA_CACHELINE_INTERLEAVE_MODE_CONTROL</id> - <default>required</default> + <default>1</default> </attribute> </targetInstance> diff --git a/src/usr/targeting/common/xmltohb/vbu_MURANO.system.xml b/src/usr/targeting/common/xmltohb/vbu_MURANO.system.xml index 91bf791ba..0056a2735 100644 --- a/src/usr/targeting/common/xmltohb/vbu_MURANO.system.xml +++ b/src/usr/targeting/common/xmltohb/vbu_MURANO.system.xml @@ -322,7 +322,7 @@ </attribute> <attribute> <id>MRW_MBA_CACHELINE_INTERLEAVE_MODE_CONTROL</id> - <default>required</default> + <default>1</default> </attribute> </targetInstance> diff --git a/src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml b/src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml index c520fd8f0..a22d1e7ce 100644 --- a/src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml +++ b/src/usr/targeting/common/xmltohb/vbu_VENICE.system.xml @@ -323,7 +323,7 @@ </attribute> <attribute> <id>MRW_MBA_CACHELINE_INTERLEAVE_MODE_CONTROL</id> - <default>required</default> + <default>1</default> </attribute> </targetInstance> |
