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| author | Christian Geddes <crgeddes@us.ibm.com> | 2018-11-30 11:36:45 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2018-12-06 18:59:28 -0600 |
| commit | 9e89b556adb60d42b33353091165e25679490bdd (patch) | |
| tree | 5e84a10fc3d0425e8e9d12f4e5fb6b394551cde9 | |
| parent | 2555c39c6f9c365cbdc2376ded59ae5f4d8a3c42 (diff) | |
| download | talos-hostboot-9e89b556adb60d42b33353091165e25679490bdd.tar.gz talos-hostboot-9e89b556adb60d42b33353091165e25679490bdd.zip | |
Add README.md to src/usr/i2c/ which describes P9 I2C layout
There is a hard copy of a wiring diagram that has been floating
around but I cant find this information in our codebase so I thought
I would add it.
Change-Id: I1cf606c2699a736743128b3c29827acee68fa6bd
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69308
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Hieu C. Nguyen <hieu.nguyen@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
| -rw-r--r-- | src/usr/i2c/README.md | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/src/usr/i2c/README.md b/src/usr/i2c/README.md new file mode 100644 index 000000000..598acfb29 --- /dev/null +++ b/src/usr/i2c/README.md @@ -0,0 +1,38 @@ +## P9 I2C attachments (External devieces and driving I2C master engines) + +Each processor has a CFAM I2C master that connects to the FSP in additon to +a Quad I2C master chiptlet that houses 4 PIB I2CM devices. These I2C master +devices connect to the SBE , the VPD , the TPM/PCIE, and the DIMMs. + +### I2C Masters in the P9 Proc Chiplet + +CFAM I2CM_A = FSP + +PIB I2CM_B = SBE seeproms = Engine0 + +PIB I2CM_C = VPD/SBE seeproms = Engine1 + +PIB I2CM_D = TPM/PCIE HotPlug = Engine2 + +PIB I2CM_E = DIMMs = Engine3 + + +### I2C Master Connections + + +**CFAM I2CM_A** - connects to seeprom0(MVPD), seeprom1(SBE), seeprom2(MVPD), +seeprom3(SBE), CXPs (hostboot ignores), GPUs, DIMMs, and the DPSS/Spare + +**PIB I2CM_B** - connects to seeprom1(SBE) and seeprom3(SBE) + +**PIB I2CM_C** - connects to seeprom0(MVPD), seeprom1(SBE), seeprom2(MVPD), +seeprom3(SBE),CXPs (hostboot ignores), GPUs, and the DPSS/Spare + +**PIB I2CM_D** - connects to TPM and PCIe HotPlugs + +**PIB I2CM_E** - connects to DIMMs + + +**NOTE:** many of these devices have multiple masters, becausue of this masters +must handshake before communicating to make sure collisions do not occur. + |
