Moving DD specific ring coord from TOR to XIP (step 2)

Step 2 - Producing XIP coordinated DD packaging of the TOR
         ring sections.

- Updated ring_apply to produce N number of DD specific .rings
  ring sections and which is then assembled using the DD
  container API.

Key_Cronus_Test=XIP_REGRESS

HW-ImageBuild-Prereq=42751
- 42751 must be fully merged in Cronus and HB before this
  commit (51511) can be merged. This is to avoid a Coreq
  situation.

CMVC-Prereq: 1043942
Change-Id: I45a73848f3e8683aae9dcc26fcdf282259c38fcc
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51511
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51520
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

3 files changed, 86 insertions, 20 deletions

diff --git a/src/import/chips/common/utils/imageProcs/common_ringId.H b/src/import/chips/common/utils/imageProcs/common_ringId.H
index a042d5d50..74edacb0f 100644
--- a/src/import/chips/common/utils/imageProcs/common_ringId.H
+++ b/src/import/chips/common/utils/imageProcs/common_ringId.H
@@ -49,6 +49,7 @@ typedef uint8_t   PpeType_t;        // Type for PpeType
 typedef uint8_t   ChipType_t;       // Type for ChipType enum
 typedef uint8_t   RingType_t;       // Type for RingType enum
 typedef uint8_t   RingVariant_t;    // Type for RingVariant enum
+typedef uint8_t   RingBlockType_t;  // Type for RingBlockType enum, e.g. GET_SINGLE_RING
 typedef uint32_t  TorCpltOffset_t;  // Type for offset value to chiplet's CMN or INST section
 typedef uint8_t   myBoolean_t;      // false:0, true:1, undefined:UNDEFINED_BOOLEAN
 
@@ -57,6 +58,7 @@ typedef uint8_t   myBoolean_t;      // false:0, true:1, undefined:UNDEFINED_BOOL
 #define  INVALID_CHIPLET_TYPE   (ChipletType_t)0xff
 #define  UNDEFINED_PPE_TYPE     (PpeType_t)0xff
 #define  UNDEFINED_CHIP_TYPE    (ChipType_t)0xff
+#define  UNDEFINED_RING_BLOCK_TYPE (RingBlockType_t)0xff;
 #define  MAX_TOR_RING_OFFSET    (uint16_t)(256*256-1) // Max val of uint16
 #define  MAX_RING_NAME_LENGTH   (uint8_t)50
 #define  UNDEFINED_DD_LEVEL     (uint8_t)0xff
@@ -128,7 +130,8 @@ typedef uint16_t TorRingOffset_t;  // Offset value to actual ring
 //#define TOR_VERSION  1  // Initial version. Large RS4 header.
 //#define TOR_VERSION  2  // Reduced RS4 header.
 //#define TOR_VERSION  3  // Added TOR magic header.
-#define TOR_VERSION  4  // TOR API code restructuring.
+//#define TOR_VERSION  4  // TOR API code restructuring.
+#define   TOR_VERSION  5  // Removed TOR-level DD handling.
 
 // TOR Magic values for top-level TOR ringSection and sub-ringSections
 enum TorMagicNum
@@ -242,6 +245,16 @@ enum RingType
     ALLRING = 2
 };
 
+enum RingBlockType
+{
+    GET_SINGLE_RING     = 0x00,
+#ifdef TORV3_SUPPORT
+    GET_DD_LEVEL_RINGS  = 0x01,
+#endif
+    GET_PPE_LEVEL_RINGS = 0x02,
+    PUT_SINGLE_RING     = 0x03
+};
+
 typedef struct
 {
     // This is the chiplet-ID of the first instance of the Chiplet
diff --git a/src/import/chips/p9/utils/imageProcs/p9_tor.C b/src/import/chips/p9/utils/imageProcs/p9_tor.C
index eaf0b415a..3b3a5ec54 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_tor.C
+++ b/src/import/chips/p9/utils/imageProcs/p9_tor.C
@@ -285,10 +285,10 @@ int get_ring_from_ring_section( void*           i_ringSection,     // Ring secti
 int tor_access_ring(  void*           i_ringSection,     // Ring section ptr
                       RingId_t        i_ringId,          // Ring ID
                       uint8_t         i_ddLevel,         // DD level
-                      PpeType_t       i_ppeType,         // SBE, CME, SGPE
+                      PpeType_t       i_ppeType,         // SBE,CME,SGPE
                       RingVariant_t   i_ringVariant,     // Base,CC,RL (SBE,CME,SGPE only)
                       uint8_t&        io_instanceId,     // Instance ID
-                      RingBlockType_t i_ringBlockType,   // Single ring, Block
+                      RingBlockType_t i_ringBlockType,   // GET_SINGLE_RING,GET_PPE_LEVEL_RINGS,etc
                       void**          io_ringBlockPtr,   // Ring data buffer
                       uint32_t&       io_ringBlockSize,  // Size of ring data
                       char*           o_ringName,        // Ring name
@@ -316,6 +316,69 @@ int tor_access_ring(  void*           i_ringSection,     // Ring section ptr
     torHeader = (TorHeader_t*)i_ringSection;
     torMagic = be32toh(torHeader->magic);
 
+    if (i_dbgl > 0)
+    {
+        MY_DBG("TOR header fields\n"
+               "  magic:         0x%08x\n"
+               "  version:       %d\n"
+               "  chipType:      %d\n"
+               "  ddLevel:       0x%x\n"
+#ifdef TORV3_SUPPORT
+               "  numDdLevels:   %d\n"
+#endif
+               "  size:          %d\n"
+               "API parms\n"
+               "  i_ddLevel:     0x%x\n"
+               "  i_ppeType:     %d\n"
+               "  i_ringVariant: %d\n",
+               torMagic, torHeader->version, torHeader->chipType,
+               torHeader->ddLevel,
+#ifdef TORV3_SUPPORT
+               torHeader->numDdLevels,
+#endif
+               be32toh(torHeader->size),
+               i_ddLevel, i_ppeType, i_ringVariant);
+
+        MY_DBG("Dump of first 12 quad-word lines in ring section\n");
+
+        for (uint8_t iLine = 0; iLine < 12; iLine++)
+        {
+            MY_DBG("%04x: %04x %04x %04x %04x %04x %04x %04x %04x\n",
+                   iLine * 16,
+                   (uint16_t)( be64toh(*((uint64_t*)i_ringSection + 2 * iLine + 0)) >> 48),
+                   (uint16_t)( be64toh(*((uint64_t*)i_ringSection + 2 * iLine + 0)) >> 32),
+                   (uint16_t)( be64toh(*((uint64_t*)i_ringSection + 2 * iLine + 0)) >> 16),
+                   (uint16_t)( be64toh(*((uint64_t*)i_ringSection + 2 * iLine + 0)) >>  0),
+                   (uint16_t)( be64toh(*((uint64_t*)i_ringSection + 2 * iLine + 1)) >> 48),
+                   (uint16_t)( be64toh(*((uint64_t*)i_ringSection + 2 * iLine + 1)) >> 32),
+                   (uint16_t)( be64toh(*((uint64_t*)i_ringSection + 2 * iLine + 1)) >> 16),
+                   (uint16_t)( be64toh(*((uint64_t*)i_ringSection + 2 * iLine + 1)) >>  0));
+        }
+    }
+
+    if ( torMagic >> 8 != TOR_MAGIC ||
+         torHeader->version == 0 ||
+         torHeader->version > TOR_VERSION ||
+         torHeader->chipType >= NUM_CHIP_TYPES )
+    {
+        MY_ERR("Invalid TOR header:\n"
+               "  magic:       0x%08x\n"
+               "  version:     %d\n"
+               "  chipType:    %d\n"
+               "  ddLevel:     0x%x  (requested ddLevel=0x%x)\n"
+#ifdef TORV3_SUPPORT
+               "  numDdLevels: %d\n"
+#endif
+               "  size:        %d\n",
+               torMagic, torHeader->version, torHeader->chipType,
+               torHeader->ddLevel, i_ddLevel,
+#ifdef TORV3_SUPPORT
+               torHeader->numDdLevels,
+#endif
+               be32toh(torHeader->size));
+        return TOR_INVALID_MAGIC_NUMBER;
+    }
+
 #ifdef TORV3_SUPPORT
 
     if (torMagic == TOR_MAGIC_HW && torHeader->version < 5)
@@ -393,7 +456,7 @@ int tor_access_ring(  void*           i_ringSection,     // Ring section ptr
 
 #endif
 
-    if ( ( i_ringBlockType == GET_SINGLE_RING ) ||   // All Magics supported for GET
+    if ( i_ringBlockType == GET_SINGLE_RING ||       // All Magics support GET
          ( i_ringBlockType == PUT_SINGLE_RING  &&    // Can only append to SBE,CME,SGPE
            ( torMagic == TOR_MAGIC_SBE ||
              torMagic == TOR_MAGIC_CME ||
diff --git a/src/import/chips/p9/utils/imageProcs/p9_tor.H b/src/import/chips/p9/utils/imageProcs/p9_tor.H
index 352543420..65e863167 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_tor.H
+++ b/src/import/chips/p9/utils/imageProcs/p9_tor.H
@@ -27,16 +27,6 @@
 
 #include <common_ringId.H>
 
-// Different options to extract data using tor_access_ring API
-typedef enum RingBlockType
-{
-    GET_SINGLE_RING     = 0x00,
-#ifdef TORV3_SUPPORT
-    GET_DD_LEVEL_RINGS  = 0x01,
-#endif
-    GET_PPE_LEVEL_RINGS = 0x02,
-    PUT_SINGLE_RING     = 0x03
-} RingBlockType_t;
 
 ///
 /// ****************************************************************************
@@ -120,14 +110,14 @@ typedef enum RingBlockType
 ///
 /// \retval non-0 See \ref TOR API RETURN errors
 int tor_access_ring( void*           i_ringSection,    // Ring section ptr
-                     RingId_t        i_ringId,         // Unique ring ID
+                     RingId_t        i_ringId,         // Ring ID
                      uint8_t         i_ddLevel,        // DD level info
-                     PpeType_t       i_PpeType,        // PPE type : SBE, CME, etc
-                     RingVariant_t   i_RingVariant,    // Base, Cache etc
-                     uint8_t&        io_instanceId,    // chiplet instance ID
-                     RingBlockType_t i_RingBlockType,  // 0: single ring,  1: ring block
+                     PpeType_t       i_PpeType,        // SBE,CME,SGPE
+                     RingVariant_t   i_RingVariant,    // BASE,CC,RL
+                     uint8_t&        io_instanceId,    // Chiplet instance ID
+                     RingBlockType_t i_RingBlockType,  // GET_SINGLE_RING,GET_PPE_LEVEL_RINGS,etc
                      void**          io_ringBlockPtr,  // Addr of ring buffer
-                     uint32_t&       io_ringBlockSize, // size of ring data
+                     uint32_t&       io_ringBlockSize, // Size of ring data
                      char*           o_ringName,       // Ring name
                      uint32_t        i_dbgl = 0 );     // Debug option