Add code in host_discover_targets to power down slave EQs for MPIPL

During MPIPL we need to power down the slave quads before
we get to istep 16 which will power them on. The master quad has
been reset already by the SBE so now we just need to do the slaves

Change-Id: I98dcbcf8a8ef561a06ae44f72de8b357cdd95cfa
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36834
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

5 files changed, 201 insertions, 6 deletions

diff --git a/src/include/usr/isteps/istep06list.H b/src/include/usr/isteps/istep06list.H
index fa9ca4129..073093812 100644
--- a/src/include/usr/isteps/istep06list.H
+++ b/src/include/usr/isteps/istep06list.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2012,2016                        */
+/* Contributors Listed Below - COPYRIGHT 2012,2017                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -234,6 +234,8 @@ const DepModInfo  g_istep06Dependancies = {
     {
       DEP_LIB(libistep06.so),
       DEP_LIB(libsbe.so),
+      DEP_LIB(libpm.so),
+      DEP_LIB(libp9_cpuWkup.so),
 #ifdef CONFIG_IPLTIME_CHECKSTOP_ANALYSIS
       DEP_LIB(libocc.so),
 #endif
diff --git a/src/usr/isteps/cpuWkup/makefile b/src/usr/isteps/cpuWkup/makefile
index a76c39142..ed2576973 100644
--- a/src/usr/isteps/cpuWkup/makefile
+++ b/src/usr/isteps/cpuWkup/makefile
@@ -5,7 +5,7 @@
 #
 # OpenPOWER HostBoot Project
 #
-# Contributors Listed Below - COPYRIGHT 2016
+# Contributors Listed Below - COPYRIGHT 2016,2017
 # [+] International Business Machines Corp.
 #
 #
@@ -30,6 +30,7 @@ EXTRAINCDIR += ${PROCEDURES_PATH}/hwp/pm/
 EXTRAINCDIR += ${ROOTPATH}/src/import/hwpf/fapi2/include/
 EXTRAINCDIR += ${ROOTPATH}/src/include/usr/
 EXTRAINCDIR += ${ROOTPATH}/src/include/usr/fapi2/
+EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/lib/
 EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/common/include/
 EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/utils/
 EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/utils/imageProcs/
@@ -40,6 +41,7 @@ include $(PROCEDURES_PATH)/hwp/pm/p9_cpu_special_wakeup_eq.mk
 include $(PROCEDURES_PATH)/hwp/pm/p9_cpu_special_wakeup_ex.mk
 include $(PROCEDURES_PATH)/hwp/pm/p9_cpu_special_wakeup_core.mk
 include $(PROCEDURES_PATH)/hwp/pm/p9_cpu_special_wakeup_lib.mk
+include $(PROCEDURES_PATH)/hwp/pm/p9_block_wakeup_intr.mk
 include ${ROOTPATH}/config.mk
 
 VPATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/pm/
diff --git a/src/usr/isteps/istep06/host_discover_targets.C b/src/usr/isteps/istep06/host_discover_targets.C
index 9bde1ac74..9ef5a87d1 100644
--- a/src/usr/isteps/istep06/host_discover_targets.C
+++ b/src/usr/isteps/istep06/host_discover_targets.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2016                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
 /* [+] Google Inc.                                                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
@@ -49,6 +49,16 @@
 #include <ipmi/ipmifruinv.H>
 #include <ipmi/ipmisensor.H>
 
+#include <fapi2/plat_hwp_invoker.H>
+#include <fapi2/target.H>
+
+#include <p9_query_core_access_state.H>
+#include <p9_query_cache_access_state.H>
+#include <p9_hcd_core_stopclocks.H>
+#include <p9_hcd_cache_stopclocks.H>
+#include <p9_hcd_common.H>
+#include <p9_quad_power_off.H>
+
 #ifdef CONFIG_PRINT_SYSTEM_INFO
 #include <stdio.h>
 #include <attributetraits.H>
@@ -151,6 +161,170 @@ void print_system_info(void)
 }
 #endif
 
+//loop through slave quads, make sure clocks are stopped (core and cache) and power them down
+errlHndl_t powerDownSlaveQuads()
+{
+    TARGETING::Target* l_sys_target = nullptr;
+    TARGETING::targetService().getTopLevelTarget(l_sys_target);
+    errlHndl_t l_err = NULL;
+    bool l_isMasterEq = false;
+    TARGETING::TargetHandleList l_eqTargetList;
+    getAllChiplets(l_eqTargetList, TARGETING::TYPE_EQ, true);
+
+    //Need to know who master is so we can skip them
+    uint8_t l_masterCoreId = TARGETING::getMasterCore()->getAttr<TARGETING::ATTR_CHIP_UNIT>();
+
+    //Loop through EQs
+    for(const auto & l_eq_target : l_eqTargetList)
+    {
+        l_isMasterEq = false;
+        fapi2::Target <fapi2::TARGET_TYPE_EQ> l_fapi_eq_target (l_eq_target);
+        TARGETING::TargetHandleList l_coreTargetList;
+        TARGETING::getChildChiplets( l_coreTargetList,
+                                     l_eq_target,
+                                     TARGETING::TYPE_CORE,
+                                     true);
+        //Check if either of the cores is master (probably could just check the first)
+        for(const auto & l_core_target : l_coreTargetList)
+        {
+            if(l_core_target->getAttr<TARGETING::ATTR_CHIP_UNIT>() == l_masterCoreId)
+            {
+                l_isMasterEq = true;
+                break;
+            }
+        }
+
+        //If this is the master quad, we have already power cycled so we dont need this
+        if(l_isMasterEq)
+        {
+            TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+                      "Found master, jumping to next EQ");
+            continue;
+        }
+
+        //Stop Clocks on all the cores
+        for(const auto & l_core_target : l_coreTargetList)
+        {
+            fapi2::Target <fapi2::TARGET_TYPE_CORE> l_fapi_core_target (l_core_target);
+            bool l_isScomable = false;
+            bool l_isScanable = false;
+            //Check if the core target has clocks running
+            FAPI_INVOKE_HWP(l_err,
+                            p9_query_core_access_state,
+                            l_fapi_core_target,
+                            l_isScomable,
+                            l_isScanable);
+            if(l_err)
+            {
+                TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+                          "Error reading core state for core %d", l_core_target->getAttr<TARGETING::ATTR_CHIP_UNIT>());
+                //Break out of core for-loop
+                break;
+            }
+
+            //If clocks are running (IE is scommable) then stop them
+            if(l_isScomable)
+            {
+                TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+                          "Stopping core %d", l_core_target->getAttr<TARGETING::ATTR_CHIP_UNIT>());
+                FAPI_INVOKE_HWP(l_err,
+                                p9_hcd_core_stopclocks,
+                                l_fapi_core_target);
+                if(l_err)
+                {
+                    TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+                              "Error stopping clocks on core %d", l_core_target->getAttr<TARGETING::ATTR_CHIP_UNIT>());
+                    //Break out of core for-loop
+                    break;
+                }
+            }
+            else
+            {
+                TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+                          "Core %d is not scommable according to query", l_core_target->getAttr<TARGETING::ATTR_CHIP_UNIT>());
+            }
+        }
+
+        if(l_err)
+        {
+            TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+                      "An error occurred while attempting to stop clocks on the core, skipping attempt to stop cache and returning error");
+            //Break out of EQ for-loop
+            break;
+        }
+
+
+        do
+        {
+            bool l_l2IsScomable = false;
+            bool l_l2IsScanable = false;
+            bool l_l3IsScomable = false;
+            bool l_l3IsScanable = false;
+
+            //Same thing with cache, need to check if any clocks are running
+            FAPI_INVOKE_HWP(l_err,
+                            p9_query_cache_access_state,
+                            l_fapi_eq_target,
+                            l_l2IsScomable,
+                            l_l2IsScanable,
+                            l_l3IsScomable,
+                            l_l3IsScanable);
+
+            if(l_err)
+            {
+                TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+                            "Error checking cache access state for EQ %d", l_eq_target->getAttr<TARGETING::ATTR_CHIP_UNIT>());
+                //Break from do-while
+                break;
+            }
+
+            //If the l3 is scommable then the clocks are running and we need to stop them
+            if(l_l3IsScomable)
+            {
+                TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+                        "Stopping even ex for eq %d", l_eq_target->getAttr<TARGETING::ATTR_CHIP_UNIT>());
+                //Stop clocks on both EXs
+                FAPI_INVOKE_HWP(l_err,
+                                p9_hcd_cache_stopclocks,
+                                l_fapi_eq_target,
+                                p9hcd::CLK_REGION_ALL_BUT_EX_DPLL,
+                                p9hcd::BOTH_EX);
+                if(l_err)
+                {
+                    TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+                            "Error stopping clocks on EVEN EX of EQ %d", l_eq_target->getAttr<TARGETING::ATTR_CHIP_UNIT>());
+                    //Break from do-while
+                    break;
+                }
+            }
+
+            TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+                "Powering down EQ %d", l_eq_target->getAttr<TARGETING::ATTR_CHIP_UNIT>());
+            //Power down slave quad
+            FAPI_INVOKE_HWP(l_err,
+                            p9_quad_power_off,
+                            l_fapi_eq_target);
+            if(l_err)
+            {
+                TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+                          "Error powering off EQ %d", l_eq_target->getAttr<TARGETING::ATTR_CHIP_UNIT>());
+                //Break from do-while
+                break;
+            }
+        }while(0);
+
+        if(l_err)
+        {
+            TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+                      "Error detected while attempting to power off EQ 0x%x" , l_eq_target->getAttr<TARGETING::ATTR_CHIP_UNIT>());
+            //Break out of EQ for loop
+            break;
+        }
+    }//end EQ for-loop
+
+    return l_err;
+}
+
 void* host_discover_targets( void *io_pArgs )
 {
     TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
@@ -171,6 +345,9 @@ void* host_discover_targets( void *io_pArgs )
                   "information has already been loaded from memory"
                   "when the targeting service started");
 
+        //Need to power down the slave quads
+        l_err = powerDownSlaveQuads();
+
     }
     else
     {
diff --git a/src/usr/isteps/istep06/makefile b/src/usr/isteps/istep06/makefile
index df25da33e..0cef7c3f6 100644
--- a/src/usr/isteps/istep06/makefile
+++ b/src/usr/isteps/istep06/makefile
@@ -5,7 +5,7 @@
 #
 # OpenPOWER HostBoot Project
 #
-# Contributors Listed Below - COPYRIGHT 2015,2016
+# Contributors Listed Below - COPYRIGHT 2015,2017
 # [+] International Business Machines Corp.
 #
 #
@@ -38,11 +38,15 @@ SUBDIRS	+= thread_activate.d
 
 NEST_HWP_PATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/nest
 PM_HWP_PATH   += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/pm
+CORE_HWP_PATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/core
+CACHE_HWP_PATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/cache
 LIB_HWP_PATH  += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/lib
 
 VPATH += ${NEST_HWP_PATH}
 VPATH += ${PM_HWP_PATH}
 VPATH += ${LIB_HWP_PATH}
+VPATH += ${CORE_HWP_PATH}
+VPATH += ${CACHE_HWP_PATH}
 
 #Add all the extra include paths
 EXTRAINCDIR += ${ROOTPATH}/src/usr/sbe
@@ -56,6 +60,9 @@ EXTRAINCDIR += ${ROOTPATH}/src/import/hwpf/fapi2/include
 EXTRAINCDIR += ${PM_HWP_PATH}
 EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/pm/include/registers
 EXTRAINCDIR += ${LIB_HWP_PATH}
+EXTRAINCDIR += ${CORE_HWP_PATH}
+EXTRAINCDIR += ${CACHE_HWP_PATH}
+
 
 #Required include before all the procedure.mk are included
 include ${ROOTPATH}/procedure.rules.mk
@@ -66,7 +73,15 @@ include $(NEST_HWP_PATH)/p9_revert_sbe_mcs_setup.mk
 # Take another look at PM lib
 include $(PM_HWP_PATH)/p9_pm_utils.mk
 include $(PM_HWP_PATH)/p9_setup_evid.mk
+include $(PM_HWP_PATH)/p9_query_core_access_state.mk
+include $(PM_HWP_PATH)/p9_query_cache_access_state.mk
+include $(PM_HWP_PATH)/p9_quad_power_off.mk
 include $(LIB_HWP_PATH)/p9_avsbus_lib.mk
 
+
+OBJS+=p9_hcd_core_stopclocks.o
+OBJS+=p9_hcd_cache_stopclocks.o
+OBJS+=p9_hcd_l2_stopclocks.o
+
 MODULE=istep06
 include ${ROOTPATH}/config.mk
diff --git a/src/usr/isteps/istep16/makefile b/src/usr/isteps/istep16/makefile
index cc18acae3..14c96c6d8 100644
--- a/src/usr/isteps/istep16/makefile
+++ b/src/usr/isteps/istep16/makefile
@@ -5,7 +5,7 @@
 #
 # OpenPOWER HostBoot Project
 #
-# Contributors Listed Below - COPYRIGHT 2015,2016
+# Contributors Listed Below - COPYRIGHT 2015,2017
 # [+] International Business Machines Corp.
 #
 #
@@ -45,7 +45,6 @@ OBJS += call_host_ipl_complete.o
 
 
 include ${ROOTPATH}/procedure.rules.mk
-include  ${PROCEDURES_PATH}/hwp/pm/p9_block_wakeup_intr.mk
 include  ${PROCEDURES_PATH}/hwp/pm/p9_dump_stop_info.mk
 include  ${PROCEDURES_PATH}/hwp/perv/p9_switch_cfsim.mk
 include  ${PROCEDURES_PATH}/hwp/perv/p9_switch_rec_attn.mk