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| author | Joachim Fenkes <fenkes@de.ibm.com> | 2016-04-04 17:51:23 +0200 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-06-22 14:20:49 -0400 |
| commit | 892ecc094aa8b175bf71bbb92210b781a3899ec2 (patch) | |
| tree | b407babac07c585c969373297ca3b5b2c7e961ee | |
| parent | ff6a453ebb1ef7f89315fadcdd70bd795dbca568 (diff) | |
| download | talos-hostboot-892ecc094aa8b175bf71bbb92210b781a3899ec2.tar.gz talos-hostboot-892ecc094aa8b175bf71bbb92210b781a3899ec2.zip | |
Add p9_proc_gettracearray procedure
Generic procedure to dump a trace array. The API is similar to the P8 procedure,
but the procedure takes trace _bus_ IDs as opposed to trace _array_ IDs and uses
these to check the trace array's primary trace MUXes prior to dumping. There is
also a flag to skip this check if you want to dump a specific trace array no
matter which bus is muxed into it.
The FAPI2 target supplied must match the trace array; most will just need a
TARGET_TYPE_PROC_CHIP target, but some are targeted at OBUS, MCBIST, EX or CORE
granularity. There's an inline function proc_gettracearray_target_type() that
will help determine the target type.
Change-Id: I093cd03bc90fbe93ed8fff3d18cd0676359fa5d1
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22847
Dev-Ready: Joachim Fenkes <fenkes@de.ibm.com>
Tested-by: Jenkins Server
Tested-by: PPE CI
Tested-by: Hostboot CI
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22850
Tested-by: FSP CI Jenkins
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
| -rw-r--r-- | src/import/chips/p9/common/include/p9_quad_scom_addresses_fixes.H | 8 | ||||
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | 20 |
2 files changed, 26 insertions, 2 deletions
diff --git a/src/import/chips/p9/common/include/p9_quad_scom_addresses_fixes.H b/src/import/chips/p9/common/include/p9_quad_scom_addresses_fixes.H index d9a153036..ec60ac81f 100644 --- a/src/import/chips/p9/common/include/p9_quad_scom_addresses_fixes.H +++ b/src/import/chips/p9/common/include/p9_quad_scom_addresses_fixes.H @@ -7,7 +7,7 @@ /* */ /* EKB Project */ /* */ -/* COPYRIGHT 2015 */ +/* COPYRIGHT 2015,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -53,4 +53,10 @@ REG64( C_PPM_CGCR_CLEAR , RULL(0x200F0166 REG64( C_PPM_CGCR_OR , RULL(0x200F0167), SH_UNT_C , SH_ACS_SCOM2_OR ); +FIXREG64( EQ_TPLC20_TR0_TRACE_HI_DATA_REG, RULL(0x10012800), SH_UNT_EQ, SH_ACS_SCOM_RO, RULL(0x10012900)); +FIXREG64( EQ_TPLC20_TR1_TRACE_HI_DATA_REG, RULL(0x10012840), SH_UNT_EQ, SH_ACS_SCOM_RO, RULL(0x10012940)); +FIXREG64( EQ_TPLC21_TR0_TRACE_HI_DATA_REG, RULL(0x10012C00), SH_UNT_EQ, SH_ACS_SCOM_RO, RULL(0x10012D00)); +FIXREG64( EQ_TPLC21_TR1_TRACE_HI_DATA_REG, RULL(0x10012C40), SH_UNT_EQ, SH_ACS_SCOM_RO, RULL(0x10012D40)); + + #endif diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index d89a34ad8..b56d4cead 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -25,12 +25,30 @@ <attributes> <!-- ********************************************************************* --> <attribute> + <id>ATTR_CHIP_EC_FEATURE_CORE_TRACE_SCOMABLE</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Returns true if the core trace arrays are dumpable via SCOM. + Nimbus EC 0x20 or greater + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x20</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ********************************************************************* --> + <attribute> <id>ATTR_CHIP_EC_FEATURE_TEST1</id> <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_MEMBUF_CHIP</targetType> <description> Returns if a chip contains the TEST1 feature. True if either: Centaur EC 10 - Venice EC greater than 30 + Cumulus EC greater than 30 </description> <chipEcFeature> <chip> |
