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| author | Brian Silver <bsilver@us.ibm.com> | 2016-09-08 12:47:02 -0500 |
|---|---|---|
| committer | William G. Hoffa <wghoffa@us.ibm.com> | 2016-09-14 15:41:46 -0400 |
| commit | 7c2d644cce94967ebc322442ca9680edaea47d0e (patch) | |
| tree | ed541c8b77e35508ba9947c20a55c26a438aa0e0 | |
| parent | 8ae281fd251584f628d5f7605143c405eec2b6c7 (diff) | |
| download | talos-hostboot-7c2d644cce94967ebc322442ca9680edaea47d0e.tar.gz talos-hostboot-7c2d644cce94967ebc322442ca9680edaea47d0e.zip | |
Change RCD, MRS polling delays; calculated no longer static
Change-Id: I93eea0b81944402c7070a6a4beec415426461b37
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29388
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29445
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/dimm/mrs_load.C | 5 | ||||
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/dimm/rcd_load.C | 5 |
2 files changed, 10 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/mrs_load.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/mrs_load.C index 1ece04fd4..7fbf8cd4e 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/mrs_load.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/mrs_load.C @@ -60,6 +60,11 @@ fapi2::ReturnCode mrs_load<TARGET_TYPE_MCBIST>( const fapi2::Target<TARGET_TYPE_ // A vector of CCS instructions. We'll ask the targets to fill it, and then we'll execute it ccs::program<TARGET_TYPE_MCBIST> l_program; + // Clear the initial delays. This will force the CCS engine to recompute the delay based on the + // instructions in the CCS instruction vector + l_program.iv_poll.iv_initial_delay = 0; + l_program.iv_poll.iv_initial_sim_delay = 0; + for (auto c : i_target.getChildren<TARGET_TYPE_MCS>()) { for (auto p : c.getChildren<TARGET_TYPE_MCA>()) diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rcd_load.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rcd_load.C index 615626484..92d9ac1f9 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rcd_load.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rcd_load.C @@ -59,6 +59,11 @@ fapi2::ReturnCode rcd_load<TARGET_TYPE_MCBIST>( const fapi2::Target<TARGET_TYPE_ // A vector of CCS instructions. We'll ask the targets to fill it, and then we'll execute it ccs::program<TARGET_TYPE_MCBIST> l_program; + // Clear the initial delays. This will force the CCS engine to recompute the delay based on the + // instructions in the CCS instruction vector + l_program.iv_poll.iv_initial_delay = 0; + l_program.iv_poll.iv_initial_sim_delay = 0; + for (auto c : i_target.getChildren<TARGET_TYPE_MCS>()) { for (auto p : c.getChildren<TARGET_TYPE_MCA>()) |
