summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorBrian Silver <bsilver@us.ibm.com>2016-08-10 12:58:22 -0500
committerWilliam G. Hoffa <wghoffa@us.ibm.com>2016-08-12 13:14:30 -0400
commit78c72cd49b3562087808d4192b5bba3784f20868 (patch)
treefa8f504cf5e57de2825a9c9b32f4a06881dd5bef
parenteb58465b9c4943f69efae008c47af569d8cc5eb6 (diff)
downloadtalos-hostboot-78c72cd49b3562087808d4192b5bba3784f20868.tar.gz
talos-hostboot-78c72cd49b3562087808d4192b5bba3784f20868.zip
Change vpd decode to be after master rank decode
Change-Id: Id80b63a85a2238e994a7110a643cd0cbeffaa1d1 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28114 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28117 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.H7
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C33
2 files changed, 33 insertions, 7 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.H b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.H
index b124e5707..46dbbbf5d 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.H
@@ -65,9 +65,9 @@ class eff_config
template< fapi2::TargetType T >
eff_config( const fapi2::Target<T>& i_target, fapi2::ReturnCode& o_rc )
{
- // Decode the VPD for this MCS and stick it in the attributes.
- o_rc = decode_vpd(i_target);
- return;
+ // Leaving the fapi2::RaturnCode scaffolding in place as we'll likely need it
+ // in the future and this way it will be here. BRS
+ o_rc = fapi2::FAPI2_RC_SUCCESS;
}
//
@@ -743,7 +743,6 @@ class eff_config
///
fapi2::ReturnCode dram_trtp(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target);
- private:
///
/// @brief Grab the VPD blobs and decode into attributes
/// @param[in] i_target FAPI2 target (MCS)
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C
index 64bba4d09..89366ee8b 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C
@@ -54,7 +54,7 @@ fapi2::ReturnCode p9_mss_eff_config( const fapi2::Target<fapi2::TARGET_TYPE_MCS>
std::map<uint32_t, std::shared_ptr<mss::spd::decoder> > l_factory_caches;
mss::eff_config l_eff_config(i_target, l_rc);
- FAPI_TRY(l_rc, "Unable to decode VPD for %s", mss::c_str(i_target) );
+ FAPI_TRY(l_rc, "Unable to construct eff_config object for for %s", mss::c_str(i_target) );
// Caches
FAPI_TRY( mss::spd::populate_decoder_caches(i_target, l_factory_caches) );
@@ -70,7 +70,34 @@ fapi2::ReturnCode p9_mss_eff_config( const fapi2::Target<fapi2::TARGET_TYPE_MCS>
FAPI_TRY( mss::check::spd::invalid_cache(l_dimm,
l_it != l_factory_caches.end(),
l_dimm_pos),
- "Failed to get valid cache");
+ "Failed to get valid cache (rank decoder)");
+
+ l_eff_config.iv_pDecoder = l_it->second;
+
+ // <sigh> This is a little hackery. We needed to decode the DIMM's master ranks, so we can decode the VPD
+ // for this entire MCS. Which means we need to re-do the cache find and check which stinks.
+ FAPI_TRY( l_eff_config.master_ranks_per_dimm(l_dimm) );
+ }
+
+ // We need to decode the VPD. We don't do this in the ctor as we need
+ // the rank information and for that we need the SPD caches (which we get above.)
+ // However, we need to do the VPD decode before the others so that they might
+ // be able to use VPD information to make decisions about setting up eff attributes.
+ FAPI_TRY( l_eff_config.decode_vpd(i_target),
+ "Unable to decode VPD for %s", mss::c_str(i_target) );
+
+ for( const auto& l_dimm : mss::find_targets<fapi2::TARGET_TYPE_DIMM>(i_target) )
+ {
+ const auto l_dimm_pos = mss::pos(l_dimm);
+
+ // TODO: RTC 152390
+ // Find decoder factory for this dimm position
+ auto l_it = l_factory_caches.find(l_dimm_pos);
+
+ FAPI_TRY( mss::check::spd::invalid_cache(l_dimm,
+ l_it != l_factory_caches.end(),
+ l_dimm_pos),
+ "Failed to get valid cache (main decoder)");
l_eff_config.iv_pDecoder = l_it->second;
@@ -79,7 +106,7 @@ fapi2::ReturnCode p9_mss_eff_config( const fapi2::Target<fapi2::TARGET_TYPE_MCS>
FAPI_TRY( l_eff_config.dram_width(l_dimm) );
FAPI_TRY( l_eff_config.dram_density(l_dimm) );
FAPI_TRY( l_eff_config.ranks_per_dimm(l_dimm) );
- FAPI_TRY( l_eff_config.master_ranks_per_dimm(l_dimm) );
+ // Master ranks done above
FAPI_TRY( l_eff_config.primary_stack_type(l_dimm) );
FAPI_TRY( l_eff_config.dimm_size(l_dimm) );
FAPI_TRY( l_eff_config.hybrid_memory_type(l_dimm) );
OpenPOWER on IntegriCloud