INITPROC: Hostboot SW241732 Centaur power cleanup update

Change-Id: Ic548c364aaba7d30278fe7006844a7e5d82893cd
CQ:SW241732
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/8951
Tested-by: Jenkins Server
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

4 files changed, 178 insertions, 18 deletions

diff --git a/src/usr/hwpf/hwp/dram_initialization/mss_power_cleanup/memory_mss_power_cleanup.xml b/src/usr/hwpf/hwp/dram_initialization/mss_power_cleanup/memory_mss_power_cleanup.xml
new file mode 100644
index 000000000..101491fdf
--- /dev/null
+++ b/src/usr/hwpf/hwp/dram_initialization/mss_power_cleanup/memory_mss_power_cleanup.xml
@@ -0,0 +1,89 @@
+<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
+<!-- This is an automatically generated prolog.                             -->
+<!--                                                                        -->
+<!-- $Source: src/usr/hwpf/hwp/dram_initialization/mss_power_cleanup/memory_mss_power_cleanup.xml $ -->
+<!--                                                                        -->
+<!-- IBM CONFIDENTIAL                                                       -->
+<!--                                                                        -->
+<!-- COPYRIGHT International Business Machines Corp. 2014                   -->
+<!--                                                                        -->
+<!-- p1                                                                     -->
+<!--                                                                        -->
+<!-- Object Code Only (OCO) source materials                                -->
+<!-- Licensed Internal Code Source Materials                                -->
+<!-- IBM HostBoot Licensed Internal Code                                    -->
+<!--                                                                        -->
+<!-- The source code for this program is not published or otherwise         -->
+<!-- divested of its trade secrets, irrespective of what has been           -->
+<!-- deposited with the U.S. Copyright Office.                              -->
+<!--                                                                        -->
+<!-- Origin: 30                                                             -->
+<!--                                                                        -->
+<!-- IBM_PROLOG_END_TAG                                                     -->
+<hwpErrors>
+<!-- $Id: memory_mss_power_cleanup.xml,v 1.1 2014/02/05 19:18:41 bellows Exp $ -->
+<!-- For file ../../ipl/fapi/mss_power_cleanup.C -->
+<!-- // *! OWNER NAME : bellows@us.ibm.com -->
+<!-- // *! BACKUP NAME : -->
+
+<hwpError>
+  <rc>RC_MSS_POWER_CLEANUP_MBA0_UNEXPECTED_BAD_RC</rc>
+  <description>Procedure got an unexpected fail in a cfam or scom access for mba0</description>
+  <callout>
+    <target>MBA_CHIPLET</target>
+    <priority>HIGH</priority>
+  </callout>
+  <deconfigure>
+    <target>MBA_CHIPLET</target>
+  </deconfigure>
+  <gard>
+    <target>MBA_CHIPLET</target>
+  </gard>
+</hwpError>
+
+<hwpError>
+  <rc>RC_MSS_POWER_CLEANUP_MBA1_UNEXPECTED_BAD_RC</rc>
+  <description>Procedure got an unexpected fail in a cfam or scom access for mba1</description>
+  <callout>
+    <target>MBA_CHIPLET</target>
+    <priority>HIGH</priority>
+  </callout>
+  <deconfigure>
+    <target>MBA_CHIPLET</target>
+  </deconfigure>
+  <gard>
+    <target>MBA_CHIPLET</target>
+  </gard>
+</hwpError>
+
+<hwpError>
+  <rc>RC_MSS_POWER_CLEANUP_FENCING_UNEXPECTED_BAD_RC</rc>
+  <description>Procedure got an unexpected fail in a cfam or scom access during fencing</description>
+  <callout>
+    <target>CENTAUR</target>
+    <priority>HIGH</priority>
+  </callout>
+  <deconfigure>
+    <target>CENTAUR</target>
+  </deconfigure>
+  <gard>
+    <target>CENTAUR</target>
+  </gard>
+</hwpError>
+
+<hwpError>
+  <rc>RC_MSS_POWER_CLEANUP_CENTAUR_UNEXPECTED_BAD_RC</rc>
+  <description>Procedure got an unexpected fail in a cfam or scom access during centaur cleanup</description>
+  <callout>
+    <target>CENTAUR</target>
+    <priority>HIGH</priority>
+  </callout>
+  <deconfigure>
+    <target>CENTAUR</target>
+  </deconfigure>
+  <gard>
+    <target>CENTAUR</target>
+  </gard>
+</hwpError>
+
+</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dram_initialization/mss_power_cleanup/mss_power_cleanup.C b/src/usr/hwpf/hwp/dram_initialization/mss_power_cleanup/mss_power_cleanup.C
index c1fdfe800..76cb445e8 100644
--- a/src/usr/hwpf/hwp/dram_initialization/mss_power_cleanup/mss_power_cleanup.C
+++ b/src/usr/hwpf/hwp/dram_initialization/mss_power_cleanup/mss_power_cleanup.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2013                   */
+/* COPYRIGHT International Business Machines Corp. 2013,2014              */
 /*                                                                        */
 /* p1                                                                     */
 /*                                                                        */
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: mss_power_cleanup.C,v 1.4 2013/11/22 04:53:06 bellows Exp $
+// $Id: mss_power_cleanup.C,v 1.6 2014/02/17 19:21:37 bellows Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/centaur/working/procedures/ipl/fapi/mss_power_cleanup.C,v $
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2012
@@ -49,6 +49,8 @@
 //------------------------------------------------------------------------------
 // Version:|  Author: |  Date:  | Comment:
 //---------|----------|---------|-----------------------------------------------
+//   1.6   |bellows   |17-FEB-14| RAS review updates
+//   1.5   |bellows   |05-FEB-14| Making this procedure work on really non-functional centaurs
 //   1.4   |bellows   |21-Nov-13| Gerrit Review Updates - unused variable removed
 //   1.3   |bellows   |11-Nov-13| Gerrit Review Updates
 //   1.2   |bellows   |11-Nov-13| Update due to new istep location
@@ -100,24 +102,83 @@ extern "C"
 //------------------------------------------------------------------------------
   fapi::ReturnCode mss_power_cleanup(const fapi::Target & i_target_centaur, const fapi::Target & i_target_mba0, const fapi::Target & i_target_mba1)
   {
-    fapi::ReturnCode rc;
+    fapi::ReturnCode rc,rc0,rc1,rcf,rcc;
+    uint8_t centaur_functional=1, mba0_functional=1, mba1_functional=1;
+
 
     FAPI_INF("Running mss_power_cleanupon %s\n", i_target_centaur.toEcmdString());
 
     do {
-      rc = mss_power_cleanup_mba_part1(i_target_centaur, i_target_mba0);
-      if(rc) break;
-      rc = mss_power_cleanup_mba_part1(i_target_centaur, i_target_mba1);
-      if(rc) break;
+      rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL, &i_target_centaur, centaur_functional);
+      if(rc) { FAPI_ERR("ERROR: Cannot get ATTR_FUNCTIONAL"); break; }
 
-      rc = mss_power_cleanup_mba_fence(i_target_centaur, i_target_mba0, i_target_mba1);
-      if(rc) break;
+      rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL, &i_target_mba0, mba0_functional);
+      if(rc) { FAPI_ERR("ERROR: Cannot get ATTR_FUNCTIONAL"); break; }
 
-      rc = mss_power_cleanup_centaur(i_target_centaur);
-      if(rc) break;
+      rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL, &i_target_mba1, mba1_functional);
+      if(rc) { FAPI_ERR("ERROR: Cannot get ATTR_FUNCTIONAL"); break; }
+
+      rc0 = mss_power_cleanup_mba_part1(i_target_centaur, i_target_mba0);
+      rc1 = mss_power_cleanup_mba_part1(i_target_centaur, i_target_mba1);
 
+      rcf = mss_power_cleanup_mba_fence(i_target_centaur, i_target_mba0, i_target_mba1);
+
+      rcc = mss_power_cleanup_centaur(i_target_centaur);
+
+
+
+      if(rc0) {
+        if(mba0_functional) {
+          FAPI_ERR("mba0 was functional yet it got a bad return code");
+          const fapi::Target & MBA_CHIPLET = i_target_mba0;
+          FAPI_SET_HWP_ERROR(rc0, RC_MSS_POWER_CLEANUP_MBA0_UNEXPECTED_BAD_RC);
+          rc=rc0;
+          break;
+        }
+        else {
+          FAPI_INF("mba0 was not functional and it got a bad return code");
+        }
+      }
+
+      if(rc1) {
+        if(mba1_functional) {
+          FAPI_ERR("mba1 was functional yet it got a bad return code");
+          const fapi::Target & MBA_CHIPLET = i_target_mba1;
+          FAPI_SET_HWP_ERROR(rc1, RC_MSS_POWER_CLEANUP_MBA1_UNEXPECTED_BAD_RC);
+          rc=rc1;
+          break;
+        }
+        else {
+          FAPI_INF("mba1 was not functional and it got a bad return code");
+        }
+      }
+
+      if(rcf) {
+        if(centaur_functional) {
+          FAPI_ERR("centaur was functional yet it got a bad return code during fencing");
+          const fapi::Target & CENTAUR = i_target_centaur;
+          FAPI_SET_HWP_ERROR(rcf, RC_MSS_POWER_CLEANUP_FENCING_UNEXPECTED_BAD_RC);
+          rc=rcf;
+          break;
+        }
+        else {
+          FAPI_INF("centaur was not functional and it got a bad return code");
+        }
+      }
+
+      if(rcc) {
+        if(centaur_functional) {
+          FAPI_ERR("centaur was functional yet it got a bad return code during cleanup");
+          const fapi::Target & CENTAUR = i_target_centaur;
+          FAPI_SET_HWP_ERROR(rcc, RC_MSS_POWER_CLEANUP_CENTAUR_UNEXPECTED_BAD_RC);
+          rc=rcc;
+          break;
+        }
+        else {
+          FAPI_INF("centaur was not functional and it got a bad return code");
+        }
+      }
 
-    /* need to add code that fences and centaur and powers off clocks */
     } while(0); 
 
     return rc;
@@ -160,6 +221,7 @@ extern "C"
   fapi::ReturnCode mss_power_cleanup_mba_part1(const fapi::Target & i_target_centaur, const fapi::Target & i_target_mba) {
   // turn off functional vector
     fapi::ReturnCode rc;
+    uint8_t centaur_functional;
     uint8_t mba_functional;
     ecmdDataBufferBase data_buffer_64(64);
     uint32_t rc_num = 0;
@@ -170,12 +232,17 @@ extern "C"
     do
     {
       FAPI_INF("Starting mss_power_cleanup_mba_part1");
+
+      rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL, &i_target_centaur, centaur_functional);
+      if(rc) { FAPI_ERR("ERROR: Cannot get ATTR_FUNCTIONAL"); break; }
+      FAPI_INF("working on a centaur whose functional is %d", centaur_functional);
+
       rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL, &i_target_mba, mba_functional);
       if(rc) { FAPI_ERR("ERROR: Cannot get ATTR_FUNCTIONAL"); break; }
       FAPI_INF("working on an mba whose functional is %d", mba_functional);
 
 // But to clarify so there's no misconception, you can only turn off the clocks to the MEMS grid (Ports 2/3).  If you want to deconfigure Ports 0/1, there is no way to turn those clocks off. The best you can do there is shut down the PHY inside DDR (I think they have an ultra low power mode where you can turn off virtually everything including their PLLs, phase rotators, analogs , FIFOs, etc) plus of course you can disable their I/O. I think those steps should be done no matter which port you're deconfiguring, but in terms of the chip clock grid, you only get that additional power savings in the bad Port 2/3 case.
-      if(mba_functional == 0) {
+      if(centaur_functional == 1 && mba_functional == 0) {
         FAPI_INF("cleanup_part1 MBA not functional");
       // check that clocks are up to the DDR partition before turning it off
       // this case will only happen if we get memory up and later come back and want to
diff --git a/src/usr/hwpf/hwp/dram_initialization/mss_thermal_init/mss_thermal_init.C b/src/usr/hwpf/hwp/dram_initialization/mss_thermal_init/mss_thermal_init.C
index 1c42ab8cc..50ac8bcb7 100644
--- a/src/usr/hwpf/hwp/dram_initialization/mss_thermal_init/mss_thermal_init.C
+++ b/src/usr/hwpf/hwp/dram_initialization/mss_thermal_init/mss_thermal_init.C
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: mss_thermal_init.C,v 1.13 2014/01/30 22:00:51 pardeik Exp $
+// $Id: mss_thermal_init.C,v 1.14 2014/02/13 15:44:05 pardeik Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/centaur/working/procedures/ipl/fapi/mss_thermal_init.C,v $
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2011
@@ -47,6 +47,7 @@
 //------------------------------------------------------------------------------
 // Version:|  Author: |  Date:  | Comment:
 //---------|----------|---------|-----------------------------------------------
+//   1.14  | pardeik  |12-FEB-14| changed CONFIG_INTERVAL_TIMER from 5 to 15 to 
 //   1.13  | pardeik  |30-JAN-14| workaround for SW243504 (enable sensors on master
 //                              |   i2c bus if ATTR_MRW_CDIMM_MASTER_I2C_TEMP_SENSOR_ENABLE=ON)
 //   1.12  | pardeik  |06-JAN-14| enable writing of safemode IPL throttles
@@ -65,6 +66,8 @@
 //   1.2   | gollub   |05-SEP-12| Calling mss_unmask_fetch_errors after mss_thermal_init_cloned
 //   1.1   | joabhend |30-APR-12| First Draft
 
+
+
 //----------------------------------------------------------------------
 //  Includes
 //----------------------------------------------------------------------
@@ -145,9 +148,9 @@ fapi::ReturnCode mss_thermal_init(const fapi::Target & i_target)
       const uint32_t ACT_MASK_UPPER_HALF = 0x00018000;
       const uint32_t ACT_MASK_LOWER_HALF = 0x00000000;
       const uint32_t SENSOR_ADDR_MAP_ISDIMM = 0x01234567;
-// OCC polls cacheline every 2 ms.
-// For I2C bus at 50kHz (9.6 ms max to read 8 sensors), use interval of 5 to prevent stall error
-      const uint32_t CONFIG_INTERVAL_TIMER = 5;
+// OCC polls cacheline every 2 ms (could vary from this, as seen on scope)
+// For I2C bus at 50kHz (9.6 ms max to read 8 sensors), use interval of 15 for margin and to prevent stall errors when 8 sensors are enabled to be read
+      const uint32_t CONFIG_INTERVAL_TIMER = 15;
       const uint32_t CONFIG_STALL_TIMER = 128;
       const uint8_t I2C_BUS_ENCODE_PRIMARY = 0;
       const uint8_t I2C_BUS_ENCODE_SECONDARY = 8;
diff --git a/src/usr/hwpf/makefile b/src/usr/hwpf/makefile
index 44573ab92..64bdedd79 100644
--- a/src/usr/hwpf/makefile
+++ b/src/usr/hwpf/makefile
@@ -133,7 +133,8 @@ HWP_ERROR_XML_FILES = hwp/fapiHwpErrorInfo.xml   \
     hwp/dram_training/mem_pll_setup/cen_mem_pll_initf_errors.xml \
     hwp/dram_training/mem_pll_setup/cen_mem_pll_setup_errors.xml \
     hwp/core_activate/proc_check_slw_done/proc_check_slw_done_errors.xml \
-    hwp/dram_initialization/proc_throttle_sync/proc_throttle_sync_errors.xml
+    hwp/dram_initialization/proc_throttle_sync/proc_throttle_sync_errors.xml \
+    hwp/dram_initialization/mss_power_cleanup/memory_mss_power_cleanup.xml
 
 ## these get generated into obj/genfiles/AttributeIds.H
 HWP_ATTR_XML_FILES = hwp/memory_attributes.xml \