HWPF Attribute Support: L2/L3 epsilon register attributes - RTC4564

Change-Id: I51f9ac55afad27ff98eac07768ed52c986c05040
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/602
Tested-by: Jenkins Server
Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

6 files changed, 345 insertions, 2 deletions

diff --git a/src/usr/hwpf/hwp/L2_L3_attributes.xml b/src/usr/hwpf/hwp/L2_L3_attributes.xml
new file mode 100644
index 000000000..513d1052a
--- /dev/null
+++ b/src/usr/hwpf/hwp/L2_L3_attributes.xml
@@ -0,0 +1,116 @@
+<!--  IBM_PROLOG_BEGIN_TAG
+     This is an automatically generated prolog.
+   
+     $Source: src/usr/hwpf/hwp/L2_L3_attributes.xml $
+   
+     IBM CONFIDENTIAL
+   
+     COPYRIGHT International Business Machines Corp. 2012
+   
+     p1
+   
+     Object Code Only (OCO) source materials
+     Licensed Internal Code Source Materials
+     IBM HostBoot Licensed Internal Code
+   
+     The source code for this program is not published or other-
+     wise divested of its trade secrets, irrespective of what has
+     been deposited with the U.S. Copyright Office.
+   
+     Origin: 30
+   
+     IBM_PROLOG_END -->
+<attributes>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_L2_R_T0_EPS</id>
+    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
+    <description>L2 tier0 read epsilon register value.</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+    <persistRuntime/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_L2_R_T1_EPS</id>
+    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
+    <description>L2 tier1 read epsilon register value.</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+    <persistRuntime/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_L2_R_T2_EPS</id>
+    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
+    <description>L2 tier2 read epsilon register value.</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+    <persistRuntime/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_L2_FORCE_R_T2_EPS</id>
+    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
+    <description>L2 force tier2 read epsilon protect (all tiers).</description>
+    <valueType>uint8</valueType>
+    <enum>OFF = 0x00, ON = 0x01</enum>
+    <writeable/>
+    <persistRuntime/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_L2_W_EPS</id>
+    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
+    <description>L2 write epsilon register value.</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+    <persistRuntime/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_L3_R_T0_EPS</id>
+    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
+    <description>L3 tier0 read epsilon register value.</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+    <persistRuntime/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_L3_R_T1_EPS</id>
+    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
+    <description>L3 tier1 read epsilon register value.</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+    <persistRuntime/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_L3_R_T2_EPS</id>
+    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
+    <description>L3 tier2 read epsilon register value.</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+    <persistRuntime/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_L3_FORCE_R_T2_EPS</id>
+    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
+    <description>L3 force tier2 read epsilon protect (all tiers).</description>
+    <valueType>uint8</valueType>
+    <enum>OFF = 0x00, ON = 0x01</enum>
+    <writeable/>
+    <persistRuntime/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_L3_W_EPS</id>
+    <targetType>TARGET_TYPE_EX_CHIPLET</targetType>
+    <description>L3 write epsilon register value.</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+    <persistRuntime/>
+  </attribute>
+</attributes>
diff --git a/src/usr/hwpf/hwp/fapiTestHwpAttr.C b/src/usr/hwpf/hwp/fapiTestHwpAttr.C
index 21a9a7356..731c82720 100755
--- a/src/usr/hwpf/hwp/fapiTestHwpAttr.C
+++ b/src/usr/hwpf/hwp/fapiTestHwpAttr.C
@@ -95,6 +95,31 @@ fapi::ReturnCode hwpTestAttributes()
         }
 
         //----------------------------------------------------------------------
+        // Test ATTR_L2_R_T0_EPS
+        //----------------------------------------------------------------------
+        {
+            TARGETING::PredicateCTM l_pred(TARGETING::CLASS_UNIT,
+                                                      TARGETING::TYPE_EX);
+            TARGETING::TargetRangeFilter l_filter(
+                                    TARGETING::targetService().begin(),
+                                    TARGETING::targetService().end(), &l_pred);
+            // Use the first EX chiplet
+            if (l_filter)
+            {
+                uint32_t l_tmp;
+                fapi::Target l_target(fapi::TARGET_TYPE_EX_CHIPLET, *l_filter);
+                fapi::Target * l_pTarget = &l_target;
+
+                l_rc = FAPI_ATTR_GET(ATTR_L2_R_T0_EPS, l_pTarget, l_tmp);
+                if (l_rc)
+                {
+                    FAPI_ERR("hwpTestAttributes: L2/L3 ATTR. Error from GET");
+                    break;
+                }
+            }
+        }
+
+        //----------------------------------------------------------------------
         // Test ATTR_SCRATCH_UINT8_1
         //----------------------------------------------------------------------
         {
diff --git a/src/usr/hwpf/makefile b/src/usr/hwpf/makefile
index d87bb65bc..58189d9f9 100644
--- a/src/usr/hwpf/makefile
+++ b/src/usr/hwpf/makefile
@@ -32,7 +32,8 @@ SUBDIRS = fapi.d hwp.d plat.d test.d
 #------------------------------------------------------------------------------
 HWP_ERROR_XML_FILES = hwp/fapiHwpErrorInfo.xml
 HWP_ATTR_XML_FILES = hwp/fapiHwpAttributeInfo.xml \
-                     hwp/memory_attributes.xml
+                     hwp/memory_attributes.xml \
+                     hwp/L2_L3_attributes.xml
 
 #------------------------------------------------------------------------------
 # Initfiles
diff --git a/src/usr/targeting/xmltohb/attribute_types.xml b/src/usr/targeting/xmltohb/attribute_types.xml
index 2e3822612..9adbbb126 100644
--- a/src/usr/targeting/xmltohb/attribute_types.xml
+++ b/src/usr/targeting/xmltohb/attribute_types.xml
@@ -2598,4 +2598,174 @@
     </hwpfToHbAttrMap>
 </attribute>
 
+<attribute>
+    <id>L2_R_T0_EPS</id>
+    <description>L2 tier0 read epsilon register value.</description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_L2_R_T0_EPS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>L2_R_T1_EPS</id>
+    <description>L2 tier1 read epsilon register value.</description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_L2_R_T1_EPS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>L2_R_T2_EPS</id>
+    <description>L2 tier2 read epsilon register value.</description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_L2_R_T2_EPS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>L2_FORCE_R_T2_EPS</id>
+    <description>L2 force tier2 read epsilon protect (all tiers).</description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_L2_FORCE_R_T2_EPS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>L2_W_EPS</id>
+    <description>L2 write epsilon register value.</description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_L2_W_EPS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>L3_R_T0_EPS</id>
+    <description>L3 tier0 read epsilon register value.</description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_L3_R_T0_EPS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>L3_R_T1_EPS</id>
+    <description>L3 tier1 read epsilon register value.</description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_L3_R_T1_EPS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>L3_R_T2_EPS</id>
+    <description>L3 tier2 read epsilon register value.</description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_L3_R_T2_EPS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>L3_FORCE_R_T2_EPS</id>
+    <description>L3 force tier2 read epsilon protect (all tiers).</description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_L3_FORCE_R_T2_EPS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>L3_W_EPS</id>
+    <description>L3 write epsilon register value.</description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_L3_W_EPS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
 </attributes>
diff --git a/src/usr/targeting/xmltohb/makefile b/src/usr/targeting/xmltohb/makefile
index 4e61e142f..7dccc3003 100644
--- a/src/usr/targeting/xmltohb/makefile
+++ b/src/usr/targeting/xmltohb/makefile
@@ -47,7 +47,8 @@ XMLTOHB_GENERIC_SOURCES = attribute_types.xml target_types.xml
 
 XMLTOHB_FAPIATTR_SOURCES = \
     ${ROOTPATH}/src/usr/hwpf/hwp/fapiHwpAttributeInfo.xml \
-    ${ROOTPATH}/src/usr/hwpf/hwp/memory_attributes.xml
+    ${ROOTPATH}/src/usr/hwpf/hwp/memory_attributes.xml \
+    ${ROOTPATH}/src/usr/hwpf/hwp/L2_L3_attributes.xml
 
 VMM_CONSTS_FILE = \
     ${ROOTPATH}/src/include/usr/vmmconst.h
diff --git a/src/usr/targeting/xmltohb/target_types.xml b/src/usr/targeting/xmltohb/target_types.xml
index 8529b780a..a4be0cab1 100644
--- a/src/usr/targeting/xmltohb/target_types.xml
+++ b/src/usr/targeting/xmltohb/target_types.xml
@@ -257,6 +257,36 @@
         <id>TYPE</id>
         <default>EX</default>
     </attribute>
+    <attribute>
+        <id>L2_R_T0_EPS</id>
+    </attribute>
+    <attribute>
+        <id>L2_R_T1_EPS</id>
+    </attribute>
+    <attribute>
+        <id>L2_R_T2_EPS</id>
+    </attribute>
+    <attribute>
+        <id>L2_FORCE_R_T2_EPS</id>
+    </attribute>
+    <attribute>
+        <id>L2_W_EPS</id>
+    </attribute>
+    <attribute>
+        <id>L3_R_T0_EPS</id>
+    </attribute>
+    <attribute>
+        <id>L3_R_T1_EPS</id>
+    </attribute>
+    <attribute>
+        <id>L3_R_T2_EPS</id>
+    </attribute>
+    <attribute>
+        <id>L3_FORCE_R_T2_EPS</id>
+    </attribute>
+    <attribute>
+        <id>L3_W_EPS</id>
+    </attribute>
 </targetType>
 
 <targetType>