Changes for PM RAS Review #2

Change-Id: I4cacaf6df60a9b82a09594c374d73bc35f84b67f
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/6699
Tested-by: Jenkins Server
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

14 files changed, 555 insertions, 352 deletions

diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_errors.xml b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_errors.xml
index 890f45fb7..78f91ddad 100644
--- a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_errors.xml
+++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_errors.xml
@@ -20,7 +20,7 @@
 <!-- Origin: 30                                                             -->
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_poreslw_errors.xml,v 1.2 2013/05/23 18:44:32 stillgs Exp $ -->
+<!-- $Id: p8_poreslw_errors.xml,v 1.3 2013/09/25 22:28:06 stillgs Exp $ -->
 <!-- Error definitions for p8_poreslw procedure -->
 <hwpErrors>
   <!-- *********************************************************************** -->
@@ -32,10 +32,26 @@
   <hwpError>
     <rc>RC_PROCPM_SLW_RESET_TIMEOUT</rc>
     <description>SLW reset failed in p8_poreslw_init.</description>
+    <ffdc>POLLCOUNT</ffdc>
+    <ffdc>MAXPOLLS</ffdc>
+    <collectRegisterFfdc>
+      <id>REG_FFDC_PROC_SLW_REGISTERS</id>
+      <id>REG_FFDC_PROC_SLW_FIR_REGISTERS</id>
+      <target>CHIP</target>
+    </collectRegisterFfdc>
+    <callout>
+      <target>CHIP</target>     
+      <priority>HIGH</priority>
+    </callout>    
   </hwpError>
   <!-- *********************************************************************** -->
   <hwpError>
     <rc>RC_PROCPM_PORESLW_CODE_BAD_MODE</rc>
     <description>Unknown mode passed to p8_poreslw_init.</description>
+    <ffdc>IMODE</ffdc>
+    <callout>
+      <procedure>CODE</procedure>      
+      <priority>HIGH</priority>
+    </callout>
   </hwpError>
 </hwpErrors>
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.C b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.C
index 72dd48dab..4d7040605 100644
--- a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.C
+++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.C
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_poreslw_init.C,v 1.15 2013/08/02 19:09:56 stillgs Exp $
+// $Id: p8_poreslw_init.C,v 1.16 2013/09/25 22:36:39 stillgs Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_poreslw_init.C,v $
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2011
@@ -141,6 +141,7 @@ p8_poreslw_init(const Target& i_target, uint32_t mode)
     else {
 
       FAPI_ERR("Unknown mode passed to p8_poreslw_init. Mode %x ....", mode);
+      uint32_t & IMODE = mode;
       FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PORESLW_CODE_BAD_MODE);
 
     }
@@ -325,6 +326,9 @@ poreslw_reset(const Target& i_target)
         if(!wait_state_detected)
         {
           FAPI_ERR("PORE SLW reset failed ");
+          const fapi::Target & CHIP = i_target;
+          uint32_t           & POLLCOUNT = poll_count;
+          const uint32_t     & MAXPOLLS = max_polls;
           FAPI_SET_HWP_ERROR(rc, RC_PROCPM_SLW_RESET_TIMEOUT);
         }
 
@@ -461,16 +465,18 @@ poreslw_ex_setup(const Target& i_target)
                 pm_winkle_exit);
 
         */
+        
+        // 9/16/13: L3 High Availablity is not supported on P8 any longer.  Removing.
         // Due to L3 High Availability Write Pointers that must be
         // saved upon a Deep Winkle Entry, this transition must be
         // assisted.
-        // \todo  need Attribute for L3 HA enabled.  GA1 = NO
-        if (pm_winkle_entry != ASSISTED)
-        {
-            FAPI_INF("Winkle Entry is not configured in ASSISTED mode.  L3 High Availability functions"
-                        " are not supported");
-            FAPI_INF("Continuing anyway....");
-        }
+        // If ever supported, would need an Attribute for L3 HA enabled.  GA1 = NO
+        //if (pm_winkle_entry != ASSISTED)
+        //{
+        //    FAPI_INF("Winkle Entry is not configured in ASSISTED mode.  L3 High Availability functions"
+        //             " are not supported");
+        //    FAPI_INF("Continuing anyway....");
+        //}
 
         // --------------------------------------
         // Walk the configured chiplets
@@ -501,149 +507,196 @@ poreslw_ex_setup(const Target& i_target)
                 break;
             }
 
-            address = EX_GP3_0x100F0012 + (l_ex_number * 0x01000000);
-            rc=fapiGetScom(i_target, address, data);
-            if(rc)
+            FAPI_INF("\tSetting up Core %X ", l_ex_number);
+
+            //  ******************************************************************
+            //  Set PMGP1_REG
+            //  ******************************************************************
+
+            FAPI_DBG("\t-----------------------------------------------------");
+            FAPI_DBG("\tPMGP1_REG Configuration                  ");
+            FAPI_DBG("\t-----------------------------------------------------");
+            FAPI_DBG("\t  pm_sleep_entry          => %d ", pm_sleep_entry );
+            FAPI_DBG("\t  pm_sleep_exit           => %d ", pm_sleep_exit  );
+            FAPI_DBG("\t  pm_sleep_type           => %d ", pm_sleep_type  );
+            FAPI_DBG("\t  pm_winkle_entry         => %d ", pm_winkle_entry  );
+            FAPI_DBG("\t  pm_winkle_exit          => %d ", pm_winkle_exit  );
+            FAPI_DBG("\t  pm_winkle_type          => %d ", pm_winkle_type  );
+            FAPI_DBG("\t-----------------------------------------------------");
+
+
+            FAPI_DBG("\t*************************************");
+            FAPI_INF("\tSetup PMGP1_REG for EX %x", l_ex_number);
+            FAPI_DBG("\t*************************************");
+
+            // Initialize the set and clear vectors
+            e_rc |= clear_data.flushTo1();  // Set to 1s to be used for WAND
+            e_rc |= set_data.flushTo0();    // Set to 0s to be used for WOR
+
+            // If   sleep entry = 1 (hardware), sleep power down enable = 1
+            // else sleep entry = 0 (assisted), sleep power down enable = 0
+            if (pm_sleep_entry)
             {
-                FAPI_ERR("GetScom error");
-                break;
+                e_rc |= set_data.setBit(PM_SLEEP_POWER_DOWN_EN_BIT);
+            }
+            else
+            {
+                e_rc |= clear_data.clearBit(PM_SLEEP_POWER_DOWN_EN_BIT);
             }
 
-            // Check if chiplet enable bit is set (configured).  If so, process
-            if ( data.isBitSet(0) )
+            // If   sleep exit  = 1 (hardware), sleep power up enable = 1
+            // else sleep exit  = 0 (assisted), sleep power up enable = 0
+            if (pm_sleep_exit)
             {
-                FAPI_INF("\tSetting up Core %X ", l_ex_number);
-
-                //  ******************************************************************
-                //  Set PMGP1_REG
-                //  ******************************************************************
-
-                FAPI_DBG("\t-----------------------------------------------------");
-                FAPI_DBG("\tPMGP1_REG Configuration                  ");
-                FAPI_DBG("\t-----------------------------------------------------");
-                FAPI_DBG("\t  pm_sleep_entry          => %d ", pm_sleep_entry );
-                FAPI_DBG("\t  pm_sleep_exit           => %d ", pm_sleep_exit  );
-                FAPI_DBG("\t  pm_sleep_type           => %d ", pm_sleep_type  );
-                FAPI_DBG("\t  pm_winkle_entry         => %d ", pm_winkle_entry  );
-                FAPI_DBG("\t  pm_winkle_exit          => %d ", pm_winkle_exit  );
-                FAPI_DBG("\t  pm_winkle_type          => %d ", pm_winkle_type  );
-                FAPI_DBG("\t-----------------------------------------------------");
-
-
-                FAPI_DBG("\t*************************************");
-                FAPI_INF("\tSetup PMGP1_REG for EX %x", l_ex_number);
-                FAPI_DBG("\t*************************************");
-
-                // Initialize the set and clear vectors
-                e_rc |= clear_data.flushTo1();  // Set to 1s to be used for WAND
-                e_rc |= set_data.flushTo0();    // Set to 0s to be used for WOR
-
-                // If   sleep entry = 1 (hardware), sleep power down enable = 1
-                // else sleep entry = 0 (assisted), sleep power down enable = 0
-                if (pm_sleep_entry)
-                {
-                    e_rc |= set_data.setBit(PM_SLEEP_POWER_DOWN_EN_BIT);
-                }
-                else
-                {
-                    e_rc |= clear_data.clearBit(PM_SLEEP_POWER_DOWN_EN_BIT);
-                }
+                e_rc |= set_data.setBit(PM_SLEEP_POWER_UP_EN_BIT);
+            }
+            else
+            {
+                e_rc |= clear_data.clearBit(PM_SLEEP_POWER_UP_EN_BIT);
+            }
 
-                // If   sleep exit  = 1 (hardware), sleep power up enable = 1
-                // else sleep exit  = 0 (assisted), sleep power up enable = 0
-                if (pm_sleep_exit)
-                {
-                    e_rc |= set_data.setBit(PM_SLEEP_POWER_UP_EN_BIT);
-                }
-                else
-                {
-                    e_rc |= clear_data.clearBit(PM_SLEEP_POWER_UP_EN_BIT);
-                }
+            // If   sleep type  = 1 (deep), sleep power up sel = 1
+            // else sleep type  = 0 (fast), sleep power up sel = 0
+            if (pm_sleep_type)
+            {
+                e_rc |= set_data.setBit(PM_SLEEP_POWER_OFF_SEL_BIT);
 
-                // If   sleep type  = 1 (deep), sleep power up sel = 1
-                // else sleep type  = 0 (fast), sleep power up sel = 0
-                if (pm_sleep_type)
-                {
-                    e_rc |= set_data.setBit(PM_SLEEP_POWER_OFF_SEL_BIT);
+            }
+            else
+            {
+                e_rc |= clear_data.clearBit(PM_SLEEP_POWER_OFF_SEL_BIT);
+            }
 
-                }
-                else
-                {
-                    e_rc |= clear_data.clearBit(PM_SLEEP_POWER_OFF_SEL_BIT);
-                }
+            // If   winkle entry = 1 (hardware), winkle power down enable = 1
+            // else winkle entry = 0 (assisted), winkle power down enable = 0
+            if (pm_winkle_entry)
+            {
+                e_rc |= set_data.setBit(PM_WINKLE_POWER_DOWN_EN_BIT);
+            }
+            else
+            {
+                e_rc |= clear_data.clearBit(PM_WINKLE_POWER_DOWN_EN_BIT);
+            }
 
-                // If   winkle entry = 1 (hardware), winkle power down enable = 1
-                // else winkle entry = 0 (assisted), winkle power down enable = 0
-                if (pm_winkle_entry)
-                {
-                    e_rc |= set_data.setBit(PM_WINKLE_POWER_DOWN_EN_BIT);
-                }
-                else
-                {
-                    e_rc |= clear_data.clearBit(PM_WINKLE_POWER_DOWN_EN_BIT);
-                }
+            // If   winkle exit  = 1 (hardware), winkle power up enable = 1
+            // else winkle exit  = 0 (assisted), winkle power up enable = 0
+            if (pm_winkle_exit)
+            {
+                e_rc |= set_data.setBit(PM_WINKLE_POWER_UP_EN_BIT);
+            }
+            else
+            {
+                e_rc |= clear_data.clearBit(PM_WINKLE_POWER_UP_EN_BIT);
+            }
 
-                // If   winkle exit  = 1 (hardware), winkle power up enable = 1
-                // else winkle exit  = 0 (assisted), winkle power up enable = 0
-                if (pm_winkle_exit)
-                {
-                    e_rc |= set_data.setBit(PM_WINKLE_POWER_UP_EN_BIT);
-                }
-                else
-                {
-                    e_rc |= clear_data.clearBit(PM_WINKLE_POWER_UP_EN_BIT);
-                }
+            // If   winkle type  = 1 (deep), winkle power up sel = 1
+            // else winkle type  = 0 (fast), winkle power up sel = 0
+            if (pm_winkle_type)
+            {
+                e_rc |= set_data.setBit(PM_WINKLE_POWER_OFF_SEL_BIT);
 
-                // If   winkle type  = 1 (deep), winkle power up sel = 1
-                // else winkle type  = 0 (fast), winkle power up sel = 0
-                if (pm_winkle_type)
-                {
-                    e_rc |= set_data.setBit(PM_WINKLE_POWER_OFF_SEL_BIT);
+            }
+            else
+            {
+                e_rc |= clear_data.clearBit(PM_WINKLE_POWER_OFF_SEL_BIT);
+            }
 
-                }
-                else
-                {
-                    e_rc |= clear_data.clearBit(PM_WINKLE_POWER_OFF_SEL_BIT);
-                }
+            // Check for any errors from set/clear ops into the buffers
+            if (e_rc)
+            {
+                FAPI_ERR("eCmdDataBuffer operation failed. rc = 0x%x", (uint32_t)e_rc);
+                rc.setEcmdError(e_rc);
+                break;
+            }
 
-                // Check for any errors from set/clear ops into the buffers
-                if (e_rc)
-                {
-                    FAPI_ERR("eCmdDataBuffer operation failed. rc = 0x%x", (uint32_t)e_rc);
-                    rc.setEcmdError(e_rc);
-                    break;
-                }
+            // The set and clear vectors are built.  Write them to
+            // the respective addresses.
+            FAPI_DBG("\tEX_PMGP1_WOR  0x%16llx" , set_data.getDoubleWord(0));
+            address = EX_PMGP1_REG_0_WORx100F0105 + (l_ex_number * 0x01000000);
+            rc=fapiPutScom(i_target, address, set_data);
+            if (rc)
+            {
+                FAPI_ERR("fapiPutScom(EX_PMGP1_REG_0_WORx100F0105) failed. rc = 0x%x", (uint32_t)rc);
+                break;
+            }
 
-                // The set and clear vectors are built.  Write them to
-                // the respective addresses.
-                FAPI_DBG("\tEX_PMGP1_WOR  0x%16llx" , set_data.getDoubleWord(0));
-                address = EX_PMGP1_REG_0_WORx100F0105 + (l_ex_number * 0x01000000);
-                rc=fapiPutScom(i_target, address, set_data);
-                if (rc)
-                {
-                    FAPI_ERR("fapiPutScom(EX_PMGP1_REG_0_WORx100F0105) failed. rc = 0x%x", (uint32_t)rc);
-                    break;
-                }
+            FAPI_DBG("\tEX_PMGP1_WAND 0x%16llx" , clear_data.getDoubleWord(0));
+            address = EX_PMGP1_REG_0_WANDx100F0104 + (l_ex_number * 0x01000000);
+            rc=fapiPutScom(i_target, address, clear_data);
+            if (rc)
+            {
+                FAPI_ERR("fapiPutScom(EX_PMGP1_REG_0_WORx100F0105) failed. rc = 0x%x", (uint32_t)rc);
+                break;
+            }
 
-                FAPI_DBG("\tEX_PMGP1_WAND 0x%16llx" , clear_data.getDoubleWord(0));
-                address = EX_PMGP1_REG_0_WANDx100F0104 + (l_ex_number * 0x01000000);
-                rc=fapiPutScom(i_target, address, clear_data);
-                if (rc)
-                {
-                    FAPI_ERR("fapiPutScom(EX_PMGP1_REG_0_WORx100F0105) failed. rc = 0x%x", (uint32_t)rc);
-                    break;
-                }
+            FAPI_INF("\tDisable the PCBS Heartbeat EX %x", l_ex_number);
+            address = EX_SLAVE_CONFIG_0x100F001E + (l_ex_number * 0x01000000);
+            rc = fapiGetScom(i_target, address, data);
+            if(!rc.ok())
+            {
+                FAPI_ERR("Scom error reading PCBS Slave Config");
+                break;
+            }
 
-                FAPI_INF("\tDisable the PCBS Heartbeat EX %x", l_ex_number);
-                address = EX_SLAVE_CONFIG_0x100F001E + (l_ex_number * 0x01000000);
-                rc = fapiGetScom(i_target, address, data);
-                if(!rc.ok())
-                {
-                    FAPI_ERR("Scom error reading PCBS Slave Config");
-                    break;
-                }
+            e_rc |= data.setBit(4);
+            if (e_rc)
+            {
+                FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc);
+                rc.setEcmdError(e_rc);
+                break;
+            }
+
+            rc=fapiPutScom(i_target, address, data);
+            if(!rc.ok())
+            {
+                FAPI_ERR("Scom error writing PCBS Slave Config");
+                break;
+            }
+
+            // --------------------------------------
+            FAPI_INF("\tSet PMGP0(46) to deal with HW259509 - winkle Pstate stepping hang");
+            // This is a spare bit in Murano and Venice DD1s but
+            // is necessary to set in Murano and Venice DD2 to deal
+            // the hang condition that is fixed.  As bit 46 is spare
+            // in the previous levels, setting it on all levels is not
+            // harmful.
+            address = EX_PMGP0_OR_0x100F0102 + (l_ex_number * 0x01000000);
+            e_rc |= data.flushTo0();
+            e_rc |= data.setBit(46);
+            if (e_rc)
+            {
+                FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc);
+                rc.setEcmdError(e_rc);
+                break;
+            }
+
+            rc=fapiPutScom(i_target, address, data);
+            if(!rc.ok())
+            {
+                FAPI_ERR("Scom error setting PMGP0");
+                break;
+            }
+
+            // --------------------------------------
+            // Check that PM function is enabled (eg not disabled).
+            // If not, remove the disable
+
+            address = EX_PMGP0_0x100F0100 + (l_ex_number * 0x01000000);
+            rc=fapiGetScom(i_target, address, data);
+            if(!rc.ok())
+            {
+                FAPI_ERR("Scom error reading PMGP0");
+                break;
+            }
 
-                e_rc |= data.setBit(4);
+            if (data.isBitSet(PM_DISABLE))
+            {
+
+                // Activate the PCBS-PM macro by clearing the PM_DISABLE bit
+                FAPI_INF("\tActivate the PCBS-PM for EX %x", l_ex_number);
+
+                e_rc |= data.flushTo1();
+                e_rc |= data.clearBit(PM_DISABLE);
                 if (e_rc)
                 {
                     FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc);
@@ -651,23 +704,29 @@ poreslw_ex_setup(const Target& i_target)
                     break;
                 }
 
+                address = EX_PMGP0_AND_0x100F0101 + (l_ex_number * 0x01000000);
                 rc=fapiPutScom(i_target, address, data);
                 if(!rc.ok())
                 {
-                    FAPI_ERR("Scom error writing PCBS Slave Config");
+                    FAPI_ERR("Scom error writing EX_PMGP0_OR");
                     break;
                 }
+            }
+
+            // --------------------------------------
+            // Clear OCC Special Wake-up bit - only 1 bit in the register
+            address = EX_PMSpcWkupOCC_REG_0x100F010C + (l_ex_number * 0x01000000);
+            rc=fapiGetScom(i_target, address, data);
+            if(!rc.ok())
+            {
+                FAPI_ERR("Scom error clearing EX_OCC_SPWKUP");
+                break;
+            }
 
-                // --------------------------------------
-                FAPI_INF("\tSet PMGP0(46) to deal with HW259509 - winkle Pstate stepping hang");
-                // This is a spare bit in Murano and Venice DD1s but
-                // is necessary to set in Murano and Venice DD2 to deal
-                // the hang condition that is fixed.  As bit 46 is spare
-                // in the previous levels, setting it on all levels is not
-                // harmful.
-                address = EX_PMGP0_OR_0x100F0102 + (l_ex_number * 0x01000000);
+            if (data.isBitSet(0))
+            {
+                FAPI_INF("\tClear OCC Special Wake-up for EX %x", l_ex_number);
                 e_rc |= data.flushTo0();
-                e_rc |= data.setBit(46);
                 if (e_rc)
                 {
                     FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc);
@@ -678,90 +737,25 @@ poreslw_ex_setup(const Target& i_target)
                 rc=fapiPutScom(i_target, address, data);
                 if(!rc.ok())
                 {
-                    FAPI_ERR("Scom error setting PMGP0");
-                    break;
-                }
-
-                // --------------------------------------
-                // Check that PM function is enabled (eg not disabled).
-                // If not, remove the disable
-
-                address = EX_PMGP0_0x100F0100 + (l_ex_number * 0x01000000);
-                rc=fapiGetScom(i_target, address, data);
-                if(!rc.ok())
-                {
-                    FAPI_ERR("Scom error reading PMGP0");
-                    break;
-                }
-
-                if (data.isBitSet(PM_DISABLE))
-                {
-
-                    // Activate the PCBS-PM macro by clearing the PM_DISABLE bit
-                    FAPI_INF("\tActivate the PCBS-PM for EX %x", l_ex_number);
-
-                    e_rc |= data.flushTo1();
-                    e_rc |= data.clearBit(PM_DISABLE);
-                    if (e_rc)
-                    {
-                        FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc);
-                        rc.setEcmdError(e_rc);
-                        break;
-                    }
-
-                    address = EX_PMGP0_AND_0x100F0101 + (l_ex_number * 0x01000000);
-                    rc=fapiPutScom(i_target, address, data);
-                    if(!rc.ok())
-                    {
-                        FAPI_ERR("Scom error writing EX_PMGP0_OR");
-                        break;
-                    }
-                }
-
-                // --------------------------------------
-                // Clear OCC Special Wake-up bit - only 1 bit in the register
-                address = EX_PMSpcWkupOCC_REG_0x100F010C + (l_ex_number * 0x01000000);
-                rc=fapiGetScom(i_target, address, data);
-                if(!rc.ok())
-                {
                     FAPI_ERR("Scom error clearing EX_OCC_SPWKUP");
                     break;
                 }
+            }
 
-                if (data.isBitSet(0))
-                {
-                    FAPI_INF("\tClear OCC Special Wake-up for EX %x", l_ex_number);
-                    e_rc |= data.flushTo0();
-                    if (e_rc)
-                    {
-                        FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", e_rc);
-                        rc.setEcmdError(e_rc);
-                        break;
-                    }
-
-                    rc=fapiPutScom(i_target, address, data);
-                    if(!rc.ok())
-                    {
-                        FAPI_ERR("Scom error clearing EX_OCC_SPWKUP");
-                        break;
-                    }
-                }
-
-                // --------------------------------------
-                // Initialize the special wake-up tracking attributes
-                FAPI_INF("\tInitialize the special wake-up tracking attributes");
+            // --------------------------------------
+            // Initialize the special wake-up tracking attributes
+            FAPI_INF("\tInitialize the special wake-up tracking attributes");
 
-                FAPI_EXEC_HWP(rc,  p8_cpu_special_wakeup,
-                                    l_exChiplets[j],
-                                    SPCWKUP_INIT,
-                                    SPW_ALL);
-                if(rc)
-                {
-                    FAPI_ERR("Special wake-up initialization error");
-                    break;
-                }
+            FAPI_EXEC_HWP(rc,  p8_cpu_special_wakeup,
+                                l_exChiplets[j],
+                                SPCWKUP_INIT,
+                                SPW_ALL);
+            if(rc)
+            {
+                FAPI_ERR("Special wake-up initialization error");
+                break;
+            }
 
-            }  // Chiplet Enabled
         }  // chiplet loop
     } while(0);
 
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.H b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.H
index ab0e7ed4a..3f7ee62a3 100644
--- a/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.H
+++ b/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar/p8_poreslw_init.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2012                   */
+/* COPYRIGHT International Business Machines Corp. 2012,2013              */
 /*                                                                        */
 /* p1                                                                     */
 /*                                                                        */
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.C
index 7e5c6e518..d114e29bc 100644
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.C
+++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_prep_for_reset.C
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_pm_prep_for_reset.C,v 1.21 2013/08/02 19:12:40 stillgs Exp $
+// $Id: p8_pm_prep_for_reset.C,v 1.22 2013/09/25 22:36:37 stillgs Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_prep_for_reset.C,v $
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2011
@@ -168,6 +168,7 @@ p8_pm_prep_for_reset(   const fapi::Target &i_primary_chip_target,
             if ( i_primary_chip_target.getType() == TARGET_TYPE_NONE )
             {
                 FAPI_ERR("Set primay target properly for SCM " );
+                const fapi::Target PRIMARY_TARGET = i_primary_chip_target;
                 FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PREP_TARGET_ERR); 
                 break;
             }
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_poregpe_init.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_poregpe_init.C
index 05a8ef333..ede0878c7 100755..100644
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_poregpe_init.C
+++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_poregpe_init.C
@@ -21,7 +21,7 @@
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
 
-// $Id: p8_poregpe_init.C,v 1.4 2013/08/02 19:09:35 stillgs Exp $
+// $Id: p8_poregpe_init.C,v 1.5 2013/09/25 22:36:40 stillgs Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_poregpe_init.C,v $
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2011
@@ -108,10 +108,12 @@ p8_poregpe_init(const Target& i_target, uint32_t mode, uint32_t engine)
         if (!(engine == GPE0 || engine == GPE1 || engine == GPEALL) )
         {
 
-          FAPI_ERR("Unknown engine passed to p8_poregpe_init. Engine %x ....",
+            FAPI_ERR("Unknown engine passed to p8_poregpe_init. Engine %x ....",
                   engine);
-          FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_GPE_BAD_ENGINE);
-          break;
+            const fapi::Target & CHIP = i_target;
+            const uint32_t & IENGINE = engine;
+            FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_GPE_BAD_ENGINE);
+            break;
         }
 
         /// -------------------------------
@@ -163,8 +165,10 @@ p8_poregpe_init(const Target& i_target, uint32_t mode, uint32_t engine)
 
         else
         {
-          FAPI_ERR("Unknown mode passed to p8_poregpe_init. Mode %x ....", mode);
-          FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_GPE_CODE_BAD_MODE);
+            FAPI_ERR("Unknown mode passed to p8_poregpe_init. Mode %x ....", mode);
+            const fapi::Target & CHIP = i_target;
+            uint32_t & IMODE = mode;
+            FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_GPE_CODE_BAD_MODE);
         }
     } while(0);
 
@@ -212,6 +216,8 @@ poregpe_reset(const Target& i_target, const uint32_t engine)
         else
         {
             FAPI_ERR("Invalid engine parm passed to poregpe_reset");
+            const fapi::Target & CHIP = i_target;
+            const uint32_t & IENGINE = engine;
             FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_GPE_BAD_ENGINE);
             break;
         }
@@ -295,7 +301,11 @@ poregpe_reset(const Target& i_target, const uint32_t engine)
         if(!wait_state_detected)
         {
           FAPI_ERR("GPE%x reset failed ", engine);
-          FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_GPE0_RESET_TIMEOUT);
+          const fapi::Target & CHIP = i_target;
+          uint32_t           & POLLCOUNT = poll_count;
+          const uint32_t     & MAXPOLLS = max_polls;
+          const uint32_t     & IENGINE = engine;
+          FAPI_SET_HWP_ERROR(l_rc, RC_PROCPM_GPE_RESET_TIMEOUT);
         }
 
     } while(0);
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pss_init.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pss_init.C
index 125bedb85..5e44b7801 100755
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pss_init.C
+++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pss_init.C
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: p8_pss_init.C,v 1.6 2013/08/02 19:11:20 stillgs Exp $
+// $Id: p8_pss_init.C,v 1.7 2013/09/25 22:36:42 stillgs Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pss_init.C,v $
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2011
@@ -140,7 +140,8 @@ p8_pss_init(const Target &i_target, uint32_t mode)
     else
     {
         FAPI_ERR("Unknown mode passed to p8_pss_init. Mode %x ....", mode);
-        uint32_t & MODE = mode;
+        const fapi::Target & CHIP = i_target;
+        uint32_t & IMODE = mode;
         FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PSS_CODE_BAD_MODE);
     }
 
@@ -710,44 +711,27 @@ pss_init(const Target& i_target)
 fapi::ReturnCode
 pss_reset(const Target& i_target)
 {
-    fapi::ReturnCode rc;
+    fapi::ReturnCode    rc;
     uint32_t            e_rc = 0;
     ecmdDataBufferBase  data(64);
 
-    uint32_t            attr_proc_pss_init_nest_frequency;
-    float               pss_cycle_ns;
-    uint32_t            pollcount=0;
-    float               max_polls;
-    uint32_t            pss_timeout_us = 1000;
+    uint32_t            pollcount = 0;
+    uint32_t            max_polls;
+    const uint32_t      pss_timeout_us = 10000;  // 10 millisecond.  Far longer than needed
+    const uint32_t      pss_poll_interval_us = 10;
 
     FAPI_INF("PSS reset start...");
     do
     {
 
-        // Determine the PowerBus frequency to determine the clock speed
-        // of the PSS logic.  This determines the number of polls needed
-        // for a given timeout interval.
-        GETATTR(        rc,
-                        ATTR_FREQ_PB,
-                        "ATTR_FREQ_PB",
-                        NULL,
-                        attr_proc_pss_init_nest_frequency);
-
-        pss_cycle_ns = ((1/(float)attr_proc_pss_init_nest_frequency)*4);
-        FAPI_DBG("pss_cycle_ns = %f; pss_nest_freq = %d",
-                        pss_cycle_ns, attr_proc_pss_init_nest_frequency);
-        max_polls = (pss_timeout_us / (pss_cycle_ns / 1000));
-        FAPI_DBG("computed max polls = %f; pss_timeout_us = %d; pss_cycle_ns = %f",
-                        max_polls, pss_timeout_us, pss_cycle_ns);
-
         //  ******************************************************************
-        //     - Poll status register for ongoing or errors to give the
+        //     - Poll status register for ongoing or no errors to give the
         //       chance for on-going operations to complete
         //  ******************************************************************
 
         FAPI_DBG("Polling for ADC on-going to go low ... ");
-
-        do
+        max_polls = pss_timeout_us / pss_poll_interval_us;
+        for (pollcount = 0; pollcount < max_polls; pollcount++)
         {
             rc = fapiGetScom(i_target, SPIPSS_ADC_STATUS_REG_0x00070003, data );
             if (rc)
@@ -755,21 +739,39 @@ pss_reset(const Target& i_target)
                 FAPI_ERR("fapiGetScom(SPIPSS_ADC_STATUS_REG_0x00070003) failed.");
                 break;
             }
-            FAPI_INF(".");
-            pollcount++;
-        } while (data.isBitSet(0) && data.isBitClear(5) && pollcount < max_polls);
+            // Ongoing is not set OR an error
+            if (data.isBitClear(0) || data.isBitSet(7))
+            {
+                break;
+            }
+            FAPI_DBG("Delay before next poll");
+            e_rc = fapiDelay(pss_poll_interval_us*1000, 1000);  // ns, sim clocks
+            if (e_rc)
+            {
+                FAPI_ERR("fapiDelay error");
+                rc.setEcmdError(e_rc);
+                break;
+            }
+        }
         if (!rc.ok())
         {
             break;
         }
+        if (data.isBitSet(7))
+        {
+            FAPI_ERR("SPIADC error bit asserted waiting for operation to complete.");
+            const fapi::Target & CHIP = i_target;
+            FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PSS_ADC_ERROR);
+            break;
+        }
         if (pollcount >= max_polls)
         {
-            FAPI_INF("WARNING: SPI ADC did not go to idle in %d us.  Reset of PSS macro is commencing anyway", pss_timeout_us);
+            FAPI_INF("WARNING: SPI ADC did not go to idle in at least %d us.  Reset of PSS macro is commencing anyway", pss_timeout_us);
             break;
         }
         else
         {
-            FAPI_INF("Send all the frames from ADC to the device.So now resetting it ");
+            FAPI_INF("All frames sent from ADC to the APSS device.");
         }
 
         //  ******************************************************************
@@ -778,8 +780,7 @@ pss_reset(const Target& i_target)
         //  ******************************************************************
 
         FAPI_INF("Polling for P2S on-going to go low ... ");
-        pollcount = 0;
-        do
+        for (pollcount = 0; pollcount < max_polls; pollcount++)
         {
             rc = fapiGetScom(i_target, SPIPSS_P2S_STATUS_REG_0x00070043, data );
             if (rc)
@@ -787,28 +788,49 @@ pss_reset(const Target& i_target)
                 FAPI_ERR("fapiGetScom(SPIPSS_P2S_STATUS_REG_0x00070043) failed.");
                 break;
             }
-            FAPI_INF(".");
-            pollcount++;
-        } while (data.isBitSet(0) && data.isBitClear(5) && pollcount < max_polls);
+           
+            // Ongoing is not set OR an error
+            if (data.isBitClear(0) || data.isBitSet(7))
+            {
+                break;
+            }
+            FAPI_DBG("Delay before next poll");
+            e_rc = fapiDelay(pss_poll_interval_us*1000, 1000);  // ns, sim clocks
+            if (e_rc)
+            {
+                rc.setEcmdError(e_rc);
+                break;
+            }            
+        }
         if (!rc.ok())
         {
             break;
         }
-        if (pollcount >= max_polls)
+        if (data.isBitSet(7))
         {
-            FAPI_INF("WARNING: SPI P2S did not go to idle in %d us.  Reset of PSS macro is commencing anyway", pss_timeout_us);
+            FAPI_ERR("SPIP2S FSM error bit asserted waiting for operation to complete.");
+            const fapi::Target & CHIP = i_target;
+            FAPI_SET_HWP_ERROR(rc, RC_PROCPM_PSS_P2S_ERROR);
             break;
         }
+        if (data.isBitSet(5))
+        {
+            FAPI_INF("SPIP2S Write While Bridge Busy bit asserted.  Will be cleared with coming reset");
+        }
+        if (pollcount >= max_polls)
+        {
+            FAPI_INF("WARNING: SPI P2S did not go to idle in at least %d us.  Reset of PSS macro is commencing anyway", pss_timeout_us);
+        }
         else
         {
-            FAPI_INF("Sent all the frames from P2S bridge to the device.");
+            FAPI_INF("SAll frames sent from P2S to the APSS device.");
         }
 
         //  ******************************************************************
         //     - Resetting both ADC and P2S bridge
         //  ******************************************************************
 
-        FAPI_INF("Resetting P2S and ADC bridge.");
+        FAPI_INF("Resetting P2S and ADC bridges.");
 
         e_rc=data.flushTo0();
         e_rc=data.setBit(1);
diff --git a/src/usr/hwpf/hwp/proc_slw_registers.xml b/src/usr/hwpf/hwp/p8_slw_registers.xml
index 5844b8bb6..de18af592 100644
--- a/src/usr/hwpf/hwp/proc_slw_registers.xml
+++ b/src/usr/hwpf/hwp/p8_slw_registers.xml
@@ -1,7 +1,7 @@
 <!-- IBM_PROLOG_BEGIN_TAG                                                   -->
 <!-- This is an automatically generated prolog.                             -->
 <!--                                                                        -->
-<!-- $Source: src/usr/hwpf/hwp/proc_slw_registers.xml $                     -->
+<!-- $Source: src/usr/hwpf/hwp/p8_slw_registers.xml $                       -->
 <!--                                                                        -->
 <!-- IBM CONFIDENTIAL                                                       -->
 <!--                                                                        -->
@@ -20,7 +20,7 @@
 <!-- Origin: 30                                                             -->
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: proc_slw_registers.xml,v 1.1 2013/06/21 14:11:14 jeshua Exp $ -->
+<!-- $Id: p8_slw_registers.xml,v 1.1 2013/10/08 15:45:18 stillgs Exp $ -->
 <!-- Definition of SLW registers to collect on some errors -->
 <hwpErrors>
   <registerFfdc>
@@ -52,4 +52,10 @@
     <scomRegister>PORE_SLW_I2C_E1_PARAM_0x00068018</scomRegister>
     <scomRegister>PORE_SLW_I2C_E2_PARAM_0x00068019</scomRegister>
   </registerFfdc>
+  <registerFfdc>
+    <id>REG_FFDC_PROC_SLW_FIR_REGISTERS</id>
+    <scomRegister>PMC_LFIR_0x01010840</scomRegister>
+    <scomRegister>OCC_LFIR_0x01010800</scomRegister>
+    <scomRegister>PBA_FIR_0x02010840</scomRegister>
+  </registerFfdc>
 </hwpErrors>
diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_gpe_registers.xml b/src/usr/hwpf/hwp/runtime_errors/p8_gpe_registers.xml
new file mode 100644
index 000000000..a3df227de
--- /dev/null
+++ b/src/usr/hwpf/hwp/runtime_errors/p8_gpe_registers.xml
@@ -0,0 +1,75 @@
+<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
+<!-- This is an automatically generated prolog.                             -->
+<!--                                                                        -->
+<!-- $Source: src/usr/hwpf/hwp/runtime_errors/p8_gpe_registers.xml $        -->
+<!--                                                                        -->
+<!-- IBM CONFIDENTIAL                                                       -->
+<!--                                                                        -->
+<!-- COPYRIGHT International Business Machines Corp. 2013                   -->
+<!--                                                                        -->
+<!-- p1                                                                     -->
+<!--                                                                        -->
+<!-- Object Code Only (OCO) source materials                                -->
+<!-- Licensed Internal Code Source Materials                                -->
+<!-- IBM HostBoot Licensed Internal Code                                    -->
+<!--                                                                        -->
+<!-- The source code for this program is not published or otherwise         -->
+<!-- divested of its trade secrets, irrespective of what has been           -->
+<!-- deposited with the U.S. Copyright Office.                              -->
+<!--                                                                        -->
+<!-- Origin: 30                                                             -->
+<!--                                                                        -->
+<!-- IBM_PROLOG_END_TAG                                                     -->
+<!-- $Id: p8_gpe_registers.xml,v 1.1 2013/10/08 15:45:17 stillgs Exp $ -->
+<!-- Definition of GPE registers to collect on some errors -->
+<hwpErrors>
+  <registerFfdc>
+    <id>REG_FFDC_PROC_GPE_REGISTERS</id>
+    <scomRegister>PORE_GPE0_STATUS_0x00060000</scomRegister>
+    <scomRegister>PORE_GPE0_CONTROL_0x00060001</scomRegister>
+    <scomRegister>PORE_GPE0_RESET_0x00060002</scomRegister>
+    <scomRegister>PORE_GPE0_ERROR_MASK_0x00060003</scomRegister>
+    <scomRegister>PORE_GPE0_PRV_BASE_ADDRESS0_0x00060004</scomRegister>
+    <scomRegister>PORE_GPE0_PRV_BASE_ADDRESS1_0x00060005</scomRegister>
+    <scomRegister>PORE_GPE0_OCI_BASE_ADDRESS0_0x00060006</scomRegister>
+    <scomRegister>PORE_GPE0_OCI_BASE_ADDRESS1_0x00060007</scomRegister>
+    <scomRegister>PORE_GPE0_TABLE_BASE_ADDR_0x00060008</scomRegister>
+    <scomRegister>PORE_GPE0_EXE_TRIGGER_0x00060009</scomRegister>
+    <scomRegister>PORE_GPE0_SCRATCH0_0x0006000A</scomRegister>
+    <scomRegister>PORE_GPE0_SCRATCH1_0x0006000B</scomRegister>
+    <scomRegister>PORE_GPE0_SCRATCH2_0x0006000C</scomRegister>
+    <scomRegister>PORE_GPE0_IBUF_01_0x0006000D</scomRegister>
+    <scomRegister>PORE_GPE0_IBUF_2_0x0006000E</scomRegister>
+    <scomRegister>PORE_GPE0_DBG0_0x0006000F</scomRegister>
+    <scomRegister>PORE_GPE0_DBG1_0x00060010</scomRegister>
+    <scomRegister>PORE_GPE0_PC_STACK0_0x00060011</scomRegister>
+    <scomRegister>PORE_GPE0_PC_STACK1_0x00060012</scomRegister>
+    <scomRegister>PORE_GPE0_PC_STACK2_0x00060013</scomRegister>
+    <scomRegister>PORE_GPE0_ID_FLAGS_0x00060014</scomRegister>
+    <scomRegister>PORE_GPE0_DATA0_0x00060015</scomRegister>
+    <scomRegister>PORE_GPE0_MEMORY_RELOC_0x00060016</scomRegister>  
+    <scomRegister>PORE_GPE1_STATUS_0x00060020</scomRegister>
+    <scomRegister>PORE_GPE1_CONTROL_0x00060021</scomRegister>
+    <scomRegister>PORE_GPE1_RESET_0x00060022</scomRegister>
+    <scomRegister>PORE_GPE1_ERROR_MASK_0x00060023</scomRegister>
+    <scomRegister>PORE_GPE1_PRV_BASE_ADDRESS0_0x00060024</scomRegister>
+    <scomRegister>PORE_GPE1_PRV_BASE_ADDRESS1_0x00060025</scomRegister>
+    <scomRegister>PORE_GPE1_OCI_BASE_ADDRESS0_0x00060026</scomRegister>
+    <scomRegister>PORE_GPE1_OCI_BASE_ADDRESS1_0x00060027</scomRegister>
+    <scomRegister>PORE_GPE1_TABLE_BASE_ADDR_0x00060028</scomRegister>
+    <scomRegister>PORE_GPE1_EXE_TRIGGER_0x00060029</scomRegister>
+    <scomRegister>PORE_GPE1_SCRATCH0_0x0006002A</scomRegister>
+    <scomRegister>PORE_GPE1_SCRATCH1_0x0006002B</scomRegister>
+    <scomRegister>PORE_GPE1_SCRATCH2_0x0006002C</scomRegister>
+    <scomRegister>PORE_GPE1_IBUF_01_0x0006002D</scomRegister>
+    <scomRegister>PORE_GPE1_IBUF_2_0x0006002E</scomRegister>
+    <scomRegister>PORE_GPE1_DBG0_0x0006002F</scomRegister>
+    <scomRegister>PORE_GPE1_DBG1_0x00060030</scomRegister>
+    <scomRegister>PORE_GPE1_PC_STACK0_0x00060031</scomRegister>
+    <scomRegister>PORE_GPE1_PC_STACK1_0x00060032</scomRegister>
+    <scomRegister>PORE_GPE1_PC_STACK2_0x00060033</scomRegister>
+    <scomRegister>PORE_GPE1_ID_FLAGS_0x00060034</scomRegister>
+    <scomRegister>PORE_GPE1_DATA0_0x00060035</scomRegister>
+    <scomRegister>PORE_GPE1_MEMORY_RELOC_0x00060036</scomRegister>    
+  </registerFfdc>
+</hwpErrors>
diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_pm_prep_for_reset_errors.xml b/src/usr/hwpf/hwp/runtime_errors/p8_pm_prep_for_reset_errors.xml
index 9896f2bb3..a28228783 100644
--- a/src/usr/hwpf/hwp/runtime_errors/p8_pm_prep_for_reset_errors.xml
+++ b/src/usr/hwpf/hwp/runtime_errors/p8_pm_prep_for_reset_errors.xml
@@ -20,74 +20,28 @@
 <!-- Origin: 30                                                             -->
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_pm_prep_for_reset_errors.xml,v 1.4 2013/08/02 19:15:40 stillgs Exp $ -->
-<!-- Error definitions for proc_pcbs_init procedure -->
+<!-- $Id: p8_pm_prep_for_reset_errors.xml,v 1.6 2013-10-15 17:29:30 dcrowell Exp $ -->
+<!-- Error definitions for p8_pm_prep_for_reset procedure -->
 <hwpErrors>
   <!-- *********************************************************************** -->
   <hwpError>
     <rc>RC_PROCPM_PREP_UNSUPPORTED_MODE_ERR</rc>
     <description>Mode parameter value not supported</description>
     <ffdc>MODE</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
   </hwpError>
   <!-- *********************************************************************** -->
   <hwpError>
     <rc>RC_PROCPM_PREP_TARGET_ERR</rc>
-    <description>Errors in Targets passed -- PM_RESET-MODE</description>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PREP_CODE_PROC_OCC</rc>
-    <description>Errors in proc_occ_control.C  -- PM_RESET-MODE</description>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PREP_CODE_PROC_CPU</rc>
-    <description>Errors in proc_cpu_special_wakeup.C  -- PM_RESET-MODE</description>
-  </hwpError>
-    <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PREP_CODE_PROC_PMC_FORCE</rc>
-    <description>Errors in proc_pmc_force_vsafe.C  -- PM_RESET-MODE</description>
-  </hwpError>
-    <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PREP_CODE_PROC_PCBS</rc>
-    <description>Errors in proc__pcbs_init.C  -- PM_RESET-MODE</description>
-  </hwpError>
-    <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PREP_CODE_PROC_PMC_INIT</rc>
-    <description>Errors in proc_pmc_init.C  -- PM_RESET-MODE</description>
-  </hwpError>
-    <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PREP_CODE_PROC_PORESW</rc>
-    <description>Errors in proc_poresw_init.C  -- PM_RESET-MODE</description>
-  </hwpError>
-    <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PREP_CODE_PROC_POREGPE</rc>
-    <description>Errors in proc_poregpe_init.C  -- PM_RESET-MODE</description>
-  </hwpError>
-    <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PREP_CODE_PROC_OHA</rc>
-    <description>Errors in proc_oha_init.C  -- PM_RESET-MODE</description>
-  </hwpError>
-    <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PREP_CODE_PROC_PBA</rc>
-    <description>Errors in proc_pba_init.C  -- PM_RESET-MODE</description>
-  </hwpError> 
-      <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PREP_CODE_PROC_OCC_SRAM</rc>
-    <description>Errors in proc_occ_sram_init.C  -- PM_RESET-MODE</description>
-  </hwpError>
-      <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_PREP_CODE_PROC_OCB</rc>
-    <description>Errors in proc_ocb_init.C  -- PM_RESET-MODE</description>
+    <description>Primary target must be set to a valid value in the SCM case.</description>
+    <ffdc>PRIMARY_TARGET</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
   </hwpError>
   <!-- *********************************************************************** -->  
 </hwpErrors>
diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_pmc_deconfig_setup_errors.xml b/src/usr/hwpf/hwp/runtime_errors/p8_pmc_deconfig_setup_errors.xml
new file mode 100644
index 000000000..21210120f
--- /dev/null
+++ b/src/usr/hwpf/hwp/runtime_errors/p8_pmc_deconfig_setup_errors.xml
@@ -0,0 +1,29 @@
+<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
+<!-- This is an automatically generated prolog.                             -->
+<!--                                                                        -->
+<!-- $Source: src/usr/hwpf/hwp/runtime_errors/p8_pmc_deconfig_setup_errors.xml $ -->
+<!--                                                                        -->
+<!-- IBM CONFIDENTIAL                                                       -->
+<!--                                                                        -->
+<!-- COPYRIGHT International Business Machines Corp. 2013                   -->
+<!--                                                                        -->
+<!-- p1                                                                     -->
+<!--                                                                        -->
+<!-- Object Code Only (OCO) source materials                                -->
+<!-- Licensed Internal Code Source Materials                                -->
+<!-- IBM HostBoot Licensed Internal Code                                    -->
+<!--                                                                        -->
+<!-- The source code for this program is not published or otherwise         -->
+<!-- divested of its trade secrets, irrespective of what has been           -->
+<!-- deposited with the U.S. Copyright Office.                              -->
+<!--                                                                        -->
+<!-- Origin: 30                                                             -->
+<!--                                                                        -->
+<!-- IBM_PROLOG_END_TAG                                                     -->
+<!-- $Id: p8_pmc_deconfig_setup_errors.xml,v 1.3 2013-10-15 17:36:08 dcrowell Exp $ -->
+<!-- Error definitions for p8_pmc_deconfig_setup procedure -->
+<hwpErrors>
+  <!-- *********************************************************************** -->
+  <!-- No errors yet, keeping as placeholder -->
+  <!-- *********************************************************************** -->
+</hwpErrors>
diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_poregpe_errors.xml b/src/usr/hwpf/hwp/runtime_errors/p8_poregpe_errors.xml
index 97c314aec..d6b72e356 100644
--- a/src/usr/hwpf/hwp/runtime_errors/p8_poregpe_errors.xml
+++ b/src/usr/hwpf/hwp/runtime_errors/p8_poregpe_errors.xml
@@ -20,27 +20,45 @@
 <!-- Origin: 30                                                             -->
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_poregpe_errors.xml,v 1.2 2013/05/23 18:44:30 stillgs Exp $ -->
+<!-- $Id: p8_poregpe_errors.xml,v 1.4 2013-10-15 17:36:07 dcrowell Exp $ -->
 <!-- Error definitions for proc_poregpe procedure -->
 <hwpErrors>
   <!-- *********************************************************************** -->
   <hwpError>
-    <rc>RC_PROCPM_GPE0_RESET_TIMEOUT</rc>
-    <description>GPE0 reset failed in proc_poregpe_init.</description>
-  </hwpError>
-  <!-- *********************************************************************** -->
-  <hwpError>
-    <rc>RC_PROCPM_GPE1_RESET_TIMEOUT</rc>
-    <description>GPE1 reset failed in proc_poregpe_init.</description>
+    <rc>RC_PROCPM_GPE_RESET_TIMEOUT</rc>
+    <description>GPE reset failed in proc_poregpe_init.</description>
+    <ffdc>POLLCOUNT</ffdc>
+    <ffdc>MAXPOLLS</ffdc>
+    <ffdc>IENGINE</ffdc>
+    <collectRegisterFfdc>
+      <id>REG_FFDC_PROC_GPE_REGISTERS</id>
+      <target>CHIP</target>
+    </collectRegisterFfdc>
+    <callout>
+      <target>CHIP</target>
+      <priority>HIGH</priority>
+    </callout>  
   </hwpError>
   <!-- *********************************************************************** -->
   <hwpError>
     <rc>RC_PROCPM_GPE_CODE_BAD_MODE</rc>
     <description>Unknown mode passed to proc_poregpe_init.</description>
+    <ffdc>IMODE</ffdc>
+    <ffdc>CHIP</ffdc>
+    <callout>
+      <procedure>CODE</procedure>      
+      <priority>HIGH</priority>
+    </callout>
   </hwpError>
   <!-- *********************************************************************** -->
   <hwpError>
     <rc>RC_PROCPM_GPE_BAD_ENGINE</rc>
     <description>Unknown engine passed to proc_poregpe_init. </description>
+    <ffdc>IENGINE</ffdc>
+    <ffdc>CHIP</ffdc>
+    <callout>
+      <procedure>CODE</procedure>      
+      <priority>HIGH</priority>
+    </callout>
   </hwpError>
 </hwpErrors>
diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_pss_errors.xml b/src/usr/hwpf/hwp/runtime_errors/p8_pss_errors.xml
index 04f3a7c36..e1c7f0ed5 100644
--- a/src/usr/hwpf/hwp/runtime_errors/p8_pss_errors.xml
+++ b/src/usr/hwpf/hwp/runtime_errors/p8_pss_errors.xml
@@ -20,19 +20,45 @@
 <!-- Origin: 30                                                             -->
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- $Id: p8_pss_errors.xml,v 1.3 2013/08/02 19:15:43 stillgs Exp $ -->
-<!-- Error definitions for proc_pmc_init procedure -->
+<!-- $Id: p8_pss_errors.xml,v 1.5 2013-10-15 17:39:44 dcrowell Exp $ -->
+<!-- Error definitions for proc_pss_init procedure -->
 <hwpErrors>
   <!-- *********************************************************************** -->
   <hwpError>
     <rc>RC_PROCPM_PSS_CODE_BAD_MODE</rc>
     <description>Unknown mode passed to proc_pss_init.</description>
-    <ffdc>MODE</ffdc>
-  </hwpError>
-  <!-- *********************************************************************** -->
+    <ffdc>IMODE</ffdc>
+    <ffdc>CHIP</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
+  </hwpError> 
+   <!-- *********************************************************************** -->
+  <hwpError>
+    <rc>RC_PROCPM_PSS_ADC_ERROR</rc>
+    <description>SPIADC error bit asserted waiting for operation to complete."</description>
+    <collectRegisterFfdc>
+      <id>REG_FFDC_PROC_PSS_REGISTERS</id>
+      <target>CHIP</target>
+    </collectRegisterFfdc>
+    <callout>
+      <target>CHIP</target>
+      <priority>HIGH</priority>
+    </callout>   
+  </hwpError> 
+   <!-- *********************************************************************** -->
   <hwpError>
-    <rc>RC_PROCPM_PSS_WRONG_DEVICE</rc>
-    <description>wrong device taget : make sure that you use 0xA=APSS and 0XD=DPSS no other value works.</description>
-  </hwpError>
+    <rc>RC_PROCPM_PSS_P2S_ERROR</rc>
+    <description>SPIP2S error bit asserted waiting for operation to complete."</description>
+    <collectRegisterFfdc>
+      <id>REG_FFDC_PROC_PSS_REGISTERS</id>
+      <target>CHIP</target>
+    </collectRegisterFfdc>
+    <callout>
+      <target>CHIP</target>
+      <priority>HIGH</priority>
+    </callout>   
+  </hwpError> 
   <!-- *********************************************************************** -->
 </hwpErrors>
diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_pss_registers.xml b/src/usr/hwpf/hwp/runtime_errors/p8_pss_registers.xml
new file mode 100644
index 000000000..52381e6b7
--- /dev/null
+++ b/src/usr/hwpf/hwp/runtime_errors/p8_pss_registers.xml
@@ -0,0 +1,49 @@
+<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
+<!-- This is an automatically generated prolog.                             -->
+<!--                                                                        -->
+<!-- $Source: src/usr/hwpf/hwp/runtime_errors/p8_pss_registers.xml $        -->
+<!--                                                                        -->
+<!-- IBM CONFIDENTIAL                                                       -->
+<!--                                                                        -->
+<!-- COPYRIGHT International Business Machines Corp. 2013                   -->
+<!--                                                                        -->
+<!-- p1                                                                     -->
+<!--                                                                        -->
+<!-- Object Code Only (OCO) source materials                                -->
+<!-- Licensed Internal Code Source Materials                                -->
+<!-- IBM HostBoot Licensed Internal Code                                    -->
+<!--                                                                        -->
+<!-- The source code for this program is not published or otherwise         -->
+<!-- divested of its trade secrets, irrespective of what has been           -->
+<!-- deposited with the U.S. Copyright Office.                              -->
+<!--                                                                        -->
+<!-- Origin: 30                                                             -->
+<!--                                                                        -->
+<!-- IBM_PROLOG_END_TAG                                                     -->
+<!-- $Id: p8_pss_registers.xml,v 1.1 2013/10/08 15:45:12 stillgs Exp $ -->
+<!-- Definition of PSS registers to collect on some errors -->
+<hwpErrors>
+  <registerFfdc>
+    <id>REG_FFDC_PROC_PSS_REGISTERS</id>
+    <scomRegister>SPIPSS_ADC_CTRL_REG0_0x00070000</scomRegister>  
+    <scomRegister>SPIPSS_ADC_CTRL_REG1_0x00070001</scomRegister>  
+    <scomRegister>SPIPSS_ADC_CTRL_REG2_0x00070002</scomRegister>  
+    <scomRegister>SPIPSS_ADC_STATUS_REG_0x00070003</scomRegister>  
+    <scomRegister>SPIPSS_ADC_CMD_REG_0x00070004</scomRegister>  
+    <scomRegister>SPIPSS_ADC_WDATA_REG_0x00070010</scomRegister>  
+    <scomRegister>SPIPSS_ADC_RDATA_REG0_0x00070020</scomRegister>  
+    <scomRegister>SPIPSS_ADC_RDATA_REG1_0x00070021</scomRegister>  
+    <scomRegister>SPIPSS_ADC_RDATA_REG2_0x00070022</scomRegister>  
+    <scomRegister>SPIPSS_ADC_RDATA_REG3_0x00070023</scomRegister>  
+    <scomRegister>SPIPSS_100NS_REG_0x00070028</scomRegister>  
+    <scomRegister>SPIPSS_P2S_CTRL_REG0_0x00070040</scomRegister>  
+    <scomRegister>SPIPSS_P2S_CTRL_REG1_0x00070041</scomRegister>  
+    <scomRegister>SPIPSS_P2S_CTRL_REG2_0x00070042</scomRegister>  
+    <scomRegister>SPIPSS_P2S_STATUS_REG_0x00070043</scomRegister>  
+    <scomRegister>SPIPSS_P2S_COMMAND_REG_0x00070044</scomRegister>  
+    <scomRegister>SPIPSS_P2S_WDATA_REG_0x00070050</scomRegister>  
+    <scomRegister>SPIPSS_P2S_RDATA_REG_0x00070060</scomRegister>  
+    <scomRegister>SPIPSS_ADC_RESET_REGISTER_0x00070005</scomRegister>  
+    <scomRegister>SPIPSS_P2S_RESET_REGISTER_0x00070045</scomRegister>  
+  </registerFfdc>
+</hwpErrors>
diff --git a/src/usr/hwpf/makefile b/src/usr/hwpf/makefile
index 0a282126b..39ac9bd04 100644
--- a/src/usr/hwpf/makefile
+++ b/src/usr/hwpf/makefile
@@ -89,7 +89,7 @@ HWP_ERROR_XML_FILES = hwp/fapiHwpErrorInfo.xml   \
     hwp/pstates/pstates/p8_build_pstate_datablock_errors.xml \
     hwp/pstates/pstates/proc_get_voltage_errors.xml \
     hwp/proc_cfam_registers.xml \
-    hwp/proc_slw_registers.xml \
+    hwp/p8_slw_registers.xml \
     hwp/proc_sbe_select_ex_errors.xml \
     hwp/utility_procedures/memory_mss_maint_cmds.xml \
     hwp/mc_config/mss_volt/memory_mss_volt.xml \
@@ -121,7 +121,10 @@ HWP_ERROR_XML_FILES = hwp/fapiHwpErrorInfo.xml   \
     hwp/mc_config/mss_eff_config/memory_mss_eff_config_termination.xml \
     hwp/build_winkle_images/p8_block_wakeup_intr/p8_block_wakeup_intr_errors.xml \
     hwp/build_winkle_images/proc_mailbox_utils/p8_mailbox_utils_errors.xml \
-    hwp/proc_otprom_registers.xml
+    hwp/proc_otprom_registers.xml \
+    hwp/runtime_errors/p8_gpe_registers.xml \
+    hwp/runtime_errors/p8_pmc_deconfig_setup_errors.xml \
+    hwp/runtime_errors/p8_pss_registers.xml 
 
 ## these get generated into obj/genfiles/AttributeIds.H
 HWP_ATTR_XML_FILES = hwp/memory_attributes.xml \