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| author | Matt Derksen <mderkse1@us.ibm.com> | 2019-04-16 14:24:17 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2019-04-26 15:45:17 -0500 |
| commit | 72ef108a5db4a00b8380a88c7bec146ca3f6d44c (patch) | |
| tree | fcc9b5f3930f4b47c7ad127835cc4c3cd66e2b40 | |
| parent | 3c199d2a3a26891a2ace5b7156f5c9207387a497 (diff) | |
| download | talos-hostboot-72ef108a5db4a00b8380a88c7bec146ca3f6d44c.tar.gz talos-hostboot-72ef108a5db4a00b8380a88c7bec146ca3f6d44c.zip | |
Enable p9_pm_stop_gpe_init call in istep15
Previously commented out for axone, now supported.
Tested by unset EARLY_TESTCASES in simics_axone.config
Change-Id: If62ab5b2c87d115d0f9f3e1fa20496e9f18c122e
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76047
Reviewed-by: Glenn Miles <milesg@ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
| -rw-r--r-- | src/usr/isteps/istep15/host_start_stop_engine.C | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/src/usr/isteps/istep15/host_start_stop_engine.C b/src/usr/isteps/istep15/host_start_stop_engine.C index 27580947d..a3b2e21f4 100644 --- a/src/usr/isteps/istep15/host_start_stop_engine.C +++ b/src/usr/isteps/istep15/host_start_stop_engine.C @@ -79,11 +79,9 @@ void* host_start_stop_engine (void *io_pArgs) } #endif -// Skip initializing the PM complex in axone simics for now -#ifndef CONFIG_AXONE_BRING_UP //Use targeting code to get a list of all processors TARGETING::TargetHandleList l_procChips; - getAllChips( l_procChips, TARGETING::TYPE_PROC ); + getAllChips( l_procChips, TARGETING::TYPE_PROC ); for (const auto & l_procChip: l_procChips) { @@ -92,6 +90,10 @@ void* host_start_stop_engine (void *io_pArgs) fapi2::Target<TARGET_TYPE_PROC_CHIP>l_fapi2CpuTarget( (l_procChip)); + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "Calling p9_pm_stop_gpe_init for 0x%.8X target", + TARGETING::get_huid(l_procChip) ); + //call p9_pm_stop_gpe_init.C HWP FAPI_INVOKE_HWP(l_errl, p9_pm_stop_gpe_init, @@ -105,7 +107,6 @@ void* host_start_stop_engine (void *io_pArgs) TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "host_start_stop_engine:: failed on proc with HUID : %d",TARGETING::get_huid(l_procChip) ); } } -#endif #ifdef CONFIG_IPLTIME_CHECKSTOP_ANALYSIS // Starting SGPE in istep15.4 causes OIMR0 register to be improperly |
